atapi_wdc.c revision 1.68 1 /* $NetBSD: atapi_wdc.c,v 1.68 2004/01/03 23:59:58 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.68 2004/01/03 23:59:58 thorpej Exp $");
34
35 #ifndef WDCDEBUG
36 #define WDCDEBUG
37 #endif /* WDCDEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/file.h>
43 #include <sys/stat.h>
44 #include <sys/buf.h>
45 #include <sys/malloc.h>
46 #include <sys/device.h>
47 #include <sys/syslog.h>
48 #include <sys/proc.h>
49 #include <sys/dvdio.h>
50
51 #include <machine/intr.h>
52 #include <machine/bus.h>
53
54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
60
61 #include <dev/ata/atareg.h>
62 #include <dev/ata/atavar.h>
63 #include <dev/ic/wdcreg.h>
64 #include <dev/ic/wdcvar.h>
65
66 #include <dev/scsipi/scsi_all.h> /* for SCSI status */
67
68 #define DEBUG_INTR 0x01
69 #define DEBUG_XFERS 0x02
70 #define DEBUG_STATUS 0x04
71 #define DEBUG_FUNCS 0x08
72 #define DEBUG_PROBE 0x10
73 #ifdef WDCDEBUG
74 int wdcdebug_atapi_mask = 0;
75 #define WDCDEBUG_PRINT(args, level) \
76 if (wdcdebug_atapi_mask & (level)) \
77 printf args
78 #else
79 #define WDCDEBUG_PRINT(args, level)
80 #endif
81
82 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */
83 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */
84
85 static int wdc_atapi_get_params(struct scsipi_channel *, int,
86 struct ataparams *);
87 static void wdc_atapi_probe_device(struct atapibus_softc *, int);
88 static void wdc_atapi_minphys (struct buf *bp);
89 static void wdc_atapi_start(struct wdc_channel *,struct ata_xfer *);
90 static int wdc_atapi_intr(struct wdc_channel *, struct ata_xfer *, int);
91 static void wdc_atapi_kill_xfer(struct wdc_channel *, struct ata_xfer *);
92 static void wdc_atapi_phase_complete(struct ata_xfer *);
93 static void wdc_atapi_done(struct wdc_channel *, struct ata_xfer *);
94 static void wdc_atapi_reset(struct wdc_channel *, struct ata_xfer *);
95 static void wdc_atapi_scsipi_request(struct scsipi_channel *,
96 scsipi_adapter_req_t, void *);
97 static void wdc_atapi_kill_pending(struct scsipi_periph *);
98 static void wdc_atapi_polldsc(void *arg);
99
100 #define MAX_SIZE MAXPHYS
101
102 static const struct scsipi_bustype wdc_atapi_bustype = {
103 SCSIPI_BUSTYPE_ATAPI,
104 atapi_scsipi_cmd,
105 atapi_interpret_sense,
106 atapi_print_addr,
107 wdc_atapi_kill_pending,
108 };
109
110 void
111 wdc_atapibus_attach(struct atabus_softc *ata_sc)
112 {
113 struct wdc_channel *chp = ata_sc->sc_chan;
114 struct wdc_softc *wdc = chp->ch_wdc;
115 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
116 struct scsipi_channel *chan = &chp->ch_atapi_channel;
117
118 /*
119 * Fill in the scsipi_adapter.
120 */
121 adapt->adapt_dev = &wdc->sc_dev;
122 adapt->adapt_nchannels = wdc->nchannels;
123 adapt->adapt_request = wdc_atapi_scsipi_request;
124 adapt->adapt_minphys = wdc_atapi_minphys;
125 if (wdc->cap & WDC_CAPABILITY_NOIRQ)
126 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY;
127 wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device;
128
129 /*
130 * Fill in the scsipi_channel.
131 */
132 memset(chan, 0, sizeof(*chan));
133 chan->chan_adapter = adapt;
134 chan->chan_bustype = &wdc_atapi_bustype;
135 chan->chan_channel = chp->ch_channel;
136 chan->chan_flags = SCSIPI_CHAN_OPENINGS;
137 chan->chan_openings = 1;
138 chan->chan_max_periph = 1;
139 chan->chan_ntargets = 2;
140 chan->chan_nluns = 1;
141
142 chp->atapibus = config_found(&ata_sc->sc_dev, chan, atapiprint);
143 }
144
145 static void
146 wdc_atapi_minphys(struct buf *bp)
147 {
148
149 if (bp->b_bcount > MAX_SIZE)
150 bp->b_bcount = MAX_SIZE;
151 minphys(bp);
152 }
153
154 /*
155 * Kill off all pending xfers for a periph.
156 *
157 * Must be called at splbio().
158 */
159 static void
160 wdc_atapi_kill_pending(struct scsipi_periph *periph)
161 {
162 struct wdc_softc *wdc =
163 (void *)periph->periph_channel->chan_adapter->adapt_dev;
164 struct wdc_channel *chp =
165 wdc->channels[periph->periph_channel->chan_channel];
166
167 wdc_kill_pending(chp);
168 }
169
170 static void
171 wdc_atapi_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
172 {
173 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
174
175 callout_stop(&chp->ch_callout);
176 /* remove this command from xfer queue */
177 wdc_free_xfer(chp, xfer);
178 sc_xfer->error = XS_DRIVER_STUFFUP;
179 scsipi_done(sc_xfer);
180 }
181
182 static int
183 wdc_atapi_get_params(struct scsipi_channel *chan, int drive,
184 struct ataparams *id)
185 {
186 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
187 struct wdc_channel *chp = wdc->channels[chan->chan_channel];
188 struct wdc_command wdc_c;
189
190 /* if no ATAPI device detected at wdc attach time, skip */
191 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) {
192 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n",
193 drive), DEBUG_PROBE);
194 return -1;
195 }
196
197 memset(&wdc_c, 0, sizeof(struct wdc_command));
198 wdc_c.r_command = ATAPI_SOFT_RESET;
199 wdc_c.r_st_bmask = 0;
200 wdc_c.r_st_pmask = 0;
201 wdc_c.flags = AT_POLL;
202 wdc_c.timeout = WDC_RESET_WAIT;
203 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) {
204 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for"
205 " drive %s:%d:%d: driver failed\n",
206 wdc->sc_dev.dv_xname, chp->ch_channel, drive);
207 panic("wdc_atapi_get_params");
208 }
209 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
210 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET "
211 "failed for drive %s:%d:%d: error 0x%x\n",
212 wdc->sc_dev.dv_xname, chp->ch_channel, drive,
213 wdc_c.r_error), DEBUG_PROBE);
214 return -1;
215 }
216 chp->ch_drive[drive].state = 0;
217
218 bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_status], 0);
219
220 /* Some ATAPI devices need a bit more time after software reset. */
221 delay(5000);
222 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) {
223 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE "
224 "failed for drive %s:%d:%d: error 0x%x\n",
225 wdc->sc_dev.dv_xname, chp->ch_channel, drive,
226 wdc_c.r_error), DEBUG_PROBE);
227 return -1;
228 }
229 return 0;
230 }
231
232 static void
233 wdc_atapi_probe_device(struct atapibus_softc *sc, int target)
234 {
235 struct scsipi_channel *chan = sc->sc_channel;
236 struct scsipi_periph *periph;
237 struct ataparams ids;
238 struct ataparams *id = &ids;
239 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
240 struct wdc_channel *chp = wdc->channels[chan->chan_channel];
241 struct ata_drive_datas *drvp = &chp->ch_drive[target];
242 struct scsipibus_attach_args sa;
243 char serial_number[21], model[41], firmware_revision[9];
244
245 /* skip if already attached */
246 if (scsipi_lookup_periph(chan, target, 0) != NULL)
247 return;
248
249 if (wdc_atapi_get_params(chan, target, id) == 0) {
250 #ifdef ATAPI_DEBUG_PROBE
251 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n",
252 sc->sc_dev.dv_xname, target,
253 id->atap_config & ATAPI_CFG_CMD_MASK,
254 id->atap_config & ATAPI_CFG_DRQ_MASK);
255 #endif
256 periph = scsipi_alloc_periph(M_NOWAIT);
257 if (periph == NULL) {
258 printf("%s: unable to allocate periph for drive %d\n",
259 sc->sc_dev.dv_xname, target);
260 return;
261 }
262 periph->periph_dev = NULL;
263 periph->periph_channel = chan;
264 periph->periph_switch = &atapi_probe_periphsw;
265 periph->periph_target = target;
266 periph->periph_lun = 0;
267 periph->periph_quirks = PQUIRK_ONLYBIG;
268
269 #ifdef SCSIPI_DEBUG
270 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI &&
271 SCSIPI_DEBUG_TARGET == target)
272 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS;
273 #endif
274 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config);
275 if (id->atap_config & ATAPI_CFG_REMOV)
276 periph->periph_flags |= PERIPH_REMOVABLE;
277 if (periph->periph_type == T_SEQUENTIAL)
278 drvp->drive_flags |= DRIVE_ATAPIST;
279
280 sa.sa_periph = periph;
281 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config);
282 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ?
283 T_REMOV : T_FIXED;
284 scsipi_strvis(model, 40, id->atap_model, 40);
285 scsipi_strvis(serial_number, 20, id->atap_serial, 20);
286 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8);
287 sa.sa_inqbuf.vendor = model;
288 sa.sa_inqbuf.product = serial_number;
289 sa.sa_inqbuf.revision = firmware_revision;
290
291 /*
292 * Determine the operating mode capabilities of the device.
293 */
294 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16)
295 periph->periph_cap |= PERIPH_CAP_CMD16;
296 /* XXX This is gross. */
297 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK);
298
299 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa);
300
301 if (drvp->drv_softc)
302 wdc_probe_caps(drvp);
303 else
304 drvp->drive_flags &= ~DRIVE_ATAPI;
305 }
306 }
307
308 static void
309 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
310 void *arg)
311 {
312 struct scsipi_adapter *adapt = chan->chan_adapter;
313 struct scsipi_periph *periph;
314 struct scsipi_xfer *sc_xfer;
315 struct wdc_softc *wdc = (void *)adapt->adapt_dev;
316 struct ata_xfer *xfer;
317 int channel = chan->chan_channel;
318 int drive, s;
319
320 switch (req) {
321 case ADAPTER_REQ_RUN_XFER:
322 sc_xfer = arg;
323 periph = sc_xfer->xs_periph;
324 drive = periph->periph_target;
325
326 WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n",
327 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS);
328 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
329 sc_xfer->error = XS_DRIVER_STUFFUP;
330 scsipi_done(sc_xfer);
331 return;
332 }
333
334 xfer = wdc_get_xfer(WDC_NOSLEEP);
335 if (xfer == NULL) {
336 sc_xfer->error = XS_RESOURCE_SHORTAGE;
337 scsipi_done(sc_xfer);
338 return;
339 }
340
341 if (sc_xfer->xs_control & XS_CTL_POLL)
342 xfer->c_flags |= C_POLL;
343 if ((wdc->channels[channel]->ch_drive[drive].drive_flags &
344 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0)
345 xfer->c_flags |= C_DMA;
346 xfer->c_drive = drive;
347 xfer->c_flags |= C_ATAPI;
348 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY ||
349 sc_xfer->cmd->opcode == GPCMD_SEND_KEY ||
350 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) {
351 /*
352 * DVD authentication commands must always be done in
353 * PIO mode.
354 */
355 xfer->c_flags &= ~C_DMA;
356 }
357 /*
358 * DMA can't deal with transfers which are not a multiple of
359 * 2 bytes. It's a bug to request such transfers for ATAPI
360 * but as the request can come from userland, we have to
361 * protect against it.
362 * Also some devices seems to not handle DMA xfers of less than
363 * 4 bytes.
364 */
365 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01))
366 xfer->c_flags &= ~C_DMA;
367
368 xfer->c_cmd = sc_xfer;
369 xfer->c_databuf = sc_xfer->data;
370 xfer->c_bcount = sc_xfer->datalen;
371 xfer->c_start = wdc_atapi_start;
372 xfer->c_intr = wdc_atapi_intr;
373 xfer->c_kill_xfer = wdc_atapi_kill_xfer;
374 xfer->c_dscpoll = 0;
375 s = splbio();
376 wdc_exec_xfer(wdc->channels[channel], xfer);
377 #ifdef DIAGNOSTIC
378 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 &&
379 (sc_xfer->xs_status & XS_STS_DONE) == 0)
380 panic("wdc_atapi_scsipi_request: polled command "
381 "not done");
382 #endif
383 splx(s);
384 return;
385
386 default:
387 /* Not supported, nothing to do. */
388 ;
389 }
390 }
391
392 static void
393 wdc_atapi_start(struct wdc_channel *chp, struct ata_xfer *xfer)
394 {
395 struct wdc_softc *wdc = chp->ch_wdc;
396 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
397 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
398 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0;
399 char *errstring;
400
401 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n",
402 wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive,
403 sc_xfer->xs_control), DEBUG_XFERS);
404 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER))
405 drvp->n_xfers++;
406 /* Do control operations specially. */
407 if (__predict_false(drvp->state < READY)) {
408 /* If it's not a polled command, we need the kenrel thread */
409 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 &&
410 (chp->ch_flags & WDCF_TH_RUN) == 0) {
411 chp->ch_queue->queue_freeze++;
412 wakeup(&chp->ch_thread);
413 return;
414 }
415 /*
416 * disable interrupts, all commands here should be quick
417 * enouth to be able to poll, and we don't go here that often
418 */
419 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
420 WDCTL_4BIT | WDCTL_IDS);
421 if (wdc->cap & WDC_CAPABILITY_SELECT)
422 wdc->select(chp, xfer->c_drive);
423 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
424 WDSD_IBM | (xfer->c_drive << 4));
425 /* Don't try to set mode if controller can't be adjusted */
426 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0)
427 goto ready;
428 /* Also don't try if the drive didn't report its mode */
429 if ((drvp->drive_flags & DRIVE_MODE) == 0)
430 goto ready;
431 errstring = "unbusy";
432 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags))
433 goto timeout;
434 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
435 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
436 errstring = "piomode";
437 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags))
438 goto timeout;
439 if (chp->ch_status & WDCS_ERR) {
440 if (chp->ch_error == WDCE_ABRT) {
441 /*
442 * some ATAPI drives rejects pio settings.
443 * all we can do here is fall back to PIO 0
444 */
445 drvp->drive_flags &= ~DRIVE_MODE;
446 drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA);
447 drvp->PIO_mode = 0;
448 drvp->DMA_mode = 0;
449 printf("%s:%d:%d: pio setting rejected, "
450 "falling back to PIO mode 0\n",
451 wdc->sc_dev.dv_xname,
452 chp->ch_channel, xfer->c_drive);
453 wdc->set_modes(chp);
454 goto ready;
455 }
456 goto error;
457 }
458 if (drvp->drive_flags & DRIVE_UDMA) {
459 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
460 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
461 } else if (drvp->drive_flags & DRIVE_DMA) {
462 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
463 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
464 } else {
465 goto ready;
466 }
467 errstring = "dmamode";
468 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags))
469 goto timeout;
470 if (chp->ch_status & WDCS_ERR)
471 goto error;
472 ready:
473 drvp->state = READY;
474 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
475 WDCTL_4BIT);
476 }
477 /* start timeout machinery */
478 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0)
479 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout),
480 wdctimeout, chp);
481
482 if (wdc->cap & WDC_CAPABILITY_SELECT)
483 wdc->select(chp, xfer->c_drive);
484 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
485 WDSD_IBM | (xfer->c_drive << 4));
486 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) {
487 case WDCWAIT_OK:
488 break;
489 case WDCWAIT_TOUT:
490 printf("wdc_atapi_start: not ready, st = %02x\n",
491 chp->ch_status);
492 sc_xfer->error = XS_TIMEOUT;
493 wdc_atapi_reset(chp, xfer);
494 return;
495 case WDCWAIT_THR:
496 return;
497 }
498
499 /*
500 * Even with WDCS_ERR, the device should accept a command packet
501 * Limit length to what can be stuffed into the cylinder register
502 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536,
503 * but not all devices do that and it's not obvious from the
504 * ATAPI spec that that behaviour should be expected. If more
505 * data is necessary, multiple data transfer phases will be done.
506 */
507
508 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD,
509 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff,
510 0, 0, 0,
511 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0);
512
513 /*
514 * If there is no interrupt for CMD input, busy-wait for it (done in
515 * the interrupt routine. If it is a polled command, call the interrupt
516 * routine until command is done.
517 */
518 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) !=
519 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) {
520 /* Wait for at last 400ns for status bit to be valid */
521 DELAY(1);
522 if (chp->ch_flags & WDCF_DMA_WAIT) {
523 wdc_dmawait(chp, xfer, sc_xfer->timeout);
524 chp->ch_flags &= ~WDCF_DMA_WAIT;
525 }
526 wdc_atapi_intr(chp, xfer, 0);
527 } else {
528 chp->ch_flags |= WDCF_IRQ_WAIT;
529 }
530 if (sc_xfer->xs_control & XS_CTL_POLL) {
531 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) {
532 /* Wait for at last 400ns for status bit to be valid */
533 DELAY(1);
534 wdc_atapi_intr(chp, xfer, 0);
535 }
536 }
537 return;
538 timeout:
539 printf("%s:%d:%d: %s timed out\n",
540 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
541 errstring);
542 sc_xfer->error = XS_TIMEOUT;
543 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
544 wdc_atapi_reset(chp, xfer);
545 return;
546 error:
547 printf("%s:%d:%d: %s ",
548 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
549 errstring);
550 printf("error (0x%x)\n", chp->ch_error);
551 sc_xfer->error = XS_SHORTSENSE;
552 sc_xfer->sense.atapi_sense = chp->ch_error;
553 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
554 wdc_atapi_reset(chp, xfer);
555 return;
556 }
557
558 static int
559 wdc_atapi_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq)
560 {
561 struct wdc_softc *wdc = chp->ch_wdc;
562 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
563 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
564 int len, phase, i, retries=0;
565 int ire;
566 int dma_flags = 0;
567 void *cmd;
568
569 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n",
570 wdc->sc_dev.dv_xname, chp->ch_channel, drvp->drive),
571 DEBUG_INTR);
572
573 /* Is it not a transfer, but a control operation? */
574 if (drvp->state < READY) {
575 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n",
576 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
577 drvp->state);
578 panic("wdc_atapi_intr: bad state");
579 }
580 /*
581 * If we missed an interrupt in a PIO transfer, reset and restart.
582 * Don't try to continue transfer, we may have missed cycles.
583 */
584 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
585 sc_xfer->error = XS_TIMEOUT;
586 wdc_atapi_reset(chp, xfer);
587 return 1;
588 }
589
590 /* Ack interrupt done in wdc_wait_for_unbusy */
591 if (wdc->cap & WDC_CAPABILITY_SELECT)
592 wdc->select(chp, xfer->c_drive);
593 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
594 WDSD_IBM | (xfer->c_drive << 4));
595 if (wdc_wait_for_unbusy(chp,
596 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) {
597 if (irq && (xfer->c_flags & C_TIMEOU) == 0)
598 return 0; /* IRQ was not for us */
599 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n",
600 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
601 xfer->c_bcount, xfer->c_skip);
602 if (xfer->c_flags & C_DMA) {
603 ata_dmaerr(drvp,
604 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
605 }
606 sc_xfer->error = XS_TIMEOUT;
607 wdc_atapi_reset(chp, xfer);
608 return 1;
609 }
610 if (wdc->cap & WDC_CAPABILITY_IRQACK)
611 wdc->irqack(chp);
612
613 /*
614 * If we missed an IRQ and were using DMA, flag it as a DMA error
615 * and reset device.
616 */
617 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) {
618 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0);
619 sc_xfer->error = XS_RESET;
620 wdc_atapi_reset(chp, xfer);
621 return (1);
622 }
623 /*
624 * if the request sense command was aborted, report the short sense
625 * previously recorded, else continue normal processing
626 */
627
628 if (xfer->c_flags & C_DMA)
629 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN)
630 ? WDC_DMA_READ : 0;
631 again:
632 len = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_lo], 0) +
633 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_hi], 0);
634 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_ireason], 0);
635 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ);
636 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x "
637 "ire 0x%x :", xfer->c_bcount,
638 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR);
639
640 switch (phase) {
641 case PHASE_CMDOUT:
642 cmd = sc_xfer->cmd;
643 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR);
644 /* Init the DMA channel if necessary */
645 if (xfer->c_flags & C_DMA) {
646 if ((*wdc->dma_init)(wdc->dma_arg,
647 chp->ch_channel, xfer->c_drive,
648 xfer->c_databuf, xfer->c_bcount, dma_flags) != 0) {
649 sc_xfer->error = XS_DRIVER_STUFFUP;
650 break;
651 }
652 }
653 /* send packet command */
654 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */
655 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
656 if (drvp->drive_flags & DRIVE_CAP32)
657 bus_space_write_multi_4(chp->data32iot,
658 chp->data32ioh, 0, (u_int32_t *)cmd,
659 sc_xfer->cmdlen >> 2);
660 else
661 bus_space_write_multi_2(chp->cmd_iot,
662 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd,
663 sc_xfer->cmdlen >> 1);
664 } else {
665 if (drvp->drive_flags & DRIVE_CAP32)
666 bus_space_write_multi_stream_4(chp->data32iot,
667 chp->data32ioh, 0, (u_int32_t *)cmd,
668 sc_xfer->cmdlen >> 2);
669 else
670 bus_space_write_multi_stream_2(chp->cmd_iot,
671 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd,
672 sc_xfer->cmdlen >> 1);
673 }
674 /* Start the DMA channel if necessary */
675 if (xfer->c_flags & C_DMA) {
676 (*wdc->dma_start)(wdc->dma_arg,
677 chp->ch_channel, xfer->c_drive);
678 chp->ch_flags |= WDCF_DMA_WAIT;
679 }
680
681 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
682 chp->ch_flags |= WDCF_IRQ_WAIT;
683 }
684 return 1;
685
686 case PHASE_DATAOUT:
687 /* write data */
688 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR);
689 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
690 (xfer->c_flags & C_DMA) != 0) {
691 printf("wdc_atapi_intr: bad data phase DATAOUT\n");
692 if (xfer->c_flags & C_DMA) {
693 ata_dmaerr(drvp,
694 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
695 }
696 sc_xfer->error = XS_TIMEOUT;
697 wdc_atapi_reset(chp, xfer);
698 return 1;
699 }
700 if (xfer->c_bcount < len) {
701 printf("wdc_atapi_intr: warning: write only "
702 "%d of %d requested bytes\n", xfer->c_bcount, len);
703 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
704 bus_space_write_multi_2(chp->cmd_iot,
705 chp->cmd_iohs[wd_data], 0,
706 (u_int16_t *)((char *)xfer->c_databuf +
707 xfer->c_skip),
708 xfer->c_bcount >> 1);
709 } else {
710 bus_space_write_multi_stream_2(chp->cmd_iot,
711 chp->cmd_iohs[wd_data], 0,
712 (u_int16_t *)((char *)xfer->c_databuf +
713 xfer->c_skip),
714 xfer->c_bcount >> 1);
715 }
716 for (i = xfer->c_bcount; i < len; i += 2)
717 bus_space_write_2(chp->cmd_iot,
718 chp->cmd_iohs[wd_data], 0, 0);
719 xfer->c_skip += xfer->c_bcount;
720 xfer->c_bcount = 0;
721 } else {
722 if (drvp->drive_flags & DRIVE_CAP32) {
723 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
724 bus_space_write_multi_4(chp->data32iot,
725 chp->data32ioh, 0,
726 (u_int32_t *)((char *)xfer->c_databuf +
727 xfer->c_skip),
728 len >> 2);
729 else
730 bus_space_write_multi_stream_4(chp->data32iot,
731 chp->data32ioh, wd_data,
732 (u_int32_t *)((char *)xfer->c_databuf +
733 xfer->c_skip),
734 len >> 2);
735
736 xfer->c_skip += len & 0xfffffffc;
737 xfer->c_bcount -= len & 0xfffffffc;
738 len = len & 0x03;
739 }
740 if (len > 0) {
741 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
742 bus_space_write_multi_2(chp->cmd_iot,
743 chp->cmd_iohs[wd_data], 0,
744 (u_int16_t *)((char *)xfer->c_databuf +
745 xfer->c_skip),
746 len >> 1);
747 else
748 bus_space_write_multi_stream_2(chp->cmd_iot,
749 chp->cmd_iohs[wd_data], 0,
750 (u_int16_t *)((char *)xfer->c_databuf +
751 xfer->c_skip),
752 len >> 1);
753 xfer->c_skip += len;
754 xfer->c_bcount -= len;
755 }
756 }
757 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
758 chp->ch_flags |= WDCF_IRQ_WAIT;
759 }
760 return 1;
761
762 case PHASE_DATAIN:
763 /* Read data */
764 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR);
765 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 ||
766 (xfer->c_flags & C_DMA) != 0) {
767 printf("wdc_atapi_intr: bad data phase DATAIN\n");
768 if (xfer->c_flags & C_DMA) {
769 ata_dmaerr(drvp,
770 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
771 }
772 sc_xfer->error = XS_TIMEOUT;
773 wdc_atapi_reset(chp, xfer);
774 return 1;
775 }
776 if (xfer->c_bcount < len) {
777 printf("wdc_atapi_intr: warning: reading only "
778 "%d of %d bytes\n", xfer->c_bcount, len);
779 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
780 bus_space_read_multi_2(chp->cmd_iot,
781 chp->cmd_iohs[wd_data], 0,
782 (u_int16_t *)((char *)xfer->c_databuf +
783 xfer->c_skip),
784 xfer->c_bcount >> 1);
785 } else {
786 bus_space_read_multi_stream_2(chp->cmd_iot,
787 chp->cmd_iohs[wd_data], 0,
788 (u_int16_t *)((char *)xfer->c_databuf +
789 xfer->c_skip),
790 xfer->c_bcount >> 1);
791 }
792 wdcbit_bucket(chp, len - xfer->c_bcount);
793 xfer->c_skip += xfer->c_bcount;
794 xfer->c_bcount = 0;
795 } else {
796 if (drvp->drive_flags & DRIVE_CAP32) {
797 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
798 bus_space_read_multi_4(chp->data32iot,
799 chp->data32ioh, 0,
800 (u_int32_t *)((char *)xfer->c_databuf +
801 xfer->c_skip),
802 len >> 2);
803 else
804 bus_space_read_multi_stream_4(chp->data32iot,
805 chp->data32ioh, wd_data,
806 (u_int32_t *)((char *)xfer->c_databuf +
807 xfer->c_skip),
808 len >> 2);
809
810 xfer->c_skip += len & 0xfffffffc;
811 xfer->c_bcount -= len & 0xfffffffc;
812 len = len & 0x03;
813 }
814 if (len > 0) {
815 if ((wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
816 bus_space_read_multi_2(chp->cmd_iot,
817 chp->cmd_iohs[wd_data], 0,
818 (u_int16_t *)((char *)xfer->c_databuf +
819 xfer->c_skip),
820 len >> 1);
821 else
822 bus_space_read_multi_stream_2(chp->cmd_iot,
823 chp->cmd_iohs[wd_data], 0,
824 (u_int16_t *)((char *)xfer->c_databuf +
825 xfer->c_skip),
826 len >> 1);
827 xfer->c_skip += len;
828 xfer->c_bcount -=len;
829 }
830 }
831 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
832 chp->ch_flags |= WDCF_IRQ_WAIT;
833 }
834 return 1;
835
836 case PHASE_ABORTED:
837 case PHASE_COMPLETED:
838 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR);
839 if (xfer->c_flags & C_DMA) {
840 xfer->c_bcount -= sc_xfer->datalen;
841 }
842 sc_xfer->resid = xfer->c_bcount;
843 wdc_atapi_phase_complete(xfer);
844 return(1);
845
846 default:
847 if (++retries<500) {
848 DELAY(100);
849 chp->ch_status = bus_space_read_1(chp->cmd_iot,
850 chp->cmd_iohs[wd_status], 0);
851 chp->ch_error = bus_space_read_1(chp->cmd_iot,
852 chp->cmd_iohs[wd_error], 0);
853 goto again;
854 }
855 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase);
856 if (chp->ch_status & WDCS_ERR) {
857 sc_xfer->error = XS_SHORTSENSE;
858 sc_xfer->sense.atapi_sense = chp->ch_error;
859 } else {
860 if (xfer->c_flags & C_DMA) {
861 ata_dmaerr(drvp,
862 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
863 }
864 sc_xfer->error = XS_RESET;
865 wdc_atapi_reset(chp, xfer);
866 return (1);
867 }
868 }
869 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x "
870 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense),
871 DEBUG_INTR);
872 wdc_atapi_done(chp, xfer);
873 return (1);
874 }
875
876 static void
877 wdc_atapi_phase_complete(struct ata_xfer *xfer)
878 {
879 struct wdc_channel *chp = xfer->c_chp;
880 struct wdc_softc *wdc = chp->ch_wdc;
881 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
882 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
883
884 /* wait for DSC if needed */
885 if (drvp->drive_flags & DRIVE_ATAPIST) {
886 WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) "
887 "polldsc %d\n", wdc->sc_dev.dv_xname, chp->ch_channel,
888 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS);
889 #if 1
890 if (cold)
891 panic("wdc_atapi_phase_complete: cold");
892 #endif
893 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10,
894 AT_POLL) == WDCWAIT_TOUT) {
895 /* 10ms not enough, try again in 1 tick */
896 if (xfer->c_dscpoll++ >
897 mstohz(sc_xfer->timeout)) {
898 printf("%s:%d:%d: wait_for_dsc "
899 "failed\n",
900 wdc->sc_dev.dv_xname,
901 chp->ch_channel, xfer->c_drive);
902 sc_xfer->error = XS_TIMEOUT;
903 wdc_atapi_reset(chp, xfer);
904 return;
905 } else
906 callout_reset(&chp->ch_callout, 1,
907 wdc_atapi_polldsc, xfer);
908 return;
909 }
910 }
911
912 /*
913 * Some drive occasionally set WDCS_ERR with
914 * "ATA illegal length indication" in the error
915 * register. If we read some data the sense is valid
916 * anyway, so don't report the error.
917 */
918 if (chp->ch_status & WDCS_ERR &&
919 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 ||
920 sc_xfer->resid == sc_xfer->datalen)) {
921 /* save the short sense */
922 sc_xfer->error = XS_SHORTSENSE;
923 sc_xfer->sense.atapi_sense = chp->ch_error;
924 if ((sc_xfer->xs_periph->periph_quirks &
925 PQUIRK_NOSENSE) == 0) {
926 /* ask scsipi to send a REQUEST_SENSE */
927 sc_xfer->error = XS_BUSY;
928 sc_xfer->status = SCSI_CHECK;
929 } else if (wdc->dma_status &
930 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) {
931 ata_dmaerr(drvp,
932 (xfer->c_flags & C_POLL) ? AT_POLL : 0);
933 sc_xfer->error = XS_RESET;
934 wdc_atapi_reset(chp, xfer);
935 return;
936 }
937 }
938 if (xfer->c_bcount != 0) {
939 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is "
940 "%d after io\n", xfer->c_bcount), DEBUG_XFERS);
941 }
942 #ifdef DIAGNOSTIC
943 if (xfer->c_bcount < 0) {
944 printf("wdc_atapi_intr warning: bcount value "
945 "is %d after io\n", xfer->c_bcount);
946 }
947 #endif
948 WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), "
949 "error 0x%x sense 0x%x\n", sc_xfer->error,
950 sc_xfer->sense.atapi_sense), DEBUG_INTR);
951 wdc_atapi_done(chp, xfer);
952 }
953
954 static void
955 wdc_atapi_done(struct wdc_channel *chp, struct ata_xfer *xfer)
956 {
957 struct wdc_softc *wdc = chp->ch_wdc;
958 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
959
960 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n",
961 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
962 (u_int)xfer->c_flags), DEBUG_XFERS);
963 callout_stop(&chp->ch_callout);
964 /* remove this command from xfer queue */
965 wdc_free_xfer(chp, xfer);
966
967 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS);
968 scsipi_done(sc_xfer);
969 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n",
970 chp->ch_flags), DEBUG_XFERS);
971 wdcstart(chp);
972 }
973
974 static void
975 wdc_atapi_reset(struct wdc_channel *chp, struct ata_xfer *xfer)
976 {
977 struct wdc_softc *wdc = chp->ch_wdc;
978 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
979 struct scsipi_xfer *sc_xfer = xfer->c_cmd;
980
981 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET);
982 drvp->state = 0;
983 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) {
984 printf("%s:%d:%d: reset failed\n",
985 wdc->sc_dev.dv_xname, chp->ch_channel,
986 xfer->c_drive);
987 sc_xfer->error = XS_SELTIMEOUT;
988 }
989 wdc_atapi_done(chp, xfer);
990 return;
991 }
992
993 static void
994 wdc_atapi_polldsc(void *arg)
995 {
996
997 wdc_atapi_phase_complete(arg);
998 }
999