atapi_wdc.c revision 1.99
1 /* $NetBSD: atapi_wdc.c,v 1.99 2006/05/21 23:56:09 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.99 2006/05/21 23:56:09 christos Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/file.h> 43 #include <sys/stat.h> 44 #include <sys/buf.h> 45 #include <sys/malloc.h> 46 #include <sys/device.h> 47 #include <sys/syslog.h> 48 #include <sys/proc.h> 49 #include <sys/dvdio.h> 50 51 #include <machine/intr.h> 52 #include <machine/bus.h> 53 54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 60 61 #include <dev/ata/atareg.h> 62 #include <dev/ata/atavar.h> 63 #include <dev/ic/wdcreg.h> 64 #include <dev/ic/wdcvar.h> 65 66 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 67 68 #define DEBUG_INTR 0x01 69 #define DEBUG_XFERS 0x02 70 #define DEBUG_STATUS 0x04 71 #define DEBUG_FUNCS 0x08 72 #define DEBUG_PROBE 0x10 73 #ifdef ATADEBUG 74 int wdcdebug_atapi_mask = 0; 75 #define ATADEBUG_PRINT(args, level) \ 76 if (wdcdebug_atapi_mask & (level)) \ 77 printf args 78 #else 79 #define ATADEBUG_PRINT(args, level) 80 #endif 81 82 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 83 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 84 85 static int wdc_atapi_get_params(struct scsipi_channel *, int, 86 struct ataparams *); 87 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 88 static void wdc_atapi_minphys (struct buf *bp); 89 static void wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 90 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 91 static void wdc_atapi_kill_xfer(struct ata_channel *, 92 struct ata_xfer *, int); 93 static void wdc_atapi_phase_complete(struct ata_xfer *); 94 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 95 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 96 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 97 scsipi_adapter_req_t, void *); 98 static void wdc_atapi_kill_pending(struct scsipi_periph *); 99 static void wdc_atapi_polldsc(void *arg); 100 101 #define MAX_SIZE MAXPHYS 102 103 static const struct scsipi_bustype wdc_atapi_bustype = { 104 SCSIPI_BUSTYPE_ATAPI, 105 atapi_scsipi_cmd, 106 atapi_interpret_sense, 107 atapi_print_addr, 108 wdc_atapi_kill_pending, 109 }; 110 111 void 112 wdc_atapibus_attach(struct atabus_softc *ata_sc) 113 { 114 struct ata_channel *chp = ata_sc->sc_chan; 115 struct atac_softc *atac = chp->ch_atac; 116 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 117 struct scsipi_channel *chan = &chp->ch_atapi_channel; 118 119 /* 120 * Fill in the scsipi_adapter. 121 */ 122 adapt->adapt_dev = &atac->atac_dev; 123 adapt->adapt_nchannels = atac->atac_nchannels; 124 adapt->adapt_request = wdc_atapi_scsipi_request; 125 adapt->adapt_minphys = wdc_atapi_minphys; 126 if (atac->atac_cap & ATAC_CAP_NOIRQ) 127 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 128 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 129 130 /* 131 * Fill in the scsipi_channel. 132 */ 133 memset(chan, 0, sizeof(*chan)); 134 chan->chan_adapter = adapt; 135 chan->chan_bustype = &wdc_atapi_bustype; 136 chan->chan_channel = chp->ch_channel; 137 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 138 chan->chan_openings = 1; 139 chan->chan_max_periph = 1; 140 chan->chan_ntargets = 2; 141 chan->chan_nluns = 1; 142 143 chp->atapibus = config_found_ia(&ata_sc->sc_dev, "atapi", chan, 144 atapiprint); 145 } 146 147 static void 148 wdc_atapi_minphys(struct buf *bp) 149 { 150 151 if (bp->b_bcount > MAX_SIZE) 152 bp->b_bcount = MAX_SIZE; 153 minphys(bp); 154 } 155 156 /* 157 * Kill off all pending xfers for a periph. 158 * 159 * Must be called at splbio(). 160 */ 161 static void 162 wdc_atapi_kill_pending(struct scsipi_periph *periph) 163 { 164 struct atac_softc *atac = 165 (void *)periph->periph_channel->chan_adapter->adapt_dev; 166 struct ata_channel *chp = 167 atac->atac_channels[periph->periph_channel->chan_channel]; 168 169 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 170 } 171 172 static void 173 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 174 { 175 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 176 177 /* remove this command from xfer queue */ 178 switch (reason) { 179 case KILL_GONE: 180 sc_xfer->error = XS_DRIVER_STUFFUP; 181 break; 182 case KILL_RESET: 183 sc_xfer->error = XS_RESET; 184 break; 185 default: 186 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 187 reason); 188 panic("wdc_ata_bio_kill_xfer"); 189 } 190 ata_free_xfer(chp, xfer); 191 scsipi_done(sc_xfer); 192 } 193 194 static int 195 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 196 struct ataparams *id) 197 { 198 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 199 struct atac_softc *atac = &wdc->sc_atac; 200 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 201 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 202 struct ata_command ata_c; 203 204 /* if no ATAPI device detected at wdc attach time, skip */ 205 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 206 ATADEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 207 drive), DEBUG_PROBE); 208 return -1; 209 } 210 211 memset(&ata_c, 0, sizeof(struct ata_command)); 212 ata_c.r_command = ATAPI_SOFT_RESET; 213 ata_c.r_st_bmask = 0; 214 ata_c.r_st_pmask = 0; 215 ata_c.flags = AT_WAIT | AT_POLL; 216 ata_c.timeout = WDC_RESET_WAIT; 217 if (wdc_exec_command(&chp->ch_drive[drive], &ata_c) != ATACMD_COMPLETE) { 218 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 219 " drive %s:%d:%d: driver failed\n", 220 atac->atac_dev.dv_xname, chp->ch_channel, drive); 221 panic("wdc_atapi_get_params"); 222 } 223 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 224 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 225 "failed for drive %s:%d:%d: error 0x%x\n", 226 atac->atac_dev.dv_xname, chp->ch_channel, drive, 227 ata_c.r_error), DEBUG_PROBE); 228 return -1; 229 } 230 chp->ch_drive[drive].state = 0; 231 232 (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 233 234 /* Some ATAPI devices need a bit more time after software reset. */ 235 delay(5000); 236 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 237 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 238 "failed for drive %s:%d:%d: error 0x%x\n", 239 atac->atac_dev.dv_xname, chp->ch_channel, drive, 240 ata_c.r_error), DEBUG_PROBE); 241 return -1; 242 } 243 return 0; 244 } 245 246 static void 247 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 248 { 249 struct scsipi_channel *chan = sc->sc_channel; 250 struct scsipi_periph *periph; 251 struct ataparams ids; 252 struct ataparams *id = &ids; 253 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 254 struct atac_softc *atac = &wdc->sc_atac; 255 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 256 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 257 struct scsipibus_attach_args sa; 258 char serial_number[21], model[41], firmware_revision[9]; 259 int s; 260 261 /* skip if already attached */ 262 if (scsipi_lookup_periph(chan, target, 0) != NULL) 263 return; 264 265 if (wdc_atapi_get_params(chan, target, id) == 0) { 266 #ifdef ATAPI_DEBUG_PROBE 267 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 268 sc->sc_dev.dv_xname, target, 269 id->atap_config & ATAPI_CFG_CMD_MASK, 270 id->atap_config & ATAPI_CFG_DRQ_MASK); 271 #endif 272 periph = scsipi_alloc_periph(M_NOWAIT); 273 if (periph == NULL) { 274 printf("%s: unable to allocate periph for drive %d\n", 275 sc->sc_dev.dv_xname, target); 276 return; 277 } 278 periph->periph_dev = NULL; 279 periph->periph_channel = chan; 280 periph->periph_switch = &atapi_probe_periphsw; 281 periph->periph_target = target; 282 periph->periph_lun = 0; 283 periph->periph_quirks = PQUIRK_ONLYBIG; 284 285 #ifdef SCSIPI_DEBUG 286 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 287 SCSIPI_DEBUG_TARGET == target) 288 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 289 #endif 290 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 291 if (id->atap_config & ATAPI_CFG_REMOV) 292 periph->periph_flags |= PERIPH_REMOVABLE; 293 if (periph->periph_type == T_SEQUENTIAL) { 294 s = splbio(); 295 drvp->drive_flags |= DRIVE_ATAPIST; 296 splx(s); 297 } 298 299 sa.sa_periph = periph; 300 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 301 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 302 T_REMOV : T_FIXED; 303 scsipi_strvis(model, 40, id->atap_model, 40); 304 scsipi_strvis(serial_number, 20, id->atap_serial, 20); 305 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8); 306 sa.sa_inqbuf.vendor = model; 307 sa.sa_inqbuf.product = serial_number; 308 sa.sa_inqbuf.revision = firmware_revision; 309 310 /* 311 * Determine the operating mode capabilities of the device. 312 */ 313 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 314 periph->periph_cap |= PERIPH_CAP_CMD16; 315 /* XXX This is gross. */ 316 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 317 318 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 319 320 if (drvp->drv_softc) 321 ata_probe_caps(drvp); 322 else { 323 s = splbio(); 324 drvp->drive_flags &= ~DRIVE_ATAPI; 325 splx(s); 326 } 327 } else { 328 s = splbio(); 329 drvp->drive_flags &= ~DRIVE_ATAPI; 330 splx(s); 331 } 332 } 333 334 static void 335 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 336 void *arg) 337 { 338 struct scsipi_adapter *adapt = chan->chan_adapter; 339 struct scsipi_periph *periph; 340 struct scsipi_xfer *sc_xfer; 341 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 342 struct atac_softc *atac = &wdc->sc_atac; 343 struct ata_xfer *xfer; 344 int channel = chan->chan_channel; 345 int drive, s; 346 347 switch (req) { 348 case ADAPTER_REQ_RUN_XFER: 349 sc_xfer = arg; 350 periph = sc_xfer->xs_periph; 351 drive = periph->periph_target; 352 353 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 354 atac->atac_dev.dv_xname, channel, drive), DEBUG_XFERS); 355 if (!device_is_active(&atac->atac_dev)) { 356 sc_xfer->error = XS_DRIVER_STUFFUP; 357 scsipi_done(sc_xfer); 358 return; 359 } 360 361 xfer = ata_get_xfer(ATAXF_NOSLEEP); 362 if (xfer == NULL) { 363 sc_xfer->error = XS_RESOURCE_SHORTAGE; 364 scsipi_done(sc_xfer); 365 return; 366 } 367 368 if (sc_xfer->xs_control & XS_CTL_POLL) 369 xfer->c_flags |= C_POLL; 370 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 371 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 372 xfer->c_flags |= C_DMA; 373 xfer->c_drive = drive; 374 xfer->c_flags |= C_ATAPI; 375 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 376 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 377 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 378 /* 379 * DVD authentication commands must always be done in 380 * PIO mode. 381 */ 382 xfer->c_flags &= ~C_DMA; 383 } 384 /* 385 * DMA can't deal with transfers which are not a multiple of 386 * 2 bytes. It's a bug to request such transfers for ATAPI 387 * but as the request can come from userland, we have to 388 * protect against it. 389 * Also some devices seems to not handle DMA xfers of less than 390 * 4 bytes. 391 */ 392 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01)) 393 xfer->c_flags &= ~C_DMA; 394 395 xfer->c_cmd = sc_xfer; 396 xfer->c_databuf = sc_xfer->data; 397 xfer->c_bcount = sc_xfer->datalen; 398 xfer->c_start = wdc_atapi_start; 399 xfer->c_intr = wdc_atapi_intr; 400 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 401 xfer->c_dscpoll = 0; 402 s = splbio(); 403 ata_exec_xfer(atac->atac_channels[channel], xfer); 404 #ifdef DIAGNOSTIC 405 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 406 (sc_xfer->xs_status & XS_STS_DONE) == 0) 407 panic("wdc_atapi_scsipi_request: polled command " 408 "not done"); 409 #endif 410 splx(s); 411 return; 412 413 default: 414 /* Not supported, nothing to do. */ 415 ; 416 } 417 } 418 419 static void 420 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 421 { 422 struct atac_softc *atac = chp->ch_atac; 423 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 424 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 425 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 426 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 427 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 428 const char *errstring; 429 430 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 431 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive, 432 sc_xfer->xs_control), DEBUG_XFERS); 433 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 434 drvp->n_xfers++; 435 /* Do control operations specially. */ 436 if (__predict_false(drvp->state < READY)) { 437 /* If it's not a polled command, we need the kernel thread */ 438 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 439 (chp->ch_flags & ATACH_TH_RUN) == 0) { 440 chp->ch_queue->queue_freeze++; 441 wakeup(&chp->ch_thread); 442 return; 443 } 444 /* 445 * disable interrupts, all commands here should be quick 446 * enouth to be able to poll, and we don't go here that often 447 */ 448 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 449 WDCTL_4BIT | WDCTL_IDS); 450 if (wdc->select) 451 wdc->select(chp, xfer->c_drive); 452 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 453 WDSD_IBM | (xfer->c_drive << 4)); 454 /* Don't try to set mode if controller can't be adjusted */ 455 if (atac->atac_set_modes == NULL) 456 goto ready; 457 /* Also don't try if the drive didn't report its mode */ 458 if ((drvp->drive_flags & DRIVE_MODE) == 0) 459 goto ready; 460 errstring = "unbusy"; 461 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 462 goto timeout; 463 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 464 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 465 errstring = "piomode"; 466 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 467 goto timeout; 468 if (chp->ch_status & WDCS_ERR) { 469 if (chp->ch_error == WDCE_ABRT) { 470 /* 471 * Some ATAPI drives reject PIO settings. 472 * Fall back to PIO mode 3 since that's the 473 * minimum for ATAPI. 474 */ 475 printf("%s:%d:%d: PIO mode %d rejected, " 476 "falling back to PIO mode 3\n", 477 atac->atac_dev.dv_xname, 478 chp->ch_channel, xfer->c_drive, 479 drvp->PIO_mode); 480 if (drvp->PIO_mode > 3) 481 drvp->PIO_mode = 3; 482 } else 483 goto error; 484 } 485 if (drvp->drive_flags & DRIVE_UDMA) { 486 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 487 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 488 } else if (drvp->drive_flags & DRIVE_DMA) { 489 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 490 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 491 } else { 492 goto ready; 493 } 494 errstring = "dmamode"; 495 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 496 goto timeout; 497 if (chp->ch_status & WDCS_ERR) { 498 if (chp->ch_error == WDCE_ABRT) { 499 if (drvp->drive_flags & DRIVE_UDMA) 500 goto error; 501 else { 502 /* 503 * The drive rejected our DMA setting. 504 * Fall back to mode 1. 505 */ 506 printf("%s:%d:%d: DMA mode %d rejected, " 507 "falling back to DMA mode 0\n", 508 atac->atac_dev.dv_xname, 509 chp->ch_channel, xfer->c_drive, 510 drvp->DMA_mode); 511 if (drvp->DMA_mode > 0) 512 drvp->DMA_mode = 0; 513 } 514 } else 515 goto error; 516 } 517 ready: 518 drvp->state = READY; 519 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 520 WDCTL_4BIT); 521 delay(10); /* some drives need a little delay here */ 522 } 523 /* start timeout machinery */ 524 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 525 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 526 wdctimeout, chp); 527 528 if (wdc->select) 529 wdc->select(chp, xfer->c_drive); 530 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 531 WDSD_IBM | (xfer->c_drive << 4)); 532 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) { 533 case WDCWAIT_OK: 534 break; 535 case WDCWAIT_TOUT: 536 printf("wdc_atapi_start: not ready, st = %02x\n", 537 chp->ch_status); 538 sc_xfer->error = XS_TIMEOUT; 539 wdc_atapi_reset(chp, xfer); 540 return; 541 case WDCWAIT_THR: 542 return; 543 } 544 545 /* 546 * Even with WDCS_ERR, the device should accept a command packet 547 * Limit length to what can be stuffed into the cylinder register 548 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 549 * but not all devices do that and it's not obvious from the 550 * ATAPI spec that that behaviour should be expected. If more 551 * data is necessary, multiple data transfer phases will be done. 552 */ 553 554 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 555 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 556 0, 0, 0, 557 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 558 559 /* 560 * If there is no interrupt for CMD input, busy-wait for it (done in 561 * the interrupt routine. If it is a polled command, call the interrupt 562 * routine until command is done. 563 */ 564 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 565 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 566 /* Wait for at last 400ns for status bit to be valid */ 567 DELAY(1); 568 wdc_atapi_intr(chp, xfer, 0); 569 } else { 570 chp->ch_flags |= ATACH_IRQ_WAIT; 571 } 572 if (sc_xfer->xs_control & XS_CTL_POLL) { 573 if (chp->ch_flags & ATACH_DMA_WAIT) { 574 wdc_dmawait(chp, xfer, sc_xfer->timeout); 575 chp->ch_flags &= ~ATACH_DMA_WAIT; 576 } 577 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 578 /* Wait for at last 400ns for status bit to be valid */ 579 DELAY(1); 580 wdc_atapi_intr(chp, xfer, 0); 581 } 582 } 583 return; 584 timeout: 585 printf("%s:%d:%d: %s timed out\n", 586 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 587 errstring); 588 sc_xfer->error = XS_TIMEOUT; 589 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 590 delay(10); /* some drives need a little delay here */ 591 wdc_atapi_reset(chp, xfer); 592 return; 593 error: 594 printf("%s:%d:%d: %s ", 595 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 596 errstring); 597 printf("error (0x%x)\n", chp->ch_error); 598 sc_xfer->error = XS_SHORTSENSE; 599 sc_xfer->sense.atapi_sense = chp->ch_error; 600 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 601 delay(10); /* some drives need a little delay here */ 602 wdc_atapi_reset(chp, xfer); 603 return; 604 } 605 606 static int 607 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 608 { 609 struct atac_softc *atac = chp->ch_atac; 610 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 611 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 612 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 613 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 614 int len, phase, i, retries=0; 615 int ire, error; 616 int dma_flags = 0; 617 void *cmd; 618 619 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 620 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive), 621 DEBUG_INTR); 622 623 /* Is it not a transfer, but a control operation? */ 624 if (drvp->state < READY) { 625 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 626 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 627 drvp->state); 628 panic("wdc_atapi_intr: bad state"); 629 } 630 /* 631 * If we missed an interrupt in a PIO transfer, reset and restart. 632 * Don't try to continue transfer, we may have missed cycles. 633 */ 634 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 635 sc_xfer->error = XS_TIMEOUT; 636 wdc_atapi_reset(chp, xfer); 637 return 1; 638 } 639 640 /* Ack interrupt done in wdc_wait_for_unbusy */ 641 if (wdc->select) 642 wdc->select(chp, xfer->c_drive); 643 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 644 WDSD_IBM | (xfer->c_drive << 4)); 645 if (wdc_wait_for_unbusy(chp, 646 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 647 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 648 return 0; /* IRQ was not for us */ 649 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 650 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 651 xfer->c_bcount, xfer->c_skip); 652 if (xfer->c_flags & C_DMA) { 653 ata_dmaerr(drvp, 654 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 655 } 656 sc_xfer->error = XS_TIMEOUT; 657 wdc_atapi_reset(chp, xfer); 658 return 1; 659 } 660 if (wdc->irqack) 661 wdc->irqack(chp); 662 663 /* 664 * If we missed an IRQ and were using DMA, flag it as a DMA error 665 * and reset device. 666 */ 667 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 668 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 669 sc_xfer->error = XS_RESET; 670 wdc_atapi_reset(chp, xfer); 671 return (1); 672 } 673 /* 674 * if the request sense command was aborted, report the short sense 675 * previously recorded, else continue normal processing 676 */ 677 678 if (xfer->c_flags & C_DMA) 679 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 680 ? WDC_DMA_READ : 0; 681 again: 682 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 683 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 684 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 685 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 686 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 687 "ire 0x%x :", xfer->c_bcount, 688 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 689 690 switch (phase) { 691 case PHASE_CMDOUT: 692 cmd = sc_xfer->cmd; 693 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 694 /* Init the DMA channel if necessary */ 695 if (xfer->c_flags & C_DMA) { 696 error = (*wdc->dma_init)(wdc->dma_arg, 697 chp->ch_channel, xfer->c_drive, 698 xfer->c_databuf, xfer->c_bcount, dma_flags); 699 if (error) { 700 if (error == EINVAL) { 701 /* 702 * We can't do DMA on this transfer 703 * for some reason. Fall back to 704 * PIO. 705 */ 706 xfer->c_flags &= ~C_DMA; 707 error = 0; 708 } else { 709 sc_xfer->error = XS_DRIVER_STUFFUP; 710 break; 711 } 712 } 713 } 714 715 /* send packet command */ 716 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 717 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 718 719 /* Start the DMA channel if necessary */ 720 if (xfer->c_flags & C_DMA) { 721 (*wdc->dma_start)(wdc->dma_arg, 722 chp->ch_channel, xfer->c_drive); 723 chp->ch_flags |= ATACH_DMA_WAIT; 724 } 725 726 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 727 chp->ch_flags |= ATACH_IRQ_WAIT; 728 } 729 return 1; 730 731 case PHASE_DATAOUT: 732 /* write data */ 733 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 734 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 735 (xfer->c_flags & C_DMA) != 0) { 736 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 737 if (xfer->c_flags & C_DMA) { 738 ata_dmaerr(drvp, 739 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 740 } 741 sc_xfer->error = XS_TIMEOUT; 742 wdc_atapi_reset(chp, xfer); 743 return 1; 744 } 745 if (xfer->c_bcount < len) { 746 printf("wdc_atapi_intr: warning: write only " 747 "%d of %d requested bytes\n", xfer->c_bcount, len); 748 wdc->dataout_pio(chp, drvp->drive_flags, 749 (char *)xfer->c_databuf + xfer->c_skip, 750 xfer->c_bcount); 751 for (i = xfer->c_bcount; i < len; i += 2) 752 bus_space_write_2(wdr->cmd_iot, 753 wdr->cmd_iohs[wd_data], 0, 0); 754 xfer->c_skip += xfer->c_bcount; 755 xfer->c_bcount = 0; 756 } else { 757 wdc->dataout_pio(chp, drvp->drive_flags, 758 (char *)xfer->c_databuf + xfer->c_skip, len); 759 xfer->c_skip += len; 760 xfer->c_bcount -= len; 761 } 762 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 763 chp->ch_flags |= ATACH_IRQ_WAIT; 764 } 765 return 1; 766 767 case PHASE_DATAIN: 768 /* Read data */ 769 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 770 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 771 (xfer->c_flags & C_DMA) != 0) { 772 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 773 if (xfer->c_flags & C_DMA) { 774 ata_dmaerr(drvp, 775 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 776 } 777 sc_xfer->error = XS_TIMEOUT; 778 wdc_atapi_reset(chp, xfer); 779 return 1; 780 } 781 if (xfer->c_bcount < len) { 782 printf("wdc_atapi_intr: warning: reading only " 783 "%d of %d bytes\n", xfer->c_bcount, len); 784 wdc->datain_pio(chp, drvp->drive_flags, 785 (char *)xfer->c_databuf + xfer->c_skip, 786 xfer->c_bcount); 787 wdcbit_bucket(chp, len - xfer->c_bcount); 788 xfer->c_skip += xfer->c_bcount; 789 xfer->c_bcount = 0; 790 } else { 791 wdc->datain_pio(chp, drvp->drive_flags, 792 (char *)xfer->c_databuf + xfer->c_skip, len); 793 xfer->c_skip += len; 794 xfer->c_bcount -=len; 795 } 796 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 797 chp->ch_flags |= ATACH_IRQ_WAIT; 798 } 799 return 1; 800 801 case PHASE_ABORTED: 802 case PHASE_COMPLETED: 803 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 804 if (xfer->c_flags & C_DMA) { 805 xfer->c_bcount -= sc_xfer->datalen; 806 } 807 sc_xfer->resid = xfer->c_bcount; 808 wdc_atapi_phase_complete(xfer); 809 return(1); 810 811 default: 812 if (++retries<500) { 813 DELAY(100); 814 chp->ch_status = bus_space_read_1(wdr->cmd_iot, 815 wdr->cmd_iohs[wd_status], 0); 816 chp->ch_error = bus_space_read_1(wdr->cmd_iot, 817 wdr->cmd_iohs[wd_error], 0); 818 goto again; 819 } 820 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 821 if (chp->ch_status & WDCS_ERR) { 822 sc_xfer->error = XS_SHORTSENSE; 823 sc_xfer->sense.atapi_sense = chp->ch_error; 824 } else { 825 if (xfer->c_flags & C_DMA) { 826 ata_dmaerr(drvp, 827 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 828 } 829 sc_xfer->error = XS_RESET; 830 wdc_atapi_reset(chp, xfer); 831 return (1); 832 } 833 } 834 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 835 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 836 DEBUG_INTR); 837 wdc_atapi_done(chp, xfer); 838 return (1); 839 } 840 841 static void 842 wdc_atapi_phase_complete(struct ata_xfer *xfer) 843 { 844 struct ata_channel *chp = xfer->c_chp; 845 struct atac_softc *atac = chp->ch_atac; 846 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 847 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 848 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 849 850 /* wait for DSC if needed */ 851 if (drvp->drive_flags & DRIVE_ATAPIST) { 852 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 853 "polldsc %d\n", atac->atac_dev.dv_xname, chp->ch_channel, 854 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 855 #if 1 856 if (cold) 857 panic("wdc_atapi_phase_complete: cold"); 858 #endif 859 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 860 AT_POLL) == WDCWAIT_TOUT) { 861 /* 10ms not enough, try again in 1 tick */ 862 if (xfer->c_dscpoll++ > 863 mstohz(sc_xfer->timeout)) { 864 printf("%s:%d:%d: wait_for_dsc " 865 "failed\n", 866 atac->atac_dev.dv_xname, 867 chp->ch_channel, xfer->c_drive); 868 sc_xfer->error = XS_TIMEOUT; 869 wdc_atapi_reset(chp, xfer); 870 return; 871 } else 872 callout_reset(&chp->ch_callout, 1, 873 wdc_atapi_polldsc, xfer); 874 return; 875 } 876 } 877 878 /* 879 * Some drive occasionally set WDCS_ERR with 880 * "ATA illegal length indication" in the error 881 * register. If we read some data the sense is valid 882 * anyway, so don't report the error. 883 */ 884 if (chp->ch_status & WDCS_ERR && 885 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 886 sc_xfer->resid == sc_xfer->datalen)) { 887 /* save the short sense */ 888 sc_xfer->error = XS_SHORTSENSE; 889 sc_xfer->sense.atapi_sense = chp->ch_error; 890 if ((sc_xfer->xs_periph->periph_quirks & 891 PQUIRK_NOSENSE) == 0) { 892 /* ask scsipi to send a REQUEST_SENSE */ 893 sc_xfer->error = XS_BUSY; 894 sc_xfer->status = SCSI_CHECK; 895 } else if (wdc->dma_status & 896 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 897 ata_dmaerr(drvp, 898 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 899 sc_xfer->error = XS_RESET; 900 wdc_atapi_reset(chp, xfer); 901 return; 902 } 903 } 904 if (xfer->c_bcount != 0) { 905 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 906 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 907 } 908 #ifdef DIAGNOSTIC 909 if (xfer->c_bcount < 0) { 910 printf("wdc_atapi_intr warning: bcount value " 911 "is %d after io\n", xfer->c_bcount); 912 } 913 #endif 914 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 915 "error 0x%x sense 0x%x\n", sc_xfer->error, 916 sc_xfer->sense.atapi_sense), DEBUG_INTR); 917 wdc_atapi_done(chp, xfer); 918 } 919 920 static void 921 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 922 { 923 struct atac_softc *atac = chp->ch_atac; 924 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 925 int drive = xfer->c_drive; 926 927 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 928 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 929 (u_int)xfer->c_flags), DEBUG_XFERS); 930 callout_stop(&chp->ch_callout); 931 /* mark controller inactive and free the command */ 932 chp->ch_queue->active_xfer = NULL; 933 ata_free_xfer(chp, xfer); 934 935 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 936 sc_xfer->error = XS_DRIVER_STUFFUP; 937 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 938 wakeup(&chp->ch_queue->active_xfer); 939 } 940 941 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 942 scsipi_done(sc_xfer); 943 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 944 chp->ch_flags), DEBUG_XFERS); 945 atastart(chp); 946 } 947 948 static void 949 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 950 { 951 struct atac_softc *atac = chp->ch_atac; 952 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 953 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 954 955 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 956 drvp->state = 0; 957 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 958 printf("%s:%d:%d: reset failed\n", 959 atac->atac_dev.dv_xname, chp->ch_channel, 960 xfer->c_drive); 961 sc_xfer->error = XS_SELTIMEOUT; 962 } 963 wdc_atapi_done(chp, xfer); 964 return; 965 } 966 967 static void 968 wdc_atapi_polldsc(void *arg) 969 { 970 971 wdc_atapi_phase_complete(arg); 972 } 973
Indexes created Mon Sep 22 21:09:42 GMT 2025