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sdmmcreg.h revision 1.12.2.1
      1  1.12.2.1       tls /*	$NetBSD: sdmmcreg.h,v 1.12.2.1 2013/02/25 00:29:31 tls Exp $	*/
      2       1.1    nonaka /*	$OpenBSD: sdmmcreg.h,v 1.4 2009/01/09 10:55:22 jsg Exp $	*/
      3       1.1    nonaka 
      4       1.1    nonaka /*
      5       1.1    nonaka  * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org>
      6       1.1    nonaka  *
      7       1.1    nonaka  * Permission to use, copy, modify, and distribute this software for any
      8       1.1    nonaka  * purpose with or without fee is hereby granted, provided that the above
      9       1.1    nonaka  * copyright notice and this permission notice appear in all copies.
     10       1.1    nonaka  *
     11       1.1    nonaka  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12       1.1    nonaka  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13       1.1    nonaka  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14       1.1    nonaka  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15       1.1    nonaka  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16       1.1    nonaka  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17       1.1    nonaka  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18       1.1    nonaka  */
     19       1.1    nonaka 
     20       1.1    nonaka #ifndef	_SDMMCREG_H_
     21       1.1    nonaka #define	_SDMMCREG_H_
     22       1.1    nonaka 
     23       1.1    nonaka /* MMC commands */				/* response type */
     24       1.1    nonaka #define MMC_GO_IDLE_STATE		0	/* R0 */
     25       1.1    nonaka #define MMC_SEND_OP_COND		1	/* R3 */
     26       1.1    nonaka #define MMC_ALL_SEND_CID		2	/* R2 */
     27       1.2    nonaka #define MMC_SET_RELATIVE_ADDR 	  	3	/* R1 */
     28       1.2    nonaka #define MMC_SWITCH			6	/* R1b */
     29       1.1    nonaka #define MMC_SELECT_CARD			7	/* R1 */
     30       1.2    nonaka #define MMC_SEND_EXT_CSD		8	/* R1 */
     31       1.1    nonaka #define MMC_SEND_CSD			9	/* R2 */
     32       1.2    nonaka #define MMC_SEND_CID			10	/* R2 */
     33       1.1    nonaka #define MMC_STOP_TRANSMISSION		12	/* R1b */
     34       1.1    nonaka #define MMC_SEND_STATUS			13	/* R1 */
     35       1.1    nonaka #define MMC_INACTIVE_STATE		15	/* R0 */
     36       1.1    nonaka #define MMC_SET_BLOCKLEN		16	/* R1 */
     37       1.1    nonaka #define MMC_READ_BLOCK_SINGLE		17	/* R1 */
     38       1.1    nonaka #define MMC_READ_BLOCK_MULTIPLE		18	/* R1 */
     39       1.1    nonaka #define MMC_SET_BLOCK_COUNT		23	/* R1 */
     40       1.1    nonaka #define MMC_WRITE_BLOCK_SINGLE		24	/* R1 */
     41       1.1    nonaka #define MMC_WRITE_BLOCK_MULTIPLE	25	/* R1 */
     42       1.2    nonaka #define MMC_PROGRAM_CSD			27	/* R1 */
     43       1.2    nonaka #define MMC_SET_WRITE_PROT		28	/* R1b */
     44       1.2    nonaka #define MMC_SET_CLR_WRITE_PROT		29	/* R1b */
     45       1.2    nonaka #define MMC_SET_SEND_WRITE_PROT		30	/* R1 */
     46       1.2    nonaka #define MMC_TAG_SECTOR_START		32	/* R1 */
     47       1.2    nonaka #define MMC_TAG_SECTOR_END		33	/* R1 */
     48       1.2    nonaka #define MMC_UNTAG_SECTOR		34	/* R1 */
     49       1.2    nonaka #define MMC_TAG_ERASE_GROUP_START	35	/* R1 */
     50       1.2    nonaka #define MMC_TAG_ERASE_GROUP_END		36	/* R1 */
     51       1.2    nonaka #define MMC_UNTAG_ERASE_GROUP		37	/* R1 */
     52       1.2    nonaka #define MMC_ERASE			38	/* R1b */
     53       1.2    nonaka #define MMC_LOCK_UNLOCK			42	/* R1b */
     54       1.1    nonaka #define MMC_APP_CMD			55	/* R1 */
     55       1.2    nonaka #define MMC_READ_OCR			58	/* R3 */
     56       1.1    nonaka 
     57       1.2    nonaka /* SD commands */			/* response type */
     58       1.3    nonaka #define SD_SEND_RELATIVE_ADDR 	  	3	/* R6 */
     59       1.5  kiyohara #define SD_SEND_SWITCH_FUNC		6	/* R1 */
     60       1.1    nonaka #define SD_SEND_IF_COND			8	/* R7 */
     61       1.1    nonaka 
     62       1.1    nonaka /* SD application commands */			/* response type */
     63       1.1    nonaka #define SD_APP_SET_BUS_WIDTH		6	/* R1 */
     64       1.9  jakllsch #define SD_APP_SD_STATUS		13	/* R1 */
     65       1.1    nonaka #define SD_APP_OP_COND			41	/* R3 */
     66       1.2    nonaka #define SD_APP_SEND_SCR			51	/* R1 */
     67       1.1    nonaka 
     68       1.1    nonaka /* OCR bits */
     69       1.1    nonaka #define MMC_OCR_MEM_READY		(1U<<31)/* memory power-up status bit */
     70       1.2    nonaka #define MMC_OCR_HCS			(1<<30)
     71       1.1    nonaka #define MMC_OCR_3_5V_3_6V		(1<<23)
     72       1.1    nonaka #define MMC_OCR_3_4V_3_5V		(1<<22)
     73       1.1    nonaka #define MMC_OCR_3_3V_3_4V		(1<<21)
     74       1.1    nonaka #define MMC_OCR_3_2V_3_3V		(1<<20)
     75       1.1    nonaka #define MMC_OCR_3_1V_3_2V		(1<<19)
     76       1.1    nonaka #define MMC_OCR_3_0V_3_1V		(1<<18)
     77       1.1    nonaka #define MMC_OCR_2_9V_3_0V		(1<<17)
     78       1.1    nonaka #define MMC_OCR_2_8V_2_9V		(1<<16)
     79       1.1    nonaka #define MMC_OCR_2_7V_2_8V		(1<<15)
     80       1.1    nonaka #define MMC_OCR_2_6V_2_7V		(1<<14)
     81       1.1    nonaka #define MMC_OCR_2_5V_2_6V		(1<<13)
     82       1.1    nonaka #define MMC_OCR_2_4V_2_5V		(1<<12)
     83       1.1    nonaka #define MMC_OCR_2_3V_2_4V		(1<<11)
     84       1.1    nonaka #define MMC_OCR_2_2V_2_3V		(1<<10)
     85       1.1    nonaka #define MMC_OCR_2_1V_2_2V		(1<<9)
     86       1.1    nonaka #define MMC_OCR_2_0V_2_1V		(1<<8)
     87       1.1    nonaka #define MMC_OCR_1_9V_2_0V		(1<<7)
     88       1.1    nonaka #define MMC_OCR_1_8V_1_9V		(1<<6)
     89       1.1    nonaka #define MMC_OCR_1_7V_1_8V		(1<<5)
     90       1.1    nonaka #define MMC_OCR_1_6V_1_7V		(1<<4)
     91       1.1    nonaka 
     92       1.1    nonaka /* R1 response type bits */
     93       1.1    nonaka #define MMC_R1_READY_FOR_DATA		(1<<8)	/* ready for next transfer */
     94       1.1    nonaka #define MMC_R1_APP_CMD			(1<<5)	/* app. commands supported */
     95       1.1    nonaka 
     96       1.1    nonaka /* 48-bit response decoding (32 bits w/o CRC) */
     97       1.1    nonaka #define MMC_R1(resp)			((resp)[0])
     98       1.1    nonaka #define MMC_R3(resp)			((resp)[0])
     99       1.1    nonaka #define SD_R6(resp)			((resp)[0])
    100       1.1    nonaka #define MMC_R7(resp)			((resp)[0])
    101       1.4    nonaka #define MMC_SPI_R1(resp)		((resp)[0])
    102       1.4    nonaka #define MMC_SPI_R7(resp)		((resp)[1])
    103       1.1    nonaka 
    104       1.1    nonaka /* RCA argument and response */
    105       1.1    nonaka #define MMC_ARG_RCA(rca)		((rca) << 16)
    106       1.1    nonaka #define SD_R6_RCA(resp)			(SD_R6((resp)) >> 16)
    107       1.1    nonaka 
    108       1.1    nonaka /* bus width argument */
    109       1.1    nonaka #define SD_ARG_BUS_WIDTH_1		0
    110       1.1    nonaka #define SD_ARG_BUS_WIDTH_4		2
    111       1.1    nonaka 
    112       1.4    nonaka /* EXT_CSD fields */
    113       1.5  kiyohara #define EXT_CSD_BUS_WIDTH		183	/* WO */
    114       1.5  kiyohara #define EXT_CSD_HS_TIMING		185	/* R/W */
    115       1.5  kiyohara #define EXT_CSD_REV			192	/* RO */
    116       1.5  kiyohara #define EXT_CSD_STRUCTURE		194	/* RO */
    117       1.5  kiyohara #define EXT_CSD_CARD_TYPE		196	/* RO */
    118       1.4    nonaka 
    119       1.4    nonaka /* EXT_CSD field definitions */
    120       1.4    nonaka #define EXT_CSD_CMD_SET_NORMAL		(1U << 0)
    121       1.4    nonaka #define EXT_CSD_CMD_SET_SECURE		(1U << 1)
    122       1.4    nonaka #define EXT_CSD_CMD_SET_CPSECURE	(1U << 2)
    123       1.4    nonaka 
    124       1.4    nonaka /* EXT_CSD_BUS_WIDTH */
    125       1.4    nonaka #define EXT_CSD_BUS_WIDTH_1		0	/* 1 bit mode */
    126       1.4    nonaka #define EXT_CSD_BUS_WIDTH_4		1	/* 4 bit mode */
    127       1.4    nonaka #define EXT_CSD_BUS_WIDTH_8		2	/* 8 bit mode */
    128       1.4    nonaka 
    129       1.5  kiyohara /* EXT_CSD_STRUCTURE */
    130       1.5  kiyohara #define EXT_CSD_STRUCTURE_VER_1_0	0	/* CSD Version No.1.0 */
    131       1.5  kiyohara #define EXT_CSD_STRUCTURE_VER_1_1	1	/* CSD Version No.1.1 */
    132       1.5  kiyohara #define EXT_CSD_STRUCTURE_VER_1_2	2	/* Version 4.1-4.2-4.3 */
    133       1.5  kiyohara 
    134       1.5  kiyohara /* EXT_CSD_CARD_TYPE */
    135       1.5  kiyohara #define EXT_CSD_CARD_TYPE_26M		(1 << 0)
    136       1.5  kiyohara #define EXT_CSD_CARD_TYPE_52M		(1 << 1)
    137       1.5  kiyohara 
    138       1.4    nonaka /* MMC_SWITCH access mode */
    139       1.4    nonaka #define MMC_SWITCH_MODE_CMD_SET		0x00	/* Change the command set */
    140       1.4    nonaka #define MMC_SWITCH_MODE_SET_BITS	0x01	/* Set bits in value */
    141       1.4    nonaka #define MMC_SWITCH_MODE_CLEAR_BITS	0x02	/* Clear bits in value */
    142       1.4    nonaka #define MMC_SWITCH_MODE_WRITE_BYTE	0x03	/* Set target to value */
    143       1.4    nonaka 
    144       1.4    nonaka /* SPI mode reports R1/R2(SEND_STATUS) status. */
    145       1.4    nonaka #define R1_SPI_IDLE		(1 << 0)
    146       1.4    nonaka #define R1_SPI_ERASE_RESET	(1 << 1)
    147       1.4    nonaka #define R1_SPI_ILLEGAL_COMMAND	(1 << 2)
    148       1.4    nonaka #define R1_SPI_COM_CRC		(1 << 3)
    149       1.4    nonaka #define R1_SPI_ERASE_SEQ	(1 << 4)
    150       1.4    nonaka #define R1_SPI_ADDRESS		(1 << 5)
    151       1.4    nonaka #define R1_SPI_PARAMETER	(1 << 6)
    152       1.4    nonaka /* R1 bit 7 is always zero */
    153       1.4    nonaka #define R2_SPI_CARD_LOCKED	(1 << 8)
    154       1.4    nonaka #define R2_SPI_WP_ERASE_SKIP	(1 << 9)	/* or lock/unlock fail */
    155       1.4    nonaka #define R2_SPI_LOCK_UNLOCK_FAIL	R2_SPI_WP_ERASE_SKIP
    156       1.4    nonaka #define R2_SPI_ERROR		(1 << 10)
    157       1.4    nonaka #define R2_SPI_CC_ERROR		(1 << 11)
    158       1.4    nonaka #define R2_SPI_CARD_ECC_ERROR	(1 << 12)
    159       1.4    nonaka #define R2_SPI_WP_VIOLATION	(1 << 13)
    160       1.4    nonaka #define R2_SPI_ERASE_PARAM	(1 << 14)
    161       1.4    nonaka #define R2_SPI_OUT_OF_RANGE	(1 << 15)	/* or CSD overwrite */
    162       1.4    nonaka #define R2_SPI_CSD_OVERWRITE	R2_SPI_OUT_OF_RANGE
    163       1.4    nonaka 
    164       1.1    nonaka /* MMC R2 response (CSD) */
    165       1.1    nonaka #define MMC_CSD_CSDVER(resp)		MMC_RSP_BITS((resp), 126, 2)
    166       1.6    nonaka #define  MMC_CSD_CSDVER_1_0		0
    167       1.6    nonaka #define  MMC_CSD_CSDVER_1_1		1
    168       1.6    nonaka #define  MMC_CSD_CSDVER_1_2		2 /* MMC 4.1 - 4.2 - 4.3 */
    169       1.7    nonaka #define  MMC_CSD_CSDVER_EXT_CSD		3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
    170       1.1    nonaka #define MMC_CSD_MMCVER(resp)		MMC_RSP_BITS((resp), 122, 4)
    171       1.1    nonaka #define  MMC_CSD_MMCVER_1_0		0 /* MMC 1.0 - 1.2 */
    172       1.1    nonaka #define  MMC_CSD_MMCVER_1_4		1 /* MMC 1.4 */
    173       1.1    nonaka #define  MMC_CSD_MMCVER_2_0		2 /* MMC 2.0 - 2.2 */
    174       1.1    nonaka #define  MMC_CSD_MMCVER_3_1		3 /* MMC 3.1 - 3.3 */
    175       1.6    nonaka #define  MMC_CSD_MMCVER_4_0		4 /* MMC 4.1 - 4.2 - 4.3 */
    176       1.1    nonaka #define MMC_CSD_TAAC(resp)		MMC_RSP_BITS((resp), 112, 8)
    177       1.1    nonaka #define MMC_CSD_TAAC_MANT(resp)		MMC_RSP_BITS((resp), 115, 4)
    178       1.1    nonaka #define MMC_CSD_TAAC_EXP(resp)		MMC_RSP_BITS((resp), 112, 3)
    179       1.1    nonaka #define MMC_CSD_NSAC(resp)		MMC_RSP_BITS((resp), 104, 8)
    180       1.1    nonaka #define MMC_CSD_TRAN_SPEED(resp)	MMC_RSP_BITS((resp), 96, 8)
    181       1.1    nonaka #define MMC_CSD_TRAN_SPEED_MANT(resp)	MMC_RSP_BITS((resp), 99, 4)
    182       1.1    nonaka #define MMC_CSD_TRAN_SPEED_EXP(resp)	MMC_RSP_BITS((resp), 96, 3)
    183       1.1    nonaka #define MMC_CSD_READ_BL_LEN(resp)	MMC_RSP_BITS((resp), 80, 4)
    184       1.1    nonaka #define MMC_CSD_C_SIZE(resp)		MMC_RSP_BITS((resp), 62, 12)
    185       1.1    nonaka #define MMC_CSD_CAPACITY(resp)		((MMC_CSD_C_SIZE((resp))+1) << \
    186       1.1    nonaka 					 (MMC_CSD_C_SIZE_MULT((resp))+2))
    187       1.1    nonaka #define MMC_CSD_C_SIZE_MULT(resp)	MMC_RSP_BITS((resp), 47, 3)
    188       1.1    nonaka #define MMC_CSD_R2W_FACTOR(resp)	MMC_RSP_BITS((resp), 26, 3)
    189       1.1    nonaka #define MMC_CSD_WRITE_BL_LEN(resp)	MMC_RSP_BITS((resp), 22, 4)
    190       1.1    nonaka 
    191       1.1    nonaka /* MMC v1 R2 response (CID) */
    192       1.1    nonaka #define MMC_CID_MID_V1(resp)		MMC_RSP_BITS((resp), 104, 24)
    193       1.1    nonaka #define MMC_CID_PNM_V1_CPY(resp, pnm)					\
    194       1.1    nonaka 	do {								\
    195       1.1    nonaka 		(pnm)[0] = MMC_RSP_BITS((resp), 96, 8);			\
    196       1.1    nonaka 		(pnm)[1] = MMC_RSP_BITS((resp), 88, 8);			\
    197       1.1    nonaka 		(pnm)[2] = MMC_RSP_BITS((resp), 80, 8);			\
    198       1.1    nonaka 		(pnm)[3] = MMC_RSP_BITS((resp), 72, 8);			\
    199       1.1    nonaka 		(pnm)[4] = MMC_RSP_BITS((resp), 64, 8);			\
    200       1.1    nonaka 		(pnm)[5] = MMC_RSP_BITS((resp), 56, 8);			\
    201       1.1    nonaka 		(pnm)[6] = MMC_RSP_BITS((resp), 48, 8);			\
    202       1.1    nonaka 		(pnm)[7] = '\0';					\
    203       1.1    nonaka 	} while (/*CONSTCOND*/0)
    204       1.1    nonaka #define MMC_CID_REV_V1(resp)		MMC_RSP_BITS((resp), 40, 8)
    205       1.1    nonaka #define MMC_CID_PSN_V1(resp)		MMC_RSP_BITS((resp), 16, 24)
    206       1.1    nonaka #define MMC_CID_MDT_V1(resp)		MMC_RSP_BITS((resp), 8, 8)
    207       1.1    nonaka 
    208       1.1    nonaka /* MMC v2 R2 response (CID) */
    209       1.1    nonaka #define MMC_CID_MID_V2(resp)		MMC_RSP_BITS((resp), 120, 8)
    210       1.1    nonaka #define MMC_CID_OID_V2(resp)		MMC_RSP_BITS((resp), 104, 16)
    211       1.1    nonaka #define MMC_CID_PNM_V2_CPY(resp, pnm)					\
    212       1.1    nonaka 	do {								\
    213       1.1    nonaka 		(pnm)[0] = MMC_RSP_BITS((resp), 96, 8);			\
    214       1.1    nonaka 		(pnm)[1] = MMC_RSP_BITS((resp), 88, 8);			\
    215       1.1    nonaka 		(pnm)[2] = MMC_RSP_BITS((resp), 80, 8);			\
    216       1.1    nonaka 		(pnm)[3] = MMC_RSP_BITS((resp), 72, 8);			\
    217       1.1    nonaka 		(pnm)[4] = MMC_RSP_BITS((resp), 64, 8);			\
    218       1.1    nonaka 		(pnm)[5] = MMC_RSP_BITS((resp), 56, 8);			\
    219       1.1    nonaka 		(pnm)[6] = '\0';					\
    220       1.1    nonaka 	} while (/*CONSTCOND*/0)
    221       1.1    nonaka #define MMC_CID_PSN_V2(resp)		MMC_RSP_BITS((resp), 16, 32)
    222       1.1    nonaka 
    223       1.1    nonaka /* SD R2 response (CSD) */
    224       1.1    nonaka #define SD_CSD_CSDVER(resp)		MMC_RSP_BITS((resp), 126, 2)
    225       1.1    nonaka #define  SD_CSD_CSDVER_1_0		0
    226       1.1    nonaka #define  SD_CSD_CSDVER_2_0		1
    227       1.1    nonaka #define SD_CSD_MMCVER(resp)		MMC_RSP_BITS((resp), 122, 4)
    228       1.1    nonaka #define SD_CSD_TAAC(resp)		MMC_RSP_BITS((resp), 112, 8)
    229       1.1    nonaka #define SD_CSD_TAAC_EXP(resp)		MMC_RSP_BITS((resp), 115, 4)
    230       1.1    nonaka #define SD_CSD_TAAC_MANT(resp)		MMC_RSP_BITS((resp), 112, 3)
    231       1.1    nonaka #define  SD_CSD_TAAC_1_5_MSEC		0x26
    232       1.1    nonaka #define SD_CSD_NSAC(resp)		MMC_RSP_BITS((resp), 104, 8)
    233       1.1    nonaka #define SD_CSD_SPEED(resp)		MMC_RSP_BITS((resp), 96, 8)
    234       1.1    nonaka #define SD_CSD_SPEED_MANT(resp)		MMC_RSP_BITS((resp), 99, 4)
    235       1.1    nonaka #define SD_CSD_SPEED_EXP(resp)		MMC_RSP_BITS((resp), 96, 3)
    236       1.1    nonaka #define  SD_CSD_SPEED_25_MHZ		0x32
    237       1.1    nonaka #define  SD_CSD_SPEED_50_MHZ		0x5a
    238       1.1    nonaka #define SD_CSD_CCC(resp)		MMC_RSP_BITS((resp), 84, 12)
    239       1.5  kiyohara #define  SD_CSD_CCC_BASIC		(1 << 0)	/* basic */
    240       1.5  kiyohara #define  SD_CSD_CCC_BR			(1 << 2)	/* block read */
    241       1.5  kiyohara #define  SD_CSD_CCC_BW			(1 << 4)	/* block write */
    242       1.5  kiyohara #define  SD_CSD_CCC_ERACE		(1 << 5)	/* erase */
    243       1.5  kiyohara #define  SD_CSD_CCC_WP			(1 << 6)	/* write protection */
    244       1.5  kiyohara #define  SD_CSD_CCC_LC			(1 << 7)	/* lock card */
    245       1.5  kiyohara #define  SD_CSD_CCC_AS			(1 << 8)	/*application specific*/
    246       1.5  kiyohara #define  SD_CSD_CCC_IOM			(1 << 9)	/* I/O mode */
    247       1.5  kiyohara #define  SD_CSD_CCC_SWITCH		(1 << 10)	/* switch */
    248       1.1    nonaka #define SD_CSD_READ_BL_LEN(resp)	MMC_RSP_BITS((resp), 80, 4)
    249       1.1    nonaka #define SD_CSD_READ_BL_PARTIAL(resp)	MMC_RSP_BITS((resp), 79, 1)
    250       1.1    nonaka #define SD_CSD_WRITE_BLK_MISALIGN(resp)	MMC_RSP_BITS((resp), 78, 1)
    251       1.1    nonaka #define SD_CSD_READ_BLK_MISALIGN(resp)	MMC_RSP_BITS((resp), 77, 1)
    252       1.1    nonaka #define SD_CSD_DSR_IMP(resp)		MMC_RSP_BITS((resp), 76, 1)
    253       1.1    nonaka #define SD_CSD_C_SIZE(resp)		MMC_RSP_BITS((resp), 62, 12)
    254       1.1    nonaka #define SD_CSD_CAPACITY(resp)		((SD_CSD_C_SIZE((resp))+1) << \
    255       1.1    nonaka 					 (SD_CSD_C_SIZE_MULT((resp))+2))
    256       1.1    nonaka #define SD_CSD_VDD_R_CURR_MIN(resp)	MMC_RSP_BITS((resp), 59, 3)
    257       1.1    nonaka #define SD_CSD_VDD_R_CURR_MAX(resp)	MMC_RSP_BITS((resp), 56, 3)
    258       1.1    nonaka #define SD_CSD_VDD_W_CURR_MIN(resp)	MMC_RSP_BITS((resp), 53, 3)
    259       1.1    nonaka #define SD_CSD_VDD_W_CURR_MAX(resp)	MMC_RSP_BITS((resp), 50, 3)
    260       1.1    nonaka #define  SD_CSD_VDD_RW_CURR_100mA	0x7
    261       1.1    nonaka #define  SD_CSD_VDD_RW_CURR_80mA	0x6
    262       1.1    nonaka #define SD_CSD_V2_C_SIZE(resp)		MMC_RSP_BITS((resp), 48, 22)
    263       1.1    nonaka #define SD_CSD_V2_CAPACITY(resp)	((SD_CSD_V2_C_SIZE((resp))+1) << 10)
    264       1.1    nonaka #define SD_CSD_V2_BL_LEN		0x9 /* 512 */
    265       1.1    nonaka #define SD_CSD_C_SIZE_MULT(resp)	MMC_RSP_BITS((resp), 47, 3)
    266       1.1    nonaka #define SD_CSD_ERASE_BLK_EN(resp)	MMC_RSP_BITS((resp), 46, 1)
    267       1.1    nonaka #define SD_CSD_SECTOR_SIZE(resp)	MMC_RSP_BITS((resp), 39, 7) /* +1 */
    268       1.1    nonaka #define SD_CSD_WP_GRP_SIZE(resp)	MMC_RSP_BITS((resp), 32, 7) /* +1 */
    269       1.1    nonaka #define SD_CSD_WP_GRP_ENABLE(resp)	MMC_RSP_BITS((resp), 31, 1)
    270       1.1    nonaka #define SD_CSD_R2W_FACTOR(resp)		MMC_RSP_BITS((resp), 26, 3)
    271       1.1    nonaka #define SD_CSD_WRITE_BL_LEN(resp)	MMC_RSP_BITS((resp), 22, 4)
    272       1.1    nonaka #define  SD_CSD_RW_BL_LEN_2G		0xa
    273       1.1    nonaka #define  SD_CSD_RW_BL_LEN_1G		0x9
    274       1.1    nonaka #define SD_CSD_WRITE_BL_PARTIAL(resp)	MMC_RSP_BITS((resp), 21, 1)
    275       1.1    nonaka #define SD_CSD_FILE_FORMAT_GRP(resp)	MMC_RSP_BITS((resp), 15, 1)
    276       1.1    nonaka #define SD_CSD_COPY(resp)		MMC_RSP_BITS((resp), 14, 1)
    277       1.1    nonaka #define SD_CSD_PERM_WRITE_PROTECT(resp)	MMC_RSP_BITS((resp), 13, 1)
    278       1.1    nonaka #define SD_CSD_TMP_WRITE_PROTECT(resp)	MMC_RSP_BITS((resp), 12, 1)
    279       1.1    nonaka #define SD_CSD_FILE_FORMAT(resp)	MMC_RSP_BITS((resp), 10, 2)
    280       1.1    nonaka 
    281       1.1    nonaka /* SD R2 response (CID) */
    282       1.1    nonaka #define SD_CID_MID(resp)		MMC_RSP_BITS((resp), 120, 8)
    283       1.1    nonaka #define SD_CID_OID(resp)		MMC_RSP_BITS((resp), 104, 16)
    284       1.1    nonaka #define SD_CID_PNM_CPY(resp, pnm)					\
    285       1.1    nonaka 	do {								\
    286       1.1    nonaka 		(pnm)[0] = MMC_RSP_BITS((resp), 96, 8);			\
    287       1.1    nonaka 		(pnm)[1] = MMC_RSP_BITS((resp), 88, 8);			\
    288       1.1    nonaka 		(pnm)[2] = MMC_RSP_BITS((resp), 80, 8);			\
    289       1.1    nonaka 		(pnm)[3] = MMC_RSP_BITS((resp), 72, 8);			\
    290       1.1    nonaka 		(pnm)[4] = MMC_RSP_BITS((resp), 64, 8);			\
    291       1.1    nonaka 		(pnm)[5] = '\0';					\
    292       1.1    nonaka 	} while (/*CONSTCOND*/0)
    293       1.1    nonaka #define SD_CID_REV(resp)		MMC_RSP_BITS((resp), 56, 8)
    294       1.1    nonaka #define SD_CID_PSN(resp)		MMC_RSP_BITS((resp), 24, 32)
    295       1.1    nonaka #define SD_CID_MDT(resp)		MMC_RSP_BITS((resp), 8, 12)
    296       1.1    nonaka 
    297       1.1    nonaka /* SCR (SD Configuration Register) */
    298       1.2    nonaka #define SCR_STRUCTURE(scr)		MMC_RSP_BITS((scr), 60, 4)
    299       1.2    nonaka #define  SCR_STRUCTURE_VER_1_0		0 /* Version 1.0 */
    300       1.2    nonaka #define SCR_SD_SPEC(scr)		MMC_RSP_BITS((scr), 56, 4)
    301       1.5  kiyohara #define  SCR_SD_SPEC_VER_1_0		0 /* Version 1.0 and 1.01 */
    302       1.5  kiyohara #define  SCR_SD_SPEC_VER_1_10		1 /* Version 1.10 */
    303       1.5  kiyohara #define  SCR_SD_SPEC_VER_2		2 /* Version 2.00 or Version 3.0X */
    304       1.2    nonaka #define SCR_DATA_STAT_AFTER_ERASE(scr)	MMC_RSP_BITS((scr), 55, 1)
    305       1.2    nonaka #define SCR_SD_SECURITY(scr)		MMC_RSP_BITS((scr), 52, 3)
    306       1.2    nonaka #define  SCR_SD_SECURITY_NONE		0 /* no security */
    307       1.2    nonaka #define  SCR_SD_SECURITY_1_0		1 /* security protocol 1.0 */
    308       1.2    nonaka #define  SCR_SD_SECURITY_1_0_2		2 /* security protocol 1.0 */
    309       1.2    nonaka #define SCR_SD_BUS_WIDTHS(scr)		MMC_RSP_BITS((scr), 48, 4)
    310       1.2    nonaka #define  SCR_SD_BUS_WIDTHS_1BIT		(1 << 0) /* 1bit (DAT0) */
    311       1.2    nonaka #define  SCR_SD_BUS_WIDTHS_4BIT		(1 << 2) /* 4bit (DAT0-3) */
    312      1.10      matt #define SCR_SD_SPEC3(scr)		MMC_RSP_BITS((scr), 47, 1)
    313      1.10      matt #define SCR_EX_SECURITY(scr)		MMC_RSP_BITS((scr), 43, 4)
    314      1.10      matt #define SCR_RESERVED(scr)		MMC_RSP_BITS((scr), 34, 9)
    315      1.10      matt #define SCR_CMD_SUPPORT_CMD23(scr)	MMC_RSP_BITS((scr), 33, 1)
    316      1.10      matt #define SCR_CMD_SUPPORT_CMD20(scr)	MMC_RSP_BITS((scr), 32, 1)
    317       1.2    nonaka #define SCR_RESERVED2(scr)		MMC_RSP_BITS((scr), 0, 32)
    318       1.1    nonaka 
    319       1.5  kiyohara /* Status of Switch Function */
    320       1.5  kiyohara #define SFUNC_STATUS_GROUP(status, group) \
    321  1.12.2.1       tls 	(__bitfield((uint32_t *)(status), 400 + (group - 1) * 16, 16))
    322       1.5  kiyohara 
    323      1.12      matt /* This assumes the response fields are in host byte order in 32-bit units.  */
    324       1.1    nonaka #define MMC_RSP_BITS(resp, start, len)	__bitfield((resp), (start)-8, (len))
    325      1.10      matt static inline uint32_t
    326      1.10      matt __bitfield(const uint32_t *src, size_t start, size_t len)
    327       1.1    nonaka {
    328  1.12.2.1       tls 	if (start + len > 512 || len == 0 || len > 32)
    329      1.10      matt 		return 0;
    330      1.10      matt 
    331      1.10      matt 	src += start / 32;
    332      1.10      matt 	start %= 32;
    333       1.1    nonaka 
    334      1.11      matt 	uint32_t dst = src[0] >> start;
    335       1.1    nonaka 
    336      1.10      matt 	if (__predict_false((start + len - 1) / 32 != start / 32)) {
    337      1.11      matt 		dst |= src[1] << (32 - start);
    338       1.1    nonaka 	}
    339       1.1    nonaka 
    340      1.10      matt 	return dst & (__BIT(len) - 1);
    341       1.1    nonaka }
    342       1.1    nonaka 
    343       1.1    nonaka #endif	/* _SDMMCREG_H_ */
    344