1 /* $NetBSD: udl.h,v 1.6 2022/09/06 02:20:17 nat Exp $ */ 2 3 /*- 4 * Copyright (c) 2009 FUKAUMI Naoki. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Copyright (c) 2009 Marcus Glocker <mglocker (at) openbsd.org> 30 * 31 * Permission to use, copy, modify, and distribute this software for any 32 * purpose with or without fee is hereby granted, provided that the above 33 * copyright notice and this permission notice appear in all copies. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 36 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 37 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 38 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 39 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 40 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 41 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 42 */ 43 44 #ifdef UDL_EVENT_COUNTERS 45 #define UDL_EVCNT_INCR(ev) (ev)->ev_count++ 46 #else 47 #define UDL_EVCNT_INCR(ev) do {} while (/* CONSTCOND */ 0) 48 #endif 49 50 /* 51 * Bulk command xfer structure. 52 */ 53 #define UDL_CMD_BUFFER_SIZE (64 * 1024) 54 #define UDL_CMD_HEADER_SIZE 6 55 #define UDL_CMD_WIDTH_MAX 256 56 #define UDL_CMD_DRAW_SIZE(width) \ 57 (UDL_CMD_HEADER_SIZE + (width) * 2) 58 #define UDL_CMD_FILL_SIZE (UDL_CMD_HEADER_SIZE + 3) 59 #define UDL_CMD_COPY_SIZE (UDL_CMD_HEADER_SIZE + 3) 60 #define UDL_CMD_COMP_WORD_SIZE 4 61 #define UDL_CMD_COMP_MIN_SIZE (UDL_CMD_HEADER_SIZE + UDL_CMD_COMP_WORD_SIZE) 62 #define UDL_CMD_COMP_BLOCK_SIZE 512 63 #define UDL_CMD_COMP_THRESHOLD \ 64 (UDL_CMD_BUFFER_SIZE - (UDL_CMD_COMP_BLOCK_SIZE * 2)) 65 66 #define UDL_NCMDQ 32 67 68 struct udl_cmdq { 69 TAILQ_ENTRY(udl_cmdq) cq_chain; 70 struct udl_softc *cq_sc; 71 struct usbd_xfer *cq_xfer; 72 uint8_t *cq_buf; 73 }; 74 75 /* 76 * Our per device structure. 77 */ 78 struct udl_softc { 79 device_t sc_dev; 80 struct usbd_device * sc_udev; 81 struct usbd_interface * sc_iface; 82 struct usbd_pipe * sc_tx_pipeh; 83 84 enum { 85 UDL_INIT_NONE, 86 UDL_INIT_MIDWAY, 87 UDL_INIT_INITED 88 } sc_init_state; 89 90 struct udl_cmdq sc_cmdq[UDL_NCMDQ]; 91 TAILQ_HEAD(udl_cmdq_head, udl_cmdq) sc_freecmd, 92 sc_xfercmd; 93 94 struct udl_cmdq *sc_cmd_cur; 95 uint8_t *sc_cmd_buf; 96 #define UDL_CMD_BUFINIT(sc) ((sc)->sc_cmd_buf = (sc)->sc_cmd_cur->cq_buf) 97 #define UDL_CMD_BUFSIZE(sc) ((sc)->sc_cmd_buf - (sc)->sc_cmd_cur->cq_buf) 98 int sc_cmd_cblen; 99 100 struct edid_info sc_ei; 101 int sc_width; 102 int sc_height; 103 int sc_offscreen; 104 uint8_t sc_depth; 105 106 /* wsdisplay glue */ 107 struct wsscreen_descr sc_defaultscreen; 108 const struct wsscreen_descr *sc_screens[1]; 109 struct wsscreen_list sc_screenlist; 110 struct rasops_info sc_ri; 111 device_t sc_wsdisplay; 112 u_int sc_mode; 113 u_int sc_blank; 114 bool sc_clear; 115 uint8_t sc_nscreens; 116 117 uint8_t *sc_fbmem; /* framebuffer for X11 */ 118 uint8_t *sc_fbmem_prev; /* prev. framebuffer */ 119 #define UDL_FBMEM_SIZE(sc) \ 120 ((sc)->sc_width * (sc)->sc_height * ((sc)->sc_depth / 8)) 121 122 uint8_t *sc_huffman; 123 uint8_t *sc_huffman_base; 124 size_t sc_huffman_size; 125 126 kcondvar_t sc_thread_cv; 127 kmutex_t sc_thread_mtx; 128 bool sc_dying; 129 bool sc_thread_stop; 130 lwp_t *sc_thread; 131 132 kcondvar_t sc_cv; 133 kmutex_t sc_mtx; 134 135 #define UDL_DECOMPRDY (1 << 0) 136 #define UDL_COMPRDY (1 << 1) 137 uint32_t sc_flags; 138 #ifdef UDL_EVENT_COUNTERS 139 struct evcnt sc_ev_cmdq_get; 140 struct evcnt sc_ev_cmdq_put; 141 struct evcnt sc_ev_cmdq_wait; 142 struct evcnt sc_ev_cmdq_timeout; 143 #endif 144 }; 145 146 /* 147 * Chip commands. 148 */ 149 #define UDL_CTRL_CMD_READ_EDID 0x02 150 #define UDL_CTRL_CMD_WRITE_1 0x03 151 #define UDL_CTRL_CMD_READ_1 0x04 152 #define UDL_CTRL_CMD_READ_STATUS 0x06 153 #define UDL_CTRL_CMD_SET_KEY 0x12 154 155 #define UDL_BULK_SOC 0xaf /* start of command token */ 156 157 #define UDL_BULK_CMD_REG_WRITE_1 0x20 /* write 1 byte to register */ 158 #define UDL_BULK_CMD_EOC 0xa0 /* end of command stack */ 159 #define UDL_BULK_CMD_DECOMP 0xe0 /* send decompression table */ 160 161 #define UDL_BULK_CMD_FB_BASE8 0x60 162 #define UDL_BULK_CMD_FB_WRITE8 (UDL_BULK_CMD_FB_BASE8 | 0x00) 163 #define UDL_BULK_CMD_FB_RLE8 (UDL_BULK_CMD_FB_BASE8 | 0x01) 164 #define UDL_BULK_CMD_FB_COPY8 (UDL_BULK_CMD_FB_BASE8 | 0x02) 165 #define UDL_BULK_CMD_FB_BASE16 0x68 166 #define UDL_BULK_CMD_FB_WRITE16 (UDL_BULK_CMD_FB_BASE16 | 0x00) 167 #define UDL_BULK_CMD_FB_RLE16 (UDL_BULK_CMD_FB_BASE16 | 0x01) 168 #define UDL_BULK_CMD_FB_COPY16 (UDL_BULK_CMD_FB_BASE16 | 0x02) 169 #define UDL_BULK_CMD_FB_COMP 0x10 170 171 /* 172 * Chip registers. 173 */ 174 #define UDL_REG_COLORDEPTH 0x00 175 #define UDL_REG_COLORDEPTH_16 0x00 176 #define UDL_REG_COLORDEPTH_24 0x01 177 #define UDL_REG_XDISPLAYSTART 0x01 178 #define UDL_REG_XDISPLAYEND 0x03 179 #define UDL_REG_YDISPLAYSTART 0x05 180 #define UDL_REG_YDISPLAYEND 0x07 181 #define UDL_REG_XENDCOUNT 0x09 182 #define UDL_REG_HSYNCSTART 0x0b 183 #define UDL_REG_HSYNCEND 0x0d 184 #define UDL_REG_HPIXELS 0x0f 185 #define UDL_REG_YENDCOUNT 0x11 186 #define UDL_REG_VSYNCSTART 0x13 187 #define UDL_REG_VSYNCEND 0x15 188 #define UDL_REG_VPIXELS 0x17 189 #define UDL_REG_PIXELCLOCK5KHZ 0x1b 190 #define UDL_REG_BLANK 0x1f 191 #define UDL_REG_BLANK_OFF 0x00 192 #define UDL_REG_BLANK_ON 0x01 193 #define UDL_REG_ADDR_START16 0x20 194 #define UDL_REG_ADDR_STRIDE16 0x23 195 #define UDL_REG_ADDR_START8 0x26 196 #define UDL_REG_ADDR_STRIDE8 0x29 197 #define UDL_REG_SYNC 0xff 198 199 /* 200 * Compression. 201 */ 202 struct udl_huffman { 203 uint8_t bit_count; 204 uint8_t pad[3]; 205 uint32_t bit_pattern; 206 }; 207 #define UDL_HUFFMAN_RECORD_SIZE sizeof(struct udl_huffman) 208 #define UDL_HUFFMAN_RECORDS (65536 + 1) 209 #define UDL_HUFFMAN_BASE (((UDL_HUFFMAN_RECORDS - 1) / 2) * \ 210 UDL_HUFFMAN_RECORD_SIZE) 211
Indexes created Sat Sep 20 22:09:52 GMT 2025