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      1 /*	$NetBSD: xdvar.h,v 1.13 2012/10/27 17:18:38 chs Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 Charles D. Cranor
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * x d v a r . h
     30  *
     31  * this file defines the software structure we use to control the
     32  * 753/7053.
     33  *
     34  * author: Chuck Cranor <chuck@netbsd>
     35  */
     36 
     37 #include <sys/callout.h>
     38 
     39 /*
     40  * i/o request: wrapper for hardware's iopb data structure
     41  */
     42 
     43 struct xd_iorq {
     44 	struct xd_iopb *iopb;		/* address of matching iopb */
     45 	struct xd_iopb *dmaiopb;	/* DMA address of above */
     46 	struct xdc_softc *xdc;		/* who we are working with */
     47 	struct xd_softc *xd;		/* which disk */
     48 	int ttl;			/* time to live */
     49 	int mode;			/* current mode (state+other data) */
     50 	int tries;			/* number of times we have tried it */
     51 	int errnum;			/* error number if we fail */
     52 	int lasterror;			/* last error we got */
     53 	int blockno;			/* starting block no for this xfer */
     54 	int sectcnt;			/* number of sectors in xfer */
     55 	char *dbuf;			/* KVA of data buffer (advances) */
     56 	struct buf *buf;		/* for NORM */
     57 	bus_dmamap_t dmamap;		/* DMA I/O handle */
     58 };
     59 
     60 /*
     61  * state
     62  */
     63 
     64 #define XD_SUB_MASK 0xf0            /* mask bits for state */
     65 #define XD_SUB_FREE 0x00            /* free */
     66 #define XD_SUB_NORM 0x10            /* normal I/O request */
     67 #define XD_SUB_WAIT 0x20            /* normal I/O request in the
     68                                              context of a process */
     69 #define XD_SUB_POLL 0x30            /* polled mode */
     70 #define XD_SUB_DONE 0x40            /* not active, but can't be free'd yet */
     71 #define XD_SUB_NOQ  0x50            /* don't queue, just submit (internal) */
     72 
     73 #define XD_STATE(X) ((X) & XD_SUB_MASK) /* extract state from mode */
     74 #define XD_NEWSTATE(OLD, NEW) (((OLD) & ~XD_SUB_MASK) |(NEW)) /* new state */
     75 
     76 
     77 /*
     78  * other mode data
     79  */
     80 
     81 #define XD_MODE_VERBO 0x08          /* print error messages */
     82 #define XD_MODE_B144  0x04          /* handling a bad144 sector */
     83 
     84 
     85 /*
     86  * software timers and flags
     87  */
     88 
     89 #define XDC_SUBWAITLIM	4	/* max number of "done" IOPBs there can be
     90 				   where we still allow a SUB_WAIT command */
     91 #define XDC_TICKCNT	(5*hz)	/* call xdc_tick on this interval (5 sec) */
     92 #define XDC_MAXTTL	2	/* max number of xd ticks to live */
     93 #define XDC_NOUNIT	(-1)	/* for xdcmd: no unit number */
     94 
     95 /*
     96  * a "xd_softc" structure contains per-disk state info.
     97  */
     98 
     99 struct xd_softc {
    100 	device_t sc_dev;		/* device struct, reqd by autoconf */
    101 	struct disk sc_dk;		/* generic disk info */
    102 	struct xdc_softc *parent;	/* parent */
    103 	u_short flags;			/* flags */
    104 	u_short state;			/* device state */
    105 	int xd_drive;			/* unit number */
    106 	/* geometry */
    107 	u_short ncyl, acyl, pcyl;	/* number of cyl's */
    108 	u_short sectpercyl;		/* nhead*nsect */
    109 	u_char nhead;			/* number of heads */
    110 	u_char nsect;			/* number of sectors per track */
    111 	u_char hw_spt;			/* as above, but includes spare sectors */
    112 	struct dkbad dkb;		/* bad144 sectors */
    113 };
    114 
    115 /*
    116  * flags
    117  */
    118 #define XD_WLABEL 0x0001           /* write label */
    119 
    120 /*
    121  * state
    122  */
    123 #define XD_DRIVE_UNKNOWN 0         /* never talked to it */
    124 #define XD_DRIVE_ATTACHING 1       /* attach in progress */
    125 #define XD_DRIVE_NOLABEL 2         /* drive on-line, no label */
    126 #define XD_DRIVE_ONLINE  3         /* drive is on-line */
    127 
    128 /*
    129  * a "xdc_softc" structure contains per-disk-controller state info,
    130  * including a list of active controllers.
    131  */
    132 
    133 struct xdc_softc {
    134 	device_t sc_dev;		/* device struct, reqd by autoconf */
    135 	struct evcnt sc_intrcnt;	/* event counter (for vmstat -i) */
    136 
    137 	struct callout sc_tick_ch;
    138 
    139 	struct xdc *xdc;		/* vaddr of vme registers */
    140 
    141 	struct xd_softc *sc_drives[XDC_MAXDEV]; /* drives on this controller */
    142 	int ipl;			/* interrupt level */
    143 	int vector;			/* interrupt vector */
    144 	bus_dma_tag_t dmatag;		/* Bus DMA tag */
    145 
    146 	struct xd_iorq *reqs;		/* i/o requests */
    147 	struct xd_iopb *iopbase;	/* iopb base addr (maps iopb->iorq) */
    148 	struct xd_iopb *dvmaiopb;	/* iopb base in DVMA space, not kvm */
    149 	bus_dmamap_t iopmap;		/* IOPB DMA handle */
    150 	bus_dmamap_t auxmap;		/* auxiliary DMA handle */
    151 	struct bufq_state *sc_wq;	/* queued IOPBs for this controller */
    152 	char freereq[XDC_MAXIOPB];	/* free list (stack) */
    153 	char waitq[XDC_MAXIOPB];	/* wait queue */
    154 	u_char nfree;			/* number of iopbs free */
    155 	u_char nrun;			/* number running */
    156 	u_char nwait;			/* number of waiting iopbs */
    157 	u_char ndone;			/* number of done IORQs */
    158 	u_char waithead;		/* head of queue */
    159 	u_char waitend;			/* end of queue */
    160 };
    161 
    162 /*
    163  * reset blast modes
    164  */
    165 
    166 #define XD_RSET_NONE (-1)          /* restart all requests */
    167 #define XD_RSET_ALL  (-2)          /* don't restart anything */
    168