1 /* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*- 2 * Created: Thu Jan 11 21:29:32 2001 by gareth (at) valinux.com 3 */ 4 /* 5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 6 * All Rights Reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: 28 * Gareth Hughes <gareth (at) valinux.com> 29 */ 30 31 #include "drmP.h" 32 #include "drm.h" 33 #include "mga_drm.h" 34 #include "mga_drv.h" 35 #include "mga_ucode.h" 36 37 #define MGA_WARP_CODE_ALIGN 256 /* in bytes */ 38 39 #define WARP_UCODE_SIZE( which ) \ 40 ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN) 41 42 #define WARP_UCODE_INSTALL( which, where ) \ 43 do { \ 44 DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\ 45 dev_priv->warp_pipe_phys[where] = pcbase; \ 46 memcpy( vcbase, which, sizeof(which) ); \ 47 pcbase += WARP_UCODE_SIZE( which ); \ 48 vcbase += WARP_UCODE_SIZE( which ); \ 49 } while (0) 50 51 static const unsigned int mga_warp_g400_microcode_size = 52 (WARP_UCODE_SIZE(warp_g400_tgz) + 53 WARP_UCODE_SIZE(warp_g400_tgza) + 54 WARP_UCODE_SIZE(warp_g400_tgzaf) + 55 WARP_UCODE_SIZE(warp_g400_tgzf) + 56 WARP_UCODE_SIZE(warp_g400_tgzs) + 57 WARP_UCODE_SIZE(warp_g400_tgzsa) + 58 WARP_UCODE_SIZE(warp_g400_tgzsaf) + 59 WARP_UCODE_SIZE(warp_g400_tgzsf) + 60 WARP_UCODE_SIZE(warp_g400_t2gz) + 61 WARP_UCODE_SIZE(warp_g400_t2gza) + 62 WARP_UCODE_SIZE(warp_g400_t2gzaf) + 63 WARP_UCODE_SIZE(warp_g400_t2gzf) + 64 WARP_UCODE_SIZE(warp_g400_t2gzs) + 65 WARP_UCODE_SIZE(warp_g400_t2gzsa) + 66 WARP_UCODE_SIZE(warp_g400_t2gzsaf) + 67 WARP_UCODE_SIZE(warp_g400_t2gzsf)); 68 69 static const unsigned int mga_warp_g200_microcode_size = 70 (WARP_UCODE_SIZE(warp_g200_tgz) + 71 WARP_UCODE_SIZE(warp_g200_tgza) + 72 WARP_UCODE_SIZE(warp_g200_tgzaf) + 73 WARP_UCODE_SIZE(warp_g200_tgzf) + 74 WARP_UCODE_SIZE(warp_g200_tgzs) + 75 WARP_UCODE_SIZE(warp_g200_tgzsa) + 76 WARP_UCODE_SIZE(warp_g200_tgzsaf) + 77 WARP_UCODE_SIZE(warp_g200_tgzsf)); 78 79 80 unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv) 81 { 82 switch (dev_priv->chipset) { 83 case MGA_CARD_TYPE_G400: 84 case MGA_CARD_TYPE_G550: 85 return PAGE_ALIGN(mga_warp_g400_microcode_size); 86 case MGA_CARD_TYPE_G200: 87 return PAGE_ALIGN(mga_warp_g200_microcode_size); 88 default: 89 DRM_ERROR("Unknown chipset value: 0x%x\n", dev_priv->chipset); 90 return 0; 91 } 92 } 93 94 static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv) 95 { 96 unsigned char *vcbase = dev_priv->warp->handle; 97 unsigned long pcbase = dev_priv->warp->offset; 98 99 memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); 100 101 WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ); 102 WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF); 103 WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA); 104 WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF); 105 WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS); 106 WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF); 107 WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA); 108 WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF); 109 110 WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ); 111 WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF); 112 WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA); 113 WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF); 114 WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS); 115 WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF); 116 WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA); 117 WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF); 118 119 return 0; 120 } 121 122 static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv) 123 { 124 unsigned char *vcbase = dev_priv->warp->handle; 125 unsigned long pcbase = dev_priv->warp->offset; 126 127 memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); 128 129 WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ); 130 WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF); 131 WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA); 132 WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF); 133 WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS); 134 WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF); 135 WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA); 136 WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF); 137 138 return 0; 139 } 140 141 int mga_warp_install_microcode(drm_mga_private_t * dev_priv) 142 { 143 const unsigned int size = mga_warp_microcode_size(dev_priv); 144 145 DRM_DEBUG("MGA ucode size = %d bytes\n", size); 146 if (size > dev_priv->warp->size) { 147 DRM_ERROR("microcode too large! (%u > %lu)\n", 148 size, dev_priv->warp->size); 149 return -ENOMEM; 150 } 151 152 switch (dev_priv->chipset) { 153 case MGA_CARD_TYPE_G400: 154 case MGA_CARD_TYPE_G550: 155 return mga_warp_install_g400_microcode(dev_priv); 156 case MGA_CARD_TYPE_G200: 157 return mga_warp_install_g200_microcode(dev_priv); 158 default: 159 return -EINVAL; 160 } 161 } 162 163 #define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) 164 165 int mga_warp_init(drm_mga_private_t * dev_priv) 166 { 167 u32 wmisc; 168 169 /* FIXME: Get rid of these damned magic numbers... 170 */ 171 switch (dev_priv->chipset) { 172 case MGA_CARD_TYPE_G400: 173 case MGA_CARD_TYPE_G550: 174 MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND); 175 MGA_WRITE(MGA_WGETMSB, 0x00000E00); 176 MGA_WRITE(MGA_WVRTXSZ, 0x00001807); 177 MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000); 178 break; 179 case MGA_CARD_TYPE_G200: 180 MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND); 181 MGA_WRITE(MGA_WGETMSB, 0x1606); 182 MGA_WRITE(MGA_WVRTXSZ, 7); 183 break; 184 default: 185 return -EINVAL; 186 } 187 188 MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE | 189 MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE)); 190 wmisc = MGA_READ(MGA_WMISC); 191 if (wmisc != WMISC_EXPECTED) { 192 DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n", 193 wmisc, WMISC_EXPECTED); 194 return -EINVAL; 195 } 196 197 return 0; 198 } 199
Indexes created Sun Sep 21 18:09:52 GMT 2025