1 /* $NetBSD: opp.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */ 2 3 /* 4 * Copyright 2012-15 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28 #ifndef __DAL_OPP_H__ 29 #define __DAL_OPP_H__ 30 31 #include "hw_shared.h" 32 #include "dc_hw_types.h" 33 #include "transform.h" 34 #include "mpc.h" 35 36 struct fixed31_32; 37 38 /* TODO: Need cleanup */ 39 enum clamping_range { 40 CLAMPING_FULL_RANGE = 0, /* No Clamping */ 41 CLAMPING_LIMITED_RANGE_8BPC, /* 8 bpc: Clamping 1 to FE */ 42 CLAMPING_LIMITED_RANGE_10BPC, /* 10 bpc: Clamping 4 to 3FB */ 43 CLAMPING_LIMITED_RANGE_12BPC, /* 12 bpc: Clamping 10 to FEF */ 44 /* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */ 45 CLAMPING_LIMITED_RANGE_PROGRAMMABLE 46 }; 47 48 struct clamping_and_pixel_encoding_params { 49 enum dc_pixel_encoding pixel_encoding; /* Pixel Encoding */ 50 enum clamping_range clamping_level; /* Clamping identifier */ 51 enum dc_color_depth c_depth; /* Deep color use. */ 52 }; 53 54 struct bit_depth_reduction_params { 55 struct { 56 /* truncate/round */ 57 /* trunc/round enabled*/ 58 uint32_t TRUNCATE_ENABLED:1; 59 /* 2 bits: 0=6 bpc, 1=8 bpc, 2 = 10bpc*/ 60 uint32_t TRUNCATE_DEPTH:2; 61 /* truncate or round*/ 62 uint32_t TRUNCATE_MODE:1; 63 64 /* spatial dither */ 65 /* Spatial Bit Depth Reduction enabled*/ 66 uint32_t SPATIAL_DITHER_ENABLED:1; 67 /* 2 bits: 0=6 bpc, 1 = 8 bpc, 2 = 10bpc*/ 68 uint32_t SPATIAL_DITHER_DEPTH:2; 69 /* 0-3 to select patterns*/ 70 uint32_t SPATIAL_DITHER_MODE:2; 71 /* Enable RGB random dithering*/ 72 uint32_t RGB_RANDOM:1; 73 /* Enable Frame random dithering*/ 74 uint32_t FRAME_RANDOM:1; 75 /* Enable HighPass random dithering*/ 76 uint32_t HIGHPASS_RANDOM:1; 77 78 /* temporal dither*/ 79 /* frame modulation enabled*/ 80 uint32_t FRAME_MODULATION_ENABLED:1; 81 /* same as for trunc/spatial*/ 82 uint32_t FRAME_MODULATION_DEPTH:2; 83 /* 2/4 gray levels*/ 84 uint32_t TEMPORAL_LEVEL:1; 85 uint32_t FRC25:2; 86 uint32_t FRC50:2; 87 uint32_t FRC75:2; 88 } flags; 89 90 uint32_t r_seed_value; 91 uint32_t b_seed_value; 92 uint32_t g_seed_value; 93 enum dc_pixel_encoding pixel_encoding; 94 }; 95 96 enum wide_gamut_regamma_mode { 97 /* 0x0 - BITS2:0 Bypass */ 98 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_BYPASS, 99 /* 0x1 - Fixed curve sRGB 2.4 */ 100 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_SRGB24, 101 /* 0x2 - Fixed curve xvYCC 2.22 */ 102 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_XYYCC22, 103 /* 0x3 - Programmable control A */ 104 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_A, 105 /* 0x4 - Programmable control B */ 106 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_B, 107 /* 0x0 - BITS6:4 Bypass */ 108 WIDE_GAMUT_REGAMMA_MODE_OVL_BYPASS, 109 /* 0x1 - Fixed curve sRGB 2.4 */ 110 WIDE_GAMUT_REGAMMA_MODE_OVL_SRGB24, 111 /* 0x2 - Fixed curve xvYCC 2.22 */ 112 WIDE_GAMUT_REGAMMA_MODE_OVL_XYYCC22, 113 /* 0x3 - Programmable control A */ 114 WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_A, 115 /* 0x4 - Programmable control B */ 116 WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B 117 }; 118 119 struct gamma_pixel { 120 struct fixed31_32 r; 121 struct fixed31_32 g; 122 struct fixed31_32 b; 123 }; 124 125 enum channel_name { 126 CHANNEL_NAME_RED, 127 CHANNEL_NAME_GREEN, 128 CHANNEL_NAME_BLUE 129 }; 130 131 struct custom_float_format { 132 uint32_t mantissa_bits; 133 uint32_t exponenta_bits; 134 bool sign; 135 }; 136 137 struct custom_float_value { 138 uint32_t mantissa; 139 uint32_t exponenta; 140 uint32_t value; 141 bool negative; 142 }; 143 144 struct hw_x_point { 145 uint32_t custom_float_x; 146 struct fixed31_32 x; 147 struct fixed31_32 regamma_y_red; 148 struct fixed31_32 regamma_y_green; 149 struct fixed31_32 regamma_y_blue; 150 151 }; 152 153 struct pwl_float_data_ex { 154 struct fixed31_32 r; 155 struct fixed31_32 g; 156 struct fixed31_32 b; 157 struct fixed31_32 delta_r; 158 struct fixed31_32 delta_g; 159 struct fixed31_32 delta_b; 160 }; 161 162 enum hw_point_position { 163 /* hw point sits between left and right sw points */ 164 HW_POINT_POSITION_MIDDLE, 165 /* hw point lays left from left (smaller) sw point */ 166 HW_POINT_POSITION_LEFT, 167 /* hw point lays stays from right (bigger) sw point */ 168 HW_POINT_POSITION_RIGHT 169 }; 170 171 struct gamma_point { 172 int32_t left_index; 173 int32_t right_index; 174 enum hw_point_position pos; 175 struct fixed31_32 coeff; 176 }; 177 178 struct pixel_gamma_point { 179 struct gamma_point r; 180 struct gamma_point g; 181 struct gamma_point b; 182 }; 183 184 struct gamma_coefficients { 185 struct fixed31_32 a0[3]; 186 struct fixed31_32 a1[3]; 187 struct fixed31_32 a2[3]; 188 struct fixed31_32 a3[3]; 189 struct fixed31_32 user_gamma[3]; 190 struct fixed31_32 user_contrast; 191 struct fixed31_32 user_brightness; 192 }; 193 194 struct pwl_float_data { 195 struct fixed31_32 r; 196 struct fixed31_32 g; 197 struct fixed31_32 b; 198 }; 199 200 struct mpc_tree_cfg { 201 int num_pipes; 202 int dpp[MAX_PIPES]; 203 int mpcc[MAX_PIPES]; 204 }; 205 206 struct output_pixel_processor { 207 struct dc_context *ctx; 208 uint32_t inst; 209 struct pwl_params regamma_params; 210 struct mpc_tree mpc_tree_params; 211 bool mpcc_disconnect_pending[MAX_PIPES]; 212 const struct opp_funcs *funcs; 213 uint32_t dyn_expansion; 214 }; 215 216 enum fmt_stereo_action { 217 FMT_STEREO_ACTION_ENABLE = 0, 218 FMT_STEREO_ACTION_DISABLE, 219 FMT_STEREO_ACTION_UPDATE_POLARITY 220 }; 221 222 struct opp_grph_csc_adjustment { 223 //enum grph_color_adjust_option color_adjust_option; 224 enum dc_color_space c_space; 225 enum dc_color_depth color_depth; /* clean up to uint32_t */ 226 enum graphics_csc_adjust_type csc_adjust_type; 227 int32_t adjust_divider; 228 int32_t grph_cont; 229 int32_t grph_sat; 230 int32_t grph_bright; 231 int32_t grph_hue; 232 }; 233 234 /* Underlay related types */ 235 236 struct hw_adjustment_range { 237 int32_t hw_default; 238 int32_t min; 239 int32_t max; 240 int32_t step; 241 uint32_t divider; /* (actually HW range is min/divider; divider !=0) */ 242 }; 243 244 enum ovl_csc_adjust_item { 245 OVERLAY_BRIGHTNESS = 0, 246 OVERLAY_GAMMA, 247 OVERLAY_CONTRAST, 248 OVERLAY_SATURATION, 249 OVERLAY_HUE, 250 OVERLAY_ALPHA, 251 OVERLAY_ALPHA_PER_PIX, 252 OVERLAY_COLOR_TEMPERATURE 253 }; 254 255 enum oppbuf_display_segmentation { 256 OPPBUF_DISPLAY_SEGMENTATION_1_SEGMENT = 0, 257 OPPBUF_DISPLAY_SEGMENTATION_2_SEGMENT = 1, 258 OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT = 2, 259 OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT_SPLIT_LEFT = 3, 260 OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT_SPLIT_RIGHT = 4 261 }; 262 263 struct oppbuf_params { 264 uint32_t active_width; 265 enum oppbuf_display_segmentation mso_segmentation; 266 uint32_t mso_overlap_pixel_num; 267 uint32_t pixel_repetition; 268 uint32_t num_segment_padded_pixels; 269 }; 270 271 struct opp_funcs { 272 273 274 /* FORMATTER RELATED */ 275 276 void (*opp_program_fmt)( 277 struct output_pixel_processor *opp, 278 struct bit_depth_reduction_params *fmt_bit_depth, 279 struct clamping_and_pixel_encoding_params *clamping); 280 281 void (*opp_set_dyn_expansion)( 282 struct output_pixel_processor *opp, 283 enum dc_color_space color_sp, 284 enum dc_color_depth color_dpth, 285 enum signal_type signal); 286 287 void (*opp_program_bit_depth_reduction)( 288 struct output_pixel_processor *opp, 289 const struct bit_depth_reduction_params *params); 290 291 /* underlay related */ 292 void (*opp_get_underlay_adjustment_range)( 293 struct output_pixel_processor *opp, 294 enum ovl_csc_adjust_item overlay_adjust_item, 295 struct hw_adjustment_range *range); 296 297 void (*opp_destroy)(struct output_pixel_processor **opp); 298 299 void (*opp_program_stereo)( 300 struct output_pixel_processor *opp, 301 bool enable, 302 const struct dc_crtc_timing *timing); 303 304 void (*opp_pipe_clock_control)( 305 struct output_pixel_processor *opp, 306 bool enable); 307 308 void (*opp_set_disp_pattern_generator)( 309 struct output_pixel_processor *opp, 310 enum controller_dp_test_pattern test_pattern, 311 enum controller_dp_color_space color_space, 312 enum dc_color_depth color_depth, 313 const struct tg_color *solid_color, 314 int width, 315 int height); 316 317 bool (*dpg_is_blanked)( 318 struct output_pixel_processor *opp); 319 320 void (*opp_dpg_set_blank_color)( 321 struct output_pixel_processor *opp, 322 const struct tg_color *color); 323 324 void (*opp_program_left_edge_extra_pixel)( 325 struct output_pixel_processor *opp, 326 bool count); 327 328 }; 329 330 #endif 331
Indexes created Sat Sep 20 22:09:52 GMT 2025