1 /* $NetBSD: pptable.h,v 1.3 2021/12/18 23:45:08 riastradh Exp $ */ 2 3 /* 4 * Copyright 2013 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 */ 24 25 #ifndef _PPTABLE_H 26 #define _PPTABLE_H 27 28 #pragma pack(1) 29 30 typedef struct _ATOM_PPLIB_THERMALCONTROLLER 31 32 { 33 UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_* 34 UCHAR ucI2cLine; // as interpreted by DAL I2C 35 UCHAR ucI2cAddress; 36 UCHAR ucFanParameters; // Fan Control Parameters. 37 UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only. 38 UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only. 39 UCHAR ucReserved; // ---- 40 UCHAR ucFlags; // to be defined 41 } ATOM_PPLIB_THERMALCONTROLLER; 42 43 #define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f 44 #define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller. 45 46 #define ATOM_PP_THERMALCONTROLLER_NONE 0 47 #define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib 48 #define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib 49 #define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib 50 #define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib 51 #define ATOM_PP_THERMALCONTROLLER_LM64 5 52 #define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib 53 #define ATOM_PP_THERMALCONTROLLER_RV6xx 7 54 #define ATOM_PP_THERMALCONTROLLER_RV770 8 55 #define ATOM_PP_THERMALCONTROLLER_ADT7473 9 56 #define ATOM_PP_THERMALCONTROLLER_KONG 10 57 #define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO 11 58 #define ATOM_PP_THERMALCONTROLLER_EVERGREEN 12 59 #define ATOM_PP_THERMALCONTROLLER_EMC2103 13 /* 0x0D */ // Only fan control will be implemented, do NOT show this in PPGen. 60 #define ATOM_PP_THERMALCONTROLLER_SUMO 14 /* 0x0E */ // Sumo type, used internally 61 #define ATOM_PP_THERMALCONTROLLER_NISLANDS 15 62 #define ATOM_PP_THERMALCONTROLLER_SISLANDS 16 63 #define ATOM_PP_THERMALCONTROLLER_LM96163 17 64 #define ATOM_PP_THERMALCONTROLLER_CISLANDS 18 65 #define ATOM_PP_THERMALCONTROLLER_KAVERI 19 66 #define ATOM_PP_THERMALCONTROLLER_ICELAND 20 67 #define ATOM_PP_THERMALCONTROLLER_TONGA 21 68 #define ATOM_PP_THERMALCONTROLLER_FIJI 22 69 #define ATOM_PP_THERMALCONTROLLER_POLARIS10 23 70 #define ATOM_PP_THERMALCONTROLLER_VEGA10 24 71 72 73 // Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal. 74 // We probably should reserve the bit 0x80 for this use. 75 // To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here). 76 // The driver can pick the correct internal controller based on the ASIC. 77 #define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal Thermal Controller 78 #define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D // EMC2103 Fan Control + Internal Thermal Controller 79 80 typedef struct _ATOM_PPLIB_STATE 81 { 82 UCHAR ucNonClockStateIndex; 83 UCHAR ucClockStateIndices[1]; // variable-sized 84 } ATOM_PPLIB_STATE; 85 86 87 typedef struct _ATOM_PPLIB_FANTABLE 88 { 89 UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same. 90 UCHAR ucTHyst; // Temperature hysteresis. Integer. 91 USHORT usTMin; // The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. 92 USHORT usTMed; // The middle temperature where we change slopes. 93 USHORT usTHigh; // The high point above TMed for adjusting the second slope. 94 USHORT usPWMMin; // The minimum PWM value in percent (0.01% increments). 95 USHORT usPWMMed; // The PWM value (in percent) at TMed. 96 USHORT usPWMHigh; // The PWM value at THigh. 97 } ATOM_PPLIB_FANTABLE; 98 99 typedef struct _ATOM_PPLIB_FANTABLE2 100 { 101 ATOM_PPLIB_FANTABLE basicTable; 102 USHORT usTMax; // The max temperature 103 } ATOM_PPLIB_FANTABLE2; 104 105 typedef struct _ATOM_PPLIB_FANTABLE3 106 { 107 ATOM_PPLIB_FANTABLE2 basicTable2; 108 UCHAR ucFanControlMode; 109 USHORT usFanPWMMax; 110 USHORT usFanOutputSensitivity; 111 } ATOM_PPLIB_FANTABLE3; 112 113 typedef struct _ATOM_PPLIB_FANTABLE4 114 { 115 ATOM_PPLIB_FANTABLE3 basicTable3; 116 USHORT usFanRPMMax; 117 } ATOM_PPLIB_FANTABLE4; 118 119 typedef struct _ATOM_PPLIB_FANTABLE5 120 { 121 ATOM_PPLIB_FANTABLE4 basicTable4; 122 USHORT usFanCurrentLow; 123 USHORT usFanCurrentHigh; 124 USHORT usFanRPMLow; 125 USHORT usFanRPMHigh; 126 } ATOM_PPLIB_FANTABLE5; 127 128 typedef struct _ATOM_PPLIB_EXTENDEDHEADER 129 { 130 USHORT usSize; 131 ULONG ulMaxEngineClock; // For Overdrive. 132 ULONG ulMaxMemoryClock; // For Overdrive. 133 // Add extra system parameters here, always adjust size to include all fields. 134 USHORT usVCETableOffset; //points to ATOM_PPLIB_VCE_Table 135 USHORT usUVDTableOffset; //points to ATOM_PPLIB_UVD_Table 136 USHORT usSAMUTableOffset; //points to ATOM_PPLIB_SAMU_Table 137 USHORT usPPMTableOffset; //points to ATOM_PPLIB_PPM_Table 138 USHORT usACPTableOffset; //points to ATOM_PPLIB_ACP_Table 139 /* points to ATOM_PPLIB_POWERTUNE_Table */ 140 USHORT usPowerTuneTableOffset; 141 /* points to ATOM_PPLIB_CLOCK_Voltage_Dependency_Table for sclkVddgfxTable */ 142 USHORT usSclkVddgfxTableOffset; 143 USHORT usVQBudgetingTableOffset; /* points to the vqBudgetingTable; */ 144 } ATOM_PPLIB_EXTENDEDHEADER; 145 146 //// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps 147 #define ATOM_PP_PLATFORM_CAP_BACKBIAS 1 148 #define ATOM_PP_PLATFORM_CAP_POWERPLAY 2 149 #define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4 150 #define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8 151 #define ATOM_PP_PLATFORM_CAP_ASPM_L1 16 152 #define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32 153 #define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64 154 #define ATOM_PP_PLATFORM_CAP_STEPVDDC 128 155 #define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256 156 #define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512 157 #define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024 158 #define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048 159 #define ATOM_PP_PLATFORM_CAP_MVDDCONTROL 4096 160 #define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition. 161 #define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition). 162 #define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 // Does the driver control VDDCI independently from VDDC. 163 #define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT 0x00010000 // Enable the 'regulator hot' feature. 164 #define ATOM_PP_PLATFORM_CAP_BACO 0x00020000 // Does the driver supports BACO state. 165 #define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE 0x00040000 // Does the driver supports new CAC voltage table. 166 #define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY 0x00080000 // Does the driver supports revert GPIO5 polarity. 167 #define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x00100000 // Does the driver supports thermal2GPIO17. 168 #define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE 0x00200000 // Does the driver supports VR HOT GPIO Configurable. 169 #define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x00400000 // Does the driver supports Temp Inversion feature. 170 #define ATOM_PP_PLATFORM_CAP_EVV 0x00800000 171 #define ATOM_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x01000000 172 #define ATOM_PP_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE 0x02000000 173 #define ATOM_PP_PLATFORM_CAP_DISABLE_USING_ACTUAL_TEMPERATURE_FOR_POWER_CALC 0x04000000 174 #define ATOM_PP_PLATFORM_CAP_VRHOT_POLARITY_HIGH 0x08000000 175 176 typedef struct _ATOM_PPLIB_POWERPLAYTABLE 177 { 178 ATOM_COMMON_TABLE_HEADER sHeader; 179 180 UCHAR ucDataRevision; 181 182 UCHAR ucNumStates; 183 UCHAR ucStateEntrySize; 184 UCHAR ucClockInfoSize; 185 UCHAR ucNonClockSize; 186 187 // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures 188 USHORT usStateArrayOffset; 189 190 // offset from start of this table to array of ASIC-specific structures, 191 // currently ATOM_PPLIB_CLOCK_INFO. 192 USHORT usClockInfoArrayOffset; 193 194 // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO 195 USHORT usNonClockInfoArrayOffset; 196 197 USHORT usBackbiasTime; // in microseconds 198 USHORT usVoltageTime; // in microseconds 199 USHORT usTableSize; //the size of this structure, or the extended structure 200 201 ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_* 202 203 ATOM_PPLIB_THERMALCONTROLLER sThermalController; 204 205 USHORT usBootClockInfoOffset; 206 USHORT usBootNonClockInfoOffset; 207 208 } ATOM_PPLIB_POWERPLAYTABLE; 209 210 typedef struct _ATOM_PPLIB_POWERPLAYTABLE2 211 { 212 ATOM_PPLIB_POWERPLAYTABLE basicTable; 213 UCHAR ucNumCustomThermalPolicy; 214 USHORT usCustomThermalPolicyArrayOffset; 215 }ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2; 216 217 typedef struct _ATOM_PPLIB_POWERPLAYTABLE3 218 { 219 ATOM_PPLIB_POWERPLAYTABLE2 basicTable2; 220 USHORT usFormatID; // To be used ONLY by PPGen. 221 USHORT usFanTableOffset; 222 USHORT usExtendendedHeaderOffset; 223 } ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3; 224 225 typedef struct _ATOM_PPLIB_POWERPLAYTABLE4 226 { 227 ATOM_PPLIB_POWERPLAYTABLE3 basicTable3; 228 ULONG ulGoldenPPID; // PPGen use only 229 ULONG ulGoldenRevision; // PPGen use only 230 USHORT usVddcDependencyOnSCLKOffset; 231 USHORT usVddciDependencyOnMCLKOffset; 232 USHORT usVddcDependencyOnMCLKOffset; 233 USHORT usMaxClockVoltageOnDCOffset; 234 USHORT usVddcPhaseShedLimitsTableOffset; // Points to ATOM_PPLIB_PhaseSheddingLimits_Table 235 USHORT usMvddDependencyOnMCLKOffset; 236 } ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4; 237 238 typedef struct _ATOM_PPLIB_POWERPLAYTABLE5 239 { 240 ATOM_PPLIB_POWERPLAYTABLE4 basicTable4; 241 ULONG ulTDPLimit; 242 ULONG ulNearTDPLimit; 243 ULONG ulSQRampingThreshold; 244 USHORT usCACLeakageTableOffset; // Points to ATOM_PPLIB_CAC_Leakage_Table 245 ULONG ulCACLeakage; // The iLeakage for driver calculated CAC leakage table 246 USHORT usTDPODLimit; 247 USHORT usLoadLineSlope; // in milliOhms * 100 248 } ATOM_PPLIB_POWERPLAYTABLE5, *LPATOM_PPLIB_POWERPLAYTABLE5; 249 250 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification 251 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 252 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0 253 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0 254 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1 255 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3 256 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5 257 // 2, 4, 6, 7 are reserved 258 259 #define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008 260 #define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010 261 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020 262 #define ATOM_PPLIB_CLASSIFICATION_REST 0x0040 263 #define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080 264 #define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100 265 #define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200 266 #define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400 267 #define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800 268 #define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000 269 #define ATOM_PPLIB_CLASSIFICATION_HD2STATE 0x2000 270 #define ATOM_PPLIB_CLASSIFICATION_HDSTATE 0x4000 271 #define ATOM_PPLIB_CLASSIFICATION_SDSTATE 0x8000 272 273 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification2 274 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001 275 #define ATOM_PPLIB_CLASSIFICATION2_ULV 0x0002 276 #define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D) 277 278 //// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings 279 #define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001 280 #define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002 281 282 // 0 is 2.5Gb/s, 1 is 5Gb/s 283 #define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004 284 #define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2 285 286 // lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec 287 #define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8 288 #define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3 289 290 // lookup into reduced refresh-rate table 291 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00 292 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8 293 294 #define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0 295 #define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1 296 // 2-15 TBD as needed. 297 298 #define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000 299 #define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000 300 301 #define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000 302 303 #define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000 304 305 //memory related flags 306 #define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF 0x000010000 307 308 //M3 Arb //2bits, current 3 sets of parameters in total 309 #define ATOM_PPLIB_M3ARB_MASK 0x00060000 310 #define ATOM_PPLIB_M3ARB_SHIFT 17 311 312 #define ATOM_PPLIB_ENABLE_DRR 0x00080000 313 314 // remaining 16 bits are reserved 315 typedef struct _ATOM_PPLIB_THERMAL_STATE 316 { 317 UCHAR ucMinTemperature; 318 UCHAR ucMaxTemperature; 319 UCHAR ucThermalAction; 320 }ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE; 321 322 // Contained in an array starting at the offset 323 // in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset. 324 // referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex 325 #define ATOM_PPLIB_NONCLOCKINFO_VER1 12 326 #define ATOM_PPLIB_NONCLOCKINFO_VER2 24 327 typedef struct _ATOM_PPLIB_NONCLOCK_INFO 328 { 329 USHORT usClassification; 330 UCHAR ucMinTemperature; 331 UCHAR ucMaxTemperature; 332 ULONG ulCapsAndSettings; 333 UCHAR ucRequiredPower; 334 USHORT usClassification2; 335 ULONG ulVCLK; 336 ULONG ulDCLK; 337 UCHAR ucUnused[5]; 338 } ATOM_PPLIB_NONCLOCK_INFO; 339 340 // Contained in an array starting at the offset 341 // in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset. 342 // referenced from ATOM_PPLIB_STATE::ucClockStateIndices 343 typedef struct _ATOM_PPLIB_R600_CLOCK_INFO 344 { 345 USHORT usEngineClockLow; 346 UCHAR ucEngineClockHigh; 347 348 USHORT usMemoryClockLow; 349 UCHAR ucMemoryClockHigh; 350 351 USHORT usVDDC; 352 USHORT usUnused1; 353 USHORT usUnused2; 354 355 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_* 356 357 } ATOM_PPLIB_R600_CLOCK_INFO; 358 359 // ulFlags in ATOM_PPLIB_R600_CLOCK_INFO 360 #define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1 361 #define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2 362 #define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4 363 #define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8 364 #define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16 365 #define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low power' setting (sequencer S0). 366 367 typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO 368 369 { 370 USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600). 371 UCHAR ucLowEngineClockHigh; 372 USHORT usHighEngineClockLow; // High Engine clock in MHz. 373 UCHAR ucHighEngineClockHigh; 374 USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants. 375 UCHAR ucMemoryClockHigh; // Currentyl unused. 376 UCHAR ucPadding; // For proper alignment and size. 377 USHORT usVDDC; // For the 780, use: None, Low, High, Variable 378 UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16} 379 UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could 380 USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200). 381 ULONG ulFlags; 382 } ATOM_PPLIB_RS780_CLOCK_INFO; 383 384 #define ATOM_PPLIB_RS780_VOLTAGE_NONE 0 385 #define ATOM_PPLIB_RS780_VOLTAGE_LOW 1 386 #define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2 387 #define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3 388 389 #define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is. 390 #define ATOM_PPLIB_RS780_SPMCLK_LOW 1 391 #define ATOM_PPLIB_RS780_SPMCLK_HIGH 2 392 393 #define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0 394 #define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1 395 #define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2 396 397 typedef struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO 398 { 399 USHORT usEngineClockLow; 400 UCHAR ucEngineClockHigh; 401 402 USHORT usMemoryClockLow; 403 UCHAR ucMemoryClockHigh; 404 405 USHORT usVDDC; 406 USHORT usVDDCI; 407 USHORT usUnused; 408 409 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_* 410 411 } ATOM_PPLIB_EVERGREEN_CLOCK_INFO; 412 413 typedef struct _ATOM_PPLIB_SI_CLOCK_INFO 414 { 415 USHORT usEngineClockLow; 416 UCHAR ucEngineClockHigh; 417 418 USHORT usMemoryClockLow; 419 UCHAR ucMemoryClockHigh; 420 421 USHORT usVDDC; 422 USHORT usVDDCI; 423 UCHAR ucPCIEGen; 424 UCHAR ucUnused1; 425 426 ULONG ulFlags; // ATOM_PPLIB_SI_FLAGS_*, no flag is necessary for now 427 428 } ATOM_PPLIB_SI_CLOCK_INFO; 429 430 typedef struct _ATOM_PPLIB_CI_CLOCK_INFO 431 { 432 USHORT usEngineClockLow; 433 UCHAR ucEngineClockHigh; 434 435 USHORT usMemoryClockLow; 436 UCHAR ucMemoryClockHigh; 437 438 UCHAR ucPCIEGen; 439 USHORT usPCIELane; 440 } ATOM_PPLIB_CI_CLOCK_INFO; 441 442 typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{ 443 USHORT usEngineClockLow; //clockfrequency & 0xFFFF. The unit is in 10khz 444 UCHAR ucEngineClockHigh; //clockfrequency >> 16. 445 UCHAR vddcIndex; //2-bit vddc index; 446 USHORT tdpLimit; 447 //please initalize to 0 448 USHORT rsv1; 449 //please initialize to 0s 450 ULONG rsv2[2]; 451 }ATOM_PPLIB_SUMO_CLOCK_INFO; 452 453 typedef struct _ATOM_PPLIB_KV_CLOCK_INFO { 454 USHORT usEngineClockLow; 455 UCHAR ucEngineClockHigh; 456 UCHAR vddcIndex; 457 USHORT tdpLimit; 458 USHORT rsv1; 459 ULONG rsv2[2]; 460 } ATOM_PPLIB_KV_CLOCK_INFO; 461 462 typedef struct _ATOM_PPLIB_CZ_CLOCK_INFO { 463 UCHAR index; 464 UCHAR rsv[3]; 465 } ATOM_PPLIB_CZ_CLOCK_INFO; 466 467 typedef struct _ATOM_PPLIB_STATE_V2 468 { 469 //number of valid dpm levels in this state; Driver uses it to calculate the whole 470 //size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR) 471 UCHAR ucNumDPMLevels; 472 473 //a index to the array of nonClockInfos 474 UCHAR nonClockInfoIndex; 475 /** 476 * Driver will read the first ucNumDPMLevels in this array 477 */ 478 UCHAR clockInfoIndex[1]; 479 } ATOM_PPLIB_STATE_V2; 480 481 typedef struct _StateArray{ 482 //how many states we have 483 UCHAR ucNumEntries; 484 485 ATOM_PPLIB_STATE_V2 states[1]; 486 }StateArray; 487 488 489 typedef struct _ClockInfoArray{ 490 //how many clock levels we have 491 UCHAR ucNumEntries; 492 493 //sizeof(ATOM_PPLIB_CLOCK_INFO) 494 UCHAR ucEntrySize; 495 496 UCHAR clockInfo[1]; 497 }ClockInfoArray; 498 499 typedef struct _NonClockInfoArray{ 500 501 //how many non-clock levels we have. normally should be same as number of states 502 UCHAR ucNumEntries; 503 //sizeof(ATOM_PPLIB_NONCLOCK_INFO) 504 UCHAR ucEntrySize; 505 506 ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1]; 507 }NonClockInfoArray; 508 509 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record 510 { 511 USHORT usClockLow; 512 UCHAR ucClockHigh; 513 USHORT usVoltage; 514 }ATOM_PPLIB_Clock_Voltage_Dependency_Record; 515 516 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table 517 { 518 UCHAR ucNumEntries; // Number of entries. 519 ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries. 520 }ATOM_PPLIB_Clock_Voltage_Dependency_Table; 521 522 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record 523 { 524 USHORT usSclkLow; 525 UCHAR ucSclkHigh; 526 USHORT usMclkLow; 527 UCHAR ucMclkHigh; 528 USHORT usVddc; 529 USHORT usVddci; 530 }ATOM_PPLIB_Clock_Voltage_Limit_Record; 531 532 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table 533 { 534 UCHAR ucNumEntries; // Number of entries. 535 ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries. 536 }ATOM_PPLIB_Clock_Voltage_Limit_Table; 537 538 union _ATOM_PPLIB_CAC_Leakage_Record 539 { 540 struct 541 { 542 USHORT usVddc; // We use this field for the "fake" standardized VDDC for power calculations; For CI and newer, we use this as the real VDDC value. in CI we read it as StdVoltageHiSidd 543 ULONG ulLeakageValue; // For CI and newer we use this as the "fake" standar VDDC value. in CI we read it as StdVoltageLoSidd 544 545 }; 546 struct 547 { 548 USHORT usVddc1; 549 USHORT usVddc2; 550 USHORT usVddc3; 551 }; 552 }; 553 554 typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record; 555 556 typedef struct _ATOM_PPLIB_CAC_Leakage_Table 557 { 558 UCHAR ucNumEntries; // Number of entries. 559 ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries. 560 }ATOM_PPLIB_CAC_Leakage_Table; 561 562 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record 563 { 564 USHORT usVoltage; 565 USHORT usSclkLow; 566 UCHAR ucSclkHigh; 567 USHORT usMclkLow; 568 UCHAR ucMclkHigh; 569 }ATOM_PPLIB_PhaseSheddingLimits_Record; 570 571 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table 572 { 573 UCHAR ucNumEntries; // Number of entries. 574 ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries. 575 }ATOM_PPLIB_PhaseSheddingLimits_Table; 576 577 typedef struct _VCEClockInfo{ 578 USHORT usEVClkLow; 579 UCHAR ucEVClkHigh; 580 USHORT usECClkLow; 581 UCHAR ucECClkHigh; 582 }VCEClockInfo; 583 584 typedef struct _VCEClockInfoArray{ 585 UCHAR ucNumEntries; 586 VCEClockInfo entries[1]; 587 }VCEClockInfoArray; 588 589 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record 590 { 591 USHORT usVoltage; 592 UCHAR ucVCEClockInfoIndex; 593 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record; 594 595 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table 596 { 597 UCHAR numEntries; 598 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1]; 599 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table; 600 601 typedef struct _ATOM_PPLIB_VCE_State_Record 602 { 603 UCHAR ucVCEClockInfoIndex; 604 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary 605 }ATOM_PPLIB_VCE_State_Record; 606 607 typedef struct _ATOM_PPLIB_VCE_State_Table 608 { 609 UCHAR numEntries; 610 ATOM_PPLIB_VCE_State_Record entries[1]; 611 }ATOM_PPLIB_VCE_State_Table; 612 613 614 typedef struct _ATOM_PPLIB_VCE_Table 615 { 616 UCHAR revid; 617 // VCEClockInfoArray array; 618 // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits; 619 // ATOM_PPLIB_VCE_State_Table states; 620 }ATOM_PPLIB_VCE_Table; 621 622 623 typedef struct _UVDClockInfo{ 624 USHORT usVClkLow; 625 UCHAR ucVClkHigh; 626 USHORT usDClkLow; 627 UCHAR ucDClkHigh; 628 }UVDClockInfo; 629 630 typedef struct _UVDClockInfoArray{ 631 UCHAR ucNumEntries; 632 UVDClockInfo entries[1]; 633 }UVDClockInfoArray; 634 635 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record 636 { 637 USHORT usVoltage; 638 UCHAR ucUVDClockInfoIndex; 639 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record; 640 641 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table 642 { 643 UCHAR numEntries; 644 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1]; 645 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table; 646 647 typedef struct _ATOM_PPLIB_UVD_Table 648 { 649 UCHAR revid; 650 // UVDClockInfoArray array; 651 // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits; 652 }ATOM_PPLIB_UVD_Table; 653 654 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record 655 { 656 USHORT usVoltage; 657 USHORT usSAMClockLow; 658 UCHAR ucSAMClockHigh; 659 }ATOM_PPLIB_SAMClk_Voltage_Limit_Record; 660 661 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{ 662 UCHAR numEntries; 663 ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[1]; 664 }ATOM_PPLIB_SAMClk_Voltage_Limit_Table; 665 666 typedef struct _ATOM_PPLIB_SAMU_Table 667 { 668 UCHAR revid; 669 ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits; 670 }ATOM_PPLIB_SAMU_Table; 671 672 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record 673 { 674 USHORT usVoltage; 675 USHORT usACPClockLow; 676 UCHAR ucACPClockHigh; 677 }ATOM_PPLIB_ACPClk_Voltage_Limit_Record; 678 679 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{ 680 UCHAR numEntries; 681 ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1]; 682 }ATOM_PPLIB_ACPClk_Voltage_Limit_Table; 683 684 typedef struct _ATOM_PPLIB_ACP_Table 685 { 686 UCHAR revid; 687 ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits; 688 }ATOM_PPLIB_ACP_Table; 689 690 typedef struct _ATOM_PowerTune_Table{ 691 USHORT usTDP; 692 USHORT usConfigurableTDP; 693 USHORT usTDC; 694 USHORT usBatteryPowerLimit; 695 USHORT usSmallPowerLimit; 696 USHORT usLowCACLeakage; 697 USHORT usHighCACLeakage; 698 }ATOM_PowerTune_Table; 699 700 typedef struct _ATOM_PPLIB_POWERTUNE_Table 701 { 702 UCHAR revid; 703 ATOM_PowerTune_Table power_tune_table; 704 }ATOM_PPLIB_POWERTUNE_Table; 705 706 typedef struct _ATOM_PPLIB_POWERTUNE_Table_V1 707 { 708 UCHAR revid; 709 ATOM_PowerTune_Table power_tune_table; 710 USHORT usMaximumPowerDeliveryLimit; 711 USHORT usTjMax; 712 USHORT usReserve[6]; 713 } ATOM_PPLIB_POWERTUNE_Table_V1; 714 715 #define ATOM_PPM_A_A 1 716 #define ATOM_PPM_A_I 2 717 typedef struct _ATOM_PPLIB_PPM_Table 718 { 719 UCHAR ucRevId; 720 UCHAR ucPpmDesign; //A+I or A+A 721 USHORT usCpuCoreNumber; 722 ULONG ulPlatformTDP; 723 ULONG ulSmallACPlatformTDP; 724 ULONG ulPlatformTDC; 725 ULONG ulSmallACPlatformTDC; 726 ULONG ulApuTDP; 727 ULONG ulDGpuTDP; 728 ULONG ulDGpuUlvPower; 729 ULONG ulTjmax; 730 } ATOM_PPLIB_PPM_Table; 731 732 #define VQ_DisplayConfig_NoneAWD 1 733 #define VQ_DisplayConfig_AWD 2 734 735 typedef struct ATOM_PPLIB_VQ_Budgeting_Record{ 736 ULONG ulDeviceID; 737 ULONG ulSustainableSOCPowerLimitLow; /* in mW */ 738 ULONG ulSustainableSOCPowerLimitHigh; /* in mW */ 739 740 ULONG ulDClk; 741 ULONG ulEClk; 742 ULONG ulDispSclk; 743 UCHAR ucDispConfig; 744 745 } ATOM_PPLIB_VQ_Budgeting_Record; 746 747 typedef struct ATOM_PPLIB_VQ_Budgeting_Table { 748 UCHAR revid; 749 UCHAR numEntries; 750 ATOM_PPLIB_VQ_Budgeting_Record entries[1]; 751 } ATOM_PPLIB_VQ_Budgeting_Table; 752 753 #pragma pack() 754 755 #endif 756
Indexes created Sat Sep 20 22:09:52 GMT 2025