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      1 /*	$NetBSD: intel_cdclk.h,v 1.2 2021/12/18 23:45:29 riastradh Exp $	*/
      2 
      3 /* SPDX-License-Identifier: MIT */
      4 /*
      5  * Copyright  2019 Intel Corporation
      6  */
      7 
      8 #ifndef __INTEL_CDCLK_H__
      9 #define __INTEL_CDCLK_H__
     10 
     11 #include <linux/types.h>
     12 
     13 #include "intel_display.h"
     14 
     15 struct drm_i915_private;
     16 struct intel_atomic_state;
     17 struct intel_cdclk_state;
     18 struct intel_crtc_state;
     19 
     20 struct intel_cdclk_vals {
     21 	u16 refclk;
     22 	u32 cdclk;
     23 	u8 divider;	/* CD2X divider * 2 */
     24 	u8 ratio;
     25 };
     26 
     27 int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
     28 void intel_cdclk_init(struct drm_i915_private *i915);
     29 void intel_cdclk_uninit(struct drm_i915_private *i915);
     30 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
     31 void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
     32 void intel_update_cdclk(struct drm_i915_private *dev_priv);
     33 void intel_update_rawclk(struct drm_i915_private *dev_priv);
     34 bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,
     35 			       const struct intel_cdclk_state *b);
     36 void intel_cdclk_swap_state(struct intel_atomic_state *state);
     37 void
     38 intel_set_cdclk_pre_plane_update(struct drm_i915_private *dev_priv,
     39 				 const struct intel_cdclk_state *old_state,
     40 				 const struct intel_cdclk_state *new_state,
     41 				 enum pipe pipe);
     42 void
     43 intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv,
     44 				  const struct intel_cdclk_state *old_state,
     45 				  const struct intel_cdclk_state *new_state,
     46 				  enum pipe pipe);
     47 void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
     48 			    const char *context);
     49 int intel_modeset_calc_cdclk(struct intel_atomic_state *state);
     50 
     51 #endif /* __INTEL_CDCLK_H__ */
     52