1 /* $NetBSD: intel_sdvo.c,v 1.3 2021/12/19 11:49:11 riastradh Exp $ */ 2 3 /* 4 * Copyright 2006 Dave Airlie <airlied (at) linux.ie> 5 * Copyright 2006-2007 Intel Corporation 6 * Jesse Barnes <jesse.barnes (at) intel.com> 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 25 * DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: 28 * Eric Anholt <eric (at) anholt.net> 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: intel_sdvo.c,v 1.3 2021/12/19 11:49:11 riastradh Exp $"); 33 34 #include <linux/delay.h> 35 #include <linux/export.h> 36 #include <linux/i2c.h> 37 #include <linux/slab.h> 38 39 #include <drm/drm_atomic_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_edid.h> 42 #include <drm/i915_drm.h> 43 44 #include "i915_drv.h" 45 #include "intel_atomic.h" 46 #include "intel_connector.h" 47 #include "intel_display_types.h" 48 #include "intel_fifo_underrun.h" 49 #include "intel_gmbus.h" 50 #include "intel_hdmi.h" 51 #include "intel_hotplug.h" 52 #include "intel_panel.h" 53 #include "intel_sdvo.h" 54 #include "intel_sdvo_regs.h" 55 56 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 57 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 58 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 59 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 60 61 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 62 SDVO_TV_MASK) 63 64 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 65 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 66 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 67 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 68 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 69 70 71 static const char * const tv_format_names[] = { 72 "NTSC_M" , "NTSC_J" , "NTSC_443", 73 "PAL_B" , "PAL_D" , "PAL_G" , 74 "PAL_H" , "PAL_I" , "PAL_M" , 75 "PAL_N" , "PAL_NC" , "PAL_60" , 76 "SECAM_B" , "SECAM_D" , "SECAM_G" , 77 "SECAM_K" , "SECAM_K1", "SECAM_L" , 78 "SECAM_60" 79 }; 80 81 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names) 82 83 struct intel_sdvo { 84 struct intel_encoder base; 85 86 struct i2c_adapter *i2c; 87 u8 slave_addr; 88 89 struct i2c_adapter ddc; 90 91 /* Register for the SDVO device: SDVOB or SDVOC */ 92 i915_reg_t sdvo_reg; 93 94 /* Active outputs controlled by this SDVO output */ 95 u16 controlled_output; 96 97 /* 98 * Capabilities of the SDVO device returned by 99 * intel_sdvo_get_capabilities() 100 */ 101 struct intel_sdvo_caps caps; 102 103 /* Pixel clock limitations reported by the SDVO device, in kHz */ 104 int pixel_clock_min, pixel_clock_max; 105 106 /* 107 * For multiple function SDVO device, 108 * this is for current attached outputs. 109 */ 110 u16 attached_output; 111 112 /* 113 * Hotplug activation bits for this device 114 */ 115 u16 hotplug_active; 116 117 enum port port; 118 119 bool has_hdmi_monitor; 120 bool has_hdmi_audio; 121 122 /* DDC bus used by this SDVO encoder */ 123 u8 ddc_bus; 124 125 /* 126 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 127 */ 128 u8 dtd_sdvo_flags; 129 }; 130 131 struct intel_sdvo_connector { 132 struct intel_connector base; 133 134 /* Mark the type of connector */ 135 u16 output_flag; 136 137 /* This contains all current supported TV format */ 138 u8 tv_format_supported[TV_FORMAT_NUM]; 139 int format_supported_num; 140 struct drm_property *tv_format; 141 142 /* add the property for the SDVO-TV */ 143 struct drm_property *left; 144 struct drm_property *right; 145 struct drm_property *top; 146 struct drm_property *bottom; 147 struct drm_property *hpos; 148 struct drm_property *vpos; 149 struct drm_property *contrast; 150 struct drm_property *saturation; 151 struct drm_property *hue; 152 struct drm_property *sharpness; 153 struct drm_property *flicker_filter; 154 struct drm_property *flicker_filter_adaptive; 155 struct drm_property *flicker_filter_2d; 156 struct drm_property *tv_chroma_filter; 157 struct drm_property *tv_luma_filter; 158 struct drm_property *dot_crawl; 159 160 /* add the property for the SDVO-TV/LVDS */ 161 struct drm_property *brightness; 162 163 /* this is to get the range of margin.*/ 164 u32 max_hscan, max_vscan; 165 166 /** 167 * This is set if we treat the device as HDMI, instead of DVI. 168 */ 169 bool is_hdmi; 170 }; 171 172 struct intel_sdvo_connector_state { 173 /* base.base: tv.saturation/contrast/hue/brightness */ 174 struct intel_digital_connector_state base; 175 176 struct { 177 unsigned overscan_h, overscan_v, hpos, vpos, sharpness; 178 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive; 179 unsigned chroma_filter, luma_filter, dot_crawl; 180 } tv; 181 }; 182 183 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) 184 { 185 return container_of(encoder, struct intel_sdvo, base); 186 } 187 188 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector) 189 { 190 return to_sdvo(intel_attached_encoder(connector)); 191 } 192 193 static struct intel_sdvo_connector * 194 to_intel_sdvo_connector(struct drm_connector *connector) 195 { 196 return container_of(connector, struct intel_sdvo_connector, base.base); 197 } 198 199 #define to_intel_sdvo_connector_state(conn_state) \ 200 container_of((conn_state), struct intel_sdvo_connector_state, base.base) 201 202 static bool 203 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags); 204 static bool 205 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 206 struct intel_sdvo_connector *intel_sdvo_connector, 207 int type); 208 static bool 209 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 210 struct intel_sdvo_connector *intel_sdvo_connector); 211 212 /* 213 * Writes the SDVOB or SDVOC with the given value, but always writes both 214 * SDVOB and SDVOC to work around apparent hardware issues (according to 215 * comments in the BIOS). 216 */ 217 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 218 { 219 struct drm_device *dev = intel_sdvo->base.base.dev; 220 struct drm_i915_private *dev_priv = to_i915(dev); 221 u32 bval = val, cval = val; 222 int i; 223 224 if (HAS_PCH_SPLIT(dev_priv)) { 225 I915_WRITE(intel_sdvo->sdvo_reg, val); 226 POSTING_READ(intel_sdvo->sdvo_reg); 227 /* 228 * HW workaround, need to write this twice for issue 229 * that may result in first write getting masked. 230 */ 231 if (HAS_PCH_IBX(dev_priv)) { 232 I915_WRITE(intel_sdvo->sdvo_reg, val); 233 POSTING_READ(intel_sdvo->sdvo_reg); 234 } 235 return; 236 } 237 238 if (intel_sdvo->port == PORT_B) 239 cval = I915_READ(GEN3_SDVOC); 240 else 241 bval = I915_READ(GEN3_SDVOB); 242 243 /* 244 * Write the registers twice for luck. Sometimes, 245 * writing them only once doesn't appear to 'stick'. 246 * The BIOS does this too. Yay, magic 247 */ 248 for (i = 0; i < 2; i++) { 249 I915_WRITE(GEN3_SDVOB, bval); 250 POSTING_READ(GEN3_SDVOB); 251 252 I915_WRITE(GEN3_SDVOC, cval); 253 POSTING_READ(GEN3_SDVOC); 254 } 255 } 256 257 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 258 { 259 struct i2c_msg msgs[] = { 260 { 261 .addr = intel_sdvo->slave_addr, 262 .flags = 0, 263 .len = 1, 264 .buf = &addr, 265 }, 266 { 267 .addr = intel_sdvo->slave_addr, 268 .flags = I2C_M_RD, 269 .len = 1, 270 .buf = ch, 271 } 272 }; 273 int ret; 274 275 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) 276 return true; 277 278 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 279 return false; 280 } 281 282 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ } 283 284 /** Mapping of command numbers to names, for debug output */ 285 static const struct { 286 u8 cmd; 287 const char *name; 288 } __attribute__ ((packed)) sdvo_cmd_names[] = { 289 SDVO_CMD_NAME_ENTRY(RESET), 290 SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS), 291 SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV), 292 SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS), 293 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS), 294 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS), 295 SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP), 296 SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP), 297 SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS), 298 SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT), 299 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG), 300 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG), 301 SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE), 302 SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT), 303 SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT), 304 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1), 305 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2), 306 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1), 307 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2), 308 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1), 309 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2), 310 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1), 311 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2), 312 SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING), 313 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1), 314 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2), 315 SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE), 316 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE), 317 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS), 318 SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT), 319 SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT), 320 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS), 321 SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT), 322 SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT), 323 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES), 324 SDVO_CMD_NAME_ENTRY(GET_POWER_STATE), 325 SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE), 326 SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE), 327 SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH), 328 SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT), 329 SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT), 330 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS), 331 332 /* Add the op code for SDVO enhancements */ 333 SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS), 334 SDVO_CMD_NAME_ENTRY(GET_HPOS), 335 SDVO_CMD_NAME_ENTRY(SET_HPOS), 336 SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS), 337 SDVO_CMD_NAME_ENTRY(GET_VPOS), 338 SDVO_CMD_NAME_ENTRY(SET_VPOS), 339 SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION), 340 SDVO_CMD_NAME_ENTRY(GET_SATURATION), 341 SDVO_CMD_NAME_ENTRY(SET_SATURATION), 342 SDVO_CMD_NAME_ENTRY(GET_MAX_HUE), 343 SDVO_CMD_NAME_ENTRY(GET_HUE), 344 SDVO_CMD_NAME_ENTRY(SET_HUE), 345 SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST), 346 SDVO_CMD_NAME_ENTRY(GET_CONTRAST), 347 SDVO_CMD_NAME_ENTRY(SET_CONTRAST), 348 SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS), 349 SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS), 350 SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS), 351 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H), 352 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H), 353 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H), 354 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V), 355 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V), 356 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V), 357 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER), 358 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER), 359 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER), 360 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE), 361 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE), 362 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE), 363 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D), 364 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D), 365 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D), 366 SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS), 367 SDVO_CMD_NAME_ENTRY(GET_SHARPNESS), 368 SDVO_CMD_NAME_ENTRY(SET_SHARPNESS), 369 SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL), 370 SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL), 371 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER), 372 SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER), 373 SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER), 374 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER), 375 SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER), 376 SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER), 377 378 /* HDMI op code */ 379 SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE), 380 SDVO_CMD_NAME_ENTRY(GET_ENCODE), 381 SDVO_CMD_NAME_ENTRY(SET_ENCODE), 382 SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI), 383 SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI), 384 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP), 385 SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY), 386 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY), 387 SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER), 388 SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT), 389 SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT), 390 SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX), 391 SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX), 392 SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO), 393 SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT), 394 SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT), 395 SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE), 396 SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE), 397 SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA), 398 SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA), 399 }; 400 401 #undef SDVO_CMD_NAME_ENTRY 402 403 static const char *sdvo_cmd_name(u8 cmd) 404 { 405 int i; 406 407 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 408 if (cmd == sdvo_cmd_names[i].cmd) 409 return sdvo_cmd_names[i].name; 410 } 411 412 return NULL; 413 } 414 415 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC") 416 417 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 418 const void *args, int args_len) 419 { 420 const char *cmd_name; 421 int i, pos = 0; 422 #define BUF_LEN 256 423 char buffer[BUF_LEN]; 424 425 #define BUF_PRINT(args...) \ 426 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) 427 428 429 for (i = 0; i < args_len; i++) { 430 BUF_PRINT("%02X ", ((const u8 *)args)[i]); 431 } 432 for (; i < 8; i++) { 433 BUF_PRINT(" "); 434 } 435 436 cmd_name = sdvo_cmd_name(cmd); 437 if (cmd_name) 438 BUF_PRINT("(%s)", cmd_name); 439 else 440 BUF_PRINT("(%02X)", cmd); 441 BUG_ON(pos >= BUF_LEN - 1); 442 #undef BUF_PRINT 443 #undef BUF_LEN 444 445 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); 446 } 447 448 static const char * const cmd_status_names[] = { 449 [SDVO_CMD_STATUS_POWER_ON] = "Power on", 450 [SDVO_CMD_STATUS_SUCCESS] = "Success", 451 [SDVO_CMD_STATUS_NOTSUPP] = "Not supported", 452 [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg", 453 [SDVO_CMD_STATUS_PENDING] = "Pending", 454 [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified", 455 [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported", 456 }; 457 458 static const char *sdvo_cmd_status(u8 status) 459 { 460 if (status < ARRAY_SIZE(cmd_status_names)) 461 return cmd_status_names[status]; 462 else 463 return NULL; 464 } 465 466 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 467 const void *args, int args_len, 468 bool unlocked) 469 { 470 u8 *buf, status; 471 struct i2c_msg *msgs; 472 int i, ret = true; 473 474 /* Would be simpler to allocate both in one go ? */ 475 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); 476 if (!buf) 477 return false; 478 479 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); 480 if (!msgs) { 481 kfree(buf); 482 return false; 483 } 484 485 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 486 487 for (i = 0; i < args_len; i++) { 488 msgs[i].addr = intel_sdvo->slave_addr; 489 msgs[i].flags = 0; 490 msgs[i].len = 2; 491 msgs[i].buf = buf + 2 *i; 492 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 493 buf[2*i + 1] = ((const u8*)args)[i]; 494 } 495 msgs[i].addr = intel_sdvo->slave_addr; 496 msgs[i].flags = 0; 497 msgs[i].len = 2; 498 msgs[i].buf = buf + 2*i; 499 buf[2*i + 0] = SDVO_I2C_OPCODE; 500 buf[2*i + 1] = cmd; 501 502 /* the following two are to read the response */ 503 status = SDVO_I2C_CMD_STATUS; 504 msgs[i+1].addr = intel_sdvo->slave_addr; 505 msgs[i+1].flags = 0; 506 msgs[i+1].len = 1; 507 msgs[i+1].buf = &status; 508 509 msgs[i+2].addr = intel_sdvo->slave_addr; 510 msgs[i+2].flags = I2C_M_RD; 511 msgs[i+2].len = 1; 512 msgs[i+2].buf = &status; 513 514 if (unlocked) 515 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); 516 else 517 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3); 518 if (ret < 0) { 519 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 520 ret = false; 521 goto out; 522 } 523 if (ret != i+3) { 524 /* failure in I2C transfer */ 525 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 526 ret = false; 527 } 528 529 out: 530 kfree(msgs); 531 kfree(buf); 532 return ret; 533 } 534 535 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 536 const void *args, int args_len) 537 { 538 return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true); 539 } 540 541 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 542 void *response, int response_len) 543 { 544 const char *cmd_status; 545 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 546 u8 status; 547 int i, pos = 0; 548 #define BUF_LEN 256 549 char buffer[BUF_LEN]; 550 551 buffer[0] = '\0'; 552 553 /* 554 * The documentation states that all commands will be 555 * processed within 15s, and that we need only poll 556 * the status byte a maximum of 3 times in order for the 557 * command to be complete. 558 * 559 * Check 5 times in case the hardware failed to read the docs. 560 * 561 * Also beware that the first response by many devices is to 562 * reply PENDING and stall for time. TVs are notorious for 563 * requiring longer than specified to complete their replies. 564 * Originally (in the DDX long ago), the delay was only ever 15ms 565 * with an additional delay of 30ms applied for TVs added later after 566 * many experiments. To accommodate both sets of delays, we do a 567 * sequence of slow checks if the device is falling behind and fails 568 * to reply within 5*15s. 569 */ 570 if (!intel_sdvo_read_byte(intel_sdvo, 571 SDVO_I2C_CMD_STATUS, 572 &status)) 573 goto log_fail; 574 575 while ((status == SDVO_CMD_STATUS_PENDING || 576 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { 577 if (retry < 10) 578 msleep(15); 579 else 580 udelay(15); 581 582 if (!intel_sdvo_read_byte(intel_sdvo, 583 SDVO_I2C_CMD_STATUS, 584 &status)) 585 goto log_fail; 586 } 587 588 #define BUF_PRINT(args...) \ 589 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) 590 591 cmd_status = sdvo_cmd_status(status); 592 if (cmd_status) 593 BUF_PRINT("(%s)", cmd_status); 594 else 595 BUF_PRINT("(??? %d)", status); 596 597 if (status != SDVO_CMD_STATUS_SUCCESS) 598 goto log_fail; 599 600 /* Read the command response */ 601 for (i = 0; i < response_len; i++) { 602 if (!intel_sdvo_read_byte(intel_sdvo, 603 SDVO_I2C_RETURN_0 + i, 604 &((u8 *)response)[i])) 605 goto log_fail; 606 BUF_PRINT(" %02X", ((u8 *)response)[i]); 607 } 608 BUG_ON(pos >= BUF_LEN - 1); 609 #undef BUF_PRINT 610 #undef BUF_LEN 611 612 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); 613 return true; 614 615 log_fail: 616 DRM_DEBUG_KMS("%s: R: ... failed %s\n", 617 SDVO_NAME(intel_sdvo), buffer); 618 return false; 619 } 620 621 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode) 622 { 623 if (adjusted_mode->crtc_clock >= 100000) 624 return 1; 625 else if (adjusted_mode->crtc_clock >= 50000) 626 return 2; 627 else 628 return 4; 629 } 630 631 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 632 u8 ddc_bus) 633 { 634 /* This must be the immediately preceding write before the i2c xfer */ 635 return __intel_sdvo_write_cmd(intel_sdvo, 636 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 637 &ddc_bus, 1, false); 638 } 639 640 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 641 { 642 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 643 return false; 644 645 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 646 } 647 648 static bool 649 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 650 { 651 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 652 return false; 653 654 return intel_sdvo_read_response(intel_sdvo, value, len); 655 } 656 657 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 658 { 659 struct intel_sdvo_set_target_input_args targets = {0}; 660 return intel_sdvo_set_value(intel_sdvo, 661 SDVO_CMD_SET_TARGET_INPUT, 662 &targets, sizeof(targets)); 663 } 664 665 /* 666 * Return whether each input is trained. 667 * 668 * This function is making an assumption about the layout of the response, 669 * which should be checked against the docs. 670 */ 671 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 672 { 673 struct intel_sdvo_get_trained_inputs_response response; 674 675 BUILD_BUG_ON(sizeof(response) != 1); 676 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 677 &response, sizeof(response))) 678 return false; 679 680 *input_1 = response.input0_trained; 681 *input_2 = response.input1_trained; 682 return true; 683 } 684 685 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 686 u16 outputs) 687 { 688 return intel_sdvo_set_value(intel_sdvo, 689 SDVO_CMD_SET_ACTIVE_OUTPUTS, 690 &outputs, sizeof(outputs)); 691 } 692 693 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 694 u16 *outputs) 695 { 696 return intel_sdvo_get_value(intel_sdvo, 697 SDVO_CMD_GET_ACTIVE_OUTPUTS, 698 outputs, sizeof(*outputs)); 699 } 700 701 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 702 int mode) 703 { 704 u8 state = SDVO_ENCODER_STATE_ON; 705 706 switch (mode) { 707 case DRM_MODE_DPMS_ON: 708 state = SDVO_ENCODER_STATE_ON; 709 break; 710 case DRM_MODE_DPMS_STANDBY: 711 state = SDVO_ENCODER_STATE_STANDBY; 712 break; 713 case DRM_MODE_DPMS_SUSPEND: 714 state = SDVO_ENCODER_STATE_SUSPEND; 715 break; 716 case DRM_MODE_DPMS_OFF: 717 state = SDVO_ENCODER_STATE_OFF; 718 break; 719 } 720 721 return intel_sdvo_set_value(intel_sdvo, 722 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 723 } 724 725 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 726 int *clock_min, 727 int *clock_max) 728 { 729 struct intel_sdvo_pixel_clock_range clocks; 730 731 BUILD_BUG_ON(sizeof(clocks) != 4); 732 if (!intel_sdvo_get_value(intel_sdvo, 733 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 734 &clocks, sizeof(clocks))) 735 return false; 736 737 /* Convert the values from units of 10 kHz to kHz. */ 738 *clock_min = clocks.min * 10; 739 *clock_max = clocks.max * 10; 740 return true; 741 } 742 743 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 744 u16 outputs) 745 { 746 return intel_sdvo_set_value(intel_sdvo, 747 SDVO_CMD_SET_TARGET_OUTPUT, 748 &outputs, sizeof(outputs)); 749 } 750 751 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 752 struct intel_sdvo_dtd *dtd) 753 { 754 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 755 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 756 } 757 758 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 759 struct intel_sdvo_dtd *dtd) 760 { 761 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 762 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 763 } 764 765 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 766 struct intel_sdvo_dtd *dtd) 767 { 768 return intel_sdvo_set_timing(intel_sdvo, 769 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 770 } 771 772 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 773 struct intel_sdvo_dtd *dtd) 774 { 775 return intel_sdvo_set_timing(intel_sdvo, 776 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 777 } 778 779 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, 780 struct intel_sdvo_dtd *dtd) 781 { 782 return intel_sdvo_get_timing(intel_sdvo, 783 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); 784 } 785 786 static bool 787 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 788 struct intel_sdvo_connector *intel_sdvo_connector, 789 u16 clock, 790 u16 width, 791 u16 height) 792 { 793 struct intel_sdvo_preferred_input_timing_args args; 794 795 memset(&args, 0, sizeof(args)); 796 args.clock = clock; 797 args.width = width; 798 args.height = height; 799 args.interlace = 0; 800 801 if (IS_LVDS(intel_sdvo_connector)) { 802 const struct drm_display_mode *fixed_mode = 803 intel_sdvo_connector->base.panel.fixed_mode; 804 805 if (fixed_mode->hdisplay != width || 806 fixed_mode->vdisplay != height) 807 args.scaled = 1; 808 } 809 810 return intel_sdvo_set_value(intel_sdvo, 811 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 812 &args, sizeof(args)); 813 } 814 815 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 816 struct intel_sdvo_dtd *dtd) 817 { 818 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 819 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 820 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 821 &dtd->part1, sizeof(dtd->part1)) && 822 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 823 &dtd->part2, sizeof(dtd->part2)); 824 } 825 826 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 827 { 828 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 829 } 830 831 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 832 const struct drm_display_mode *mode) 833 { 834 u16 width, height; 835 u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len; 836 u16 h_sync_offset, v_sync_offset; 837 int mode_clock; 838 839 memset(dtd, 0, sizeof(*dtd)); 840 841 width = mode->hdisplay; 842 height = mode->vdisplay; 843 844 /* do some mode translations */ 845 h_blank_len = mode->htotal - mode->hdisplay; 846 h_sync_len = mode->hsync_end - mode->hsync_start; 847 848 v_blank_len = mode->vtotal - mode->vdisplay; 849 v_sync_len = mode->vsync_end - mode->vsync_start; 850 851 h_sync_offset = mode->hsync_start - mode->hdisplay; 852 v_sync_offset = mode->vsync_start - mode->vdisplay; 853 854 mode_clock = mode->clock; 855 mode_clock /= 10; 856 dtd->part1.clock = mode_clock; 857 858 dtd->part1.h_active = width & 0xff; 859 dtd->part1.h_blank = h_blank_len & 0xff; 860 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 861 ((h_blank_len >> 8) & 0xf); 862 dtd->part1.v_active = height & 0xff; 863 dtd->part1.v_blank = v_blank_len & 0xff; 864 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 865 ((v_blank_len >> 8) & 0xf); 866 867 dtd->part2.h_sync_off = h_sync_offset & 0xff; 868 dtd->part2.h_sync_width = h_sync_len & 0xff; 869 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 870 (v_sync_len & 0xf); 871 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 872 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 873 ((v_sync_len & 0x30) >> 4); 874 875 dtd->part2.dtd_flags = 0x18; 876 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 877 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 878 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 879 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 880 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 881 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 882 883 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 884 } 885 886 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, 887 const struct intel_sdvo_dtd *dtd) 888 { 889 struct drm_display_mode mode = {}; 890 891 mode.hdisplay = dtd->part1.h_active; 892 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 893 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; 894 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 895 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; 896 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 897 mode.htotal = mode.hdisplay + dtd->part1.h_blank; 898 mode.htotal += (dtd->part1.h_high & 0xf) << 8; 899 900 mode.vdisplay = dtd->part1.v_active; 901 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 902 mode.vsync_start = mode.vdisplay; 903 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 904 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 905 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; 906 mode.vsync_end = mode.vsync_start + 907 (dtd->part2.v_sync_off_width & 0xf); 908 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 909 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; 910 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; 911 912 mode.clock = dtd->part1.clock * 10; 913 914 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 915 mode.flags |= DRM_MODE_FLAG_INTERLACE; 916 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 917 mode.flags |= DRM_MODE_FLAG_PHSYNC; 918 else 919 mode.flags |= DRM_MODE_FLAG_NHSYNC; 920 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 921 mode.flags |= DRM_MODE_FLAG_PVSYNC; 922 else 923 mode.flags |= DRM_MODE_FLAG_NVSYNC; 924 925 drm_mode_set_crtcinfo(&mode, 0); 926 927 drm_mode_copy(pmode, &mode); 928 } 929 930 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 931 { 932 struct intel_sdvo_encode encode; 933 934 BUILD_BUG_ON(sizeof(encode) != 2); 935 return intel_sdvo_get_value(intel_sdvo, 936 SDVO_CMD_GET_SUPP_ENCODE, 937 &encode, sizeof(encode)); 938 } 939 940 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 941 u8 mode) 942 { 943 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 944 } 945 946 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 947 u8 mode) 948 { 949 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 950 } 951 952 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo, 953 u8 audio_state) 954 { 955 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT, 956 &audio_state, 1); 957 } 958 959 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo, 960 u8 *hbuf_size) 961 { 962 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 963 hbuf_size, 1)) 964 return false; 965 966 /* Buffer size is 0 based, hooray! However zero means zero. */ 967 if (*hbuf_size) 968 (*hbuf_size)++; 969 970 return true; 971 } 972 973 #if 0 974 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 975 { 976 int i, j; 977 u8 set_buf_index[2]; 978 u8 av_split; 979 u8 buf_size; 980 u8 buf[48]; 981 u8 *pos; 982 983 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 984 985 for (i = 0; i <= av_split; i++) { 986 set_buf_index[0] = i; set_buf_index[1] = 0; 987 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 988 set_buf_index, 2); 989 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 990 intel_sdvo_read_response(encoder, &buf_size, 1); 991 992 pos = buf; 993 for (j = 0; j <= buf_size; j += 8) { 994 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 995 NULL, 0); 996 intel_sdvo_read_response(encoder, pos, 8); 997 pos += 8; 998 } 999 } 1000 } 1001 #endif 1002 1003 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 1004 unsigned int if_index, u8 tx_rate, 1005 const u8 *data, unsigned int length) 1006 { 1007 u8 set_buf_index[2] = { if_index, 0 }; 1008 u8 hbuf_size, tmp[8]; 1009 int i; 1010 1011 if (!intel_sdvo_set_value(intel_sdvo, 1012 SDVO_CMD_SET_HBUF_INDEX, 1013 set_buf_index, 2)) 1014 return false; 1015 1016 if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size)) 1017 return false; 1018 1019 DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n", 1020 if_index, length, hbuf_size); 1021 1022 if (hbuf_size < length) 1023 return false; 1024 1025 for (i = 0; i < hbuf_size; i += 8) { 1026 memset(tmp, 0, 8); 1027 if (i < length) 1028 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 1029 1030 if (!intel_sdvo_set_value(intel_sdvo, 1031 SDVO_CMD_SET_HBUF_DATA, 1032 tmp, 8)) 1033 return false; 1034 } 1035 1036 return intel_sdvo_set_value(intel_sdvo, 1037 SDVO_CMD_SET_HBUF_TXRATE, 1038 &tx_rate, 1); 1039 } 1040 1041 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo, 1042 unsigned int if_index, 1043 u8 *data, unsigned int length) 1044 { 1045 u8 set_buf_index[2] = { if_index, 0 }; 1046 u8 hbuf_size, tx_rate, av_split; 1047 int i; 1048 1049 if (!intel_sdvo_get_value(intel_sdvo, 1050 SDVO_CMD_GET_HBUF_AV_SPLIT, 1051 &av_split, 1)) 1052 return -ENXIO; 1053 1054 if (av_split < if_index) 1055 return 0; 1056 1057 if (!intel_sdvo_set_value(intel_sdvo, 1058 SDVO_CMD_SET_HBUF_INDEX, 1059 set_buf_index, 2)) 1060 return -ENXIO; 1061 1062 if (!intel_sdvo_get_value(intel_sdvo, 1063 SDVO_CMD_GET_HBUF_TXRATE, 1064 &tx_rate, 1)) 1065 return -ENXIO; 1066 1067 if (tx_rate == SDVO_HBUF_TX_DISABLED) 1068 return 0; 1069 1070 if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size)) 1071 return false; 1072 1073 DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n", 1074 if_index, length, hbuf_size); 1075 1076 hbuf_size = min_t(unsigned int, length, hbuf_size); 1077 1078 for (i = 0; i < hbuf_size; i += 8) { 1079 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0)) 1080 return -ENXIO; 1081 if (!intel_sdvo_read_response(intel_sdvo, &data[i], 1082 min_t(unsigned int, 8, hbuf_size - i))) 1083 return -ENXIO; 1084 } 1085 1086 return hbuf_size; 1087 } 1088 1089 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo, 1090 struct intel_crtc_state *crtc_state, 1091 struct drm_connector_state *conn_state) 1092 { 1093 struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi; 1094 const struct drm_display_mode *adjusted_mode = 1095 &crtc_state->hw.adjusted_mode; 1096 int ret; 1097 1098 if (!crtc_state->has_hdmi_sink) 1099 return true; 1100 1101 crtc_state->infoframes.enable |= 1102 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); 1103 1104 ret = drm_hdmi_avi_infoframe_from_display_mode(frame, 1105 conn_state->connector, 1106 adjusted_mode); 1107 if (ret) 1108 return false; 1109 1110 drm_hdmi_avi_infoframe_quant_range(frame, 1111 conn_state->connector, 1112 adjusted_mode, 1113 crtc_state->limited_color_range ? 1114 HDMI_QUANTIZATION_RANGE_LIMITED : 1115 HDMI_QUANTIZATION_RANGE_FULL); 1116 1117 ret = hdmi_avi_infoframe_check(frame); 1118 if (WARN_ON(ret)) 1119 return false; 1120 1121 return true; 1122 } 1123 1124 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, 1125 const struct intel_crtc_state *crtc_state) 1126 { 1127 u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1128 const union hdmi_infoframe *frame = &crtc_state->infoframes.avi; 1129 ssize_t len; 1130 1131 if ((crtc_state->infoframes.enable & 1132 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0) 1133 return true; 1134 1135 if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI)) 1136 return false; 1137 1138 len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data)); 1139 if (WARN_ON(len < 0)) 1140 return false; 1141 1142 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1143 SDVO_HBUF_TX_VSYNC, 1144 sdvo_data, len); 1145 } 1146 1147 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo, 1148 struct intel_crtc_state *crtc_state) 1149 { 1150 u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1151 union hdmi_infoframe *frame = &crtc_state->infoframes.avi; 1152 ssize_t len; 1153 int ret; 1154 1155 if (!crtc_state->has_hdmi_sink) 1156 return; 1157 1158 len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1159 sdvo_data, sizeof(sdvo_data)); 1160 if (len < 0) { 1161 DRM_DEBUG_KMS("failed to read AVI infoframe\n"); 1162 return; 1163 } else if (len == 0) { 1164 return; 1165 } 1166 1167 crtc_state->infoframes.enable |= 1168 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); 1169 1170 ret = hdmi_infoframe_unpack(frame, sdvo_data, len); 1171 if (ret) { 1172 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n"); 1173 return; 1174 } 1175 1176 if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI) 1177 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n", 1178 frame->any.type, HDMI_INFOFRAME_TYPE_AVI); 1179 } 1180 1181 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo, 1182 const struct drm_connector_state *conn_state) 1183 { 1184 struct intel_sdvo_tv_format format; 1185 u32 format_map; 1186 1187 format_map = 1 << conn_state->tv.mode; 1188 memset(&format, 0, sizeof(format)); 1189 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 1190 1191 BUILD_BUG_ON(sizeof(format) != 6); 1192 return intel_sdvo_set_value(intel_sdvo, 1193 SDVO_CMD_SET_TV_FORMAT, 1194 &format, sizeof(format)); 1195 } 1196 1197 static bool 1198 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 1199 const struct drm_display_mode *mode) 1200 { 1201 struct intel_sdvo_dtd output_dtd; 1202 1203 if (!intel_sdvo_set_target_output(intel_sdvo, 1204 intel_sdvo->attached_output)) 1205 return false; 1206 1207 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1208 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1209 return false; 1210 1211 return true; 1212 } 1213 1214 /* 1215 * Asks the sdvo controller for the preferred input mode given the output mode. 1216 * Unfortunately we have to set up the full output mode to do that. 1217 */ 1218 static bool 1219 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1220 struct intel_sdvo_connector *intel_sdvo_connector, 1221 const struct drm_display_mode *mode, 1222 struct drm_display_mode *adjusted_mode) 1223 { 1224 struct intel_sdvo_dtd input_dtd; 1225 1226 /* Reset the input timing to the screen. Assume always input 0. */ 1227 if (!intel_sdvo_set_target_input(intel_sdvo)) 1228 return false; 1229 1230 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1231 intel_sdvo_connector, 1232 mode->clock / 10, 1233 mode->hdisplay, 1234 mode->vdisplay)) 1235 return false; 1236 1237 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1238 &input_dtd)) 1239 return false; 1240 1241 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1242 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1243 1244 return true; 1245 } 1246 1247 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) 1248 { 1249 unsigned dotclock = pipe_config->port_clock; 1250 struct dpll *clock = &pipe_config->dpll; 1251 1252 /* 1253 * SDVO TV has fixed PLL values depend on its clock range, 1254 * this mirrors vbios setting. 1255 */ 1256 if (dotclock >= 100000 && dotclock < 140500) { 1257 clock->p1 = 2; 1258 clock->p2 = 10; 1259 clock->n = 3; 1260 clock->m1 = 16; 1261 clock->m2 = 8; 1262 } else if (dotclock >= 140500 && dotclock <= 200000) { 1263 clock->p1 = 1; 1264 clock->p2 = 10; 1265 clock->n = 6; 1266 clock->m1 = 12; 1267 clock->m2 = 8; 1268 } else { 1269 WARN(1, "SDVO TV clock out of range: %i\n", dotclock); 1270 } 1271 1272 pipe_config->clock_set = true; 1273 } 1274 1275 static int intel_sdvo_compute_config(struct intel_encoder *encoder, 1276 struct intel_crtc_state *pipe_config, 1277 struct drm_connector_state *conn_state) 1278 { 1279 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1280 struct intel_sdvo_connector_state *intel_sdvo_state = 1281 to_intel_sdvo_connector_state(conn_state); 1282 struct intel_sdvo_connector *intel_sdvo_connector = 1283 to_intel_sdvo_connector(conn_state->connector); 1284 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 1285 struct drm_display_mode *mode = &pipe_config->hw.mode; 1286 1287 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); 1288 pipe_config->pipe_bpp = 8*3; 1289 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 1290 1291 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) 1292 pipe_config->has_pch_encoder = true; 1293 1294 /* 1295 * We need to construct preferred input timings based on our 1296 * output timings. To do that, we have to set the output 1297 * timings, even though this isn't really the right place in 1298 * the sequence to do it. Oh well. 1299 */ 1300 if (IS_TV(intel_sdvo_connector)) { 1301 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1302 return -EINVAL; 1303 1304 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1305 intel_sdvo_connector, 1306 mode, 1307 adjusted_mode); 1308 pipe_config->sdvo_tv_clock = true; 1309 } else if (IS_LVDS(intel_sdvo_connector)) { 1310 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1311 intel_sdvo_connector->base.panel.fixed_mode)) 1312 return -EINVAL; 1313 1314 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1315 intel_sdvo_connector, 1316 mode, 1317 adjusted_mode); 1318 } 1319 1320 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 1321 return -EINVAL; 1322 1323 /* 1324 * Make the CRTC code factor in the SDVO pixel multiplier. The 1325 * SDVO device will factor out the multiplier during mode_set. 1326 */ 1327 pipe_config->pixel_multiplier = 1328 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1329 1330 if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI) 1331 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor; 1332 1333 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON || 1334 (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio)) 1335 pipe_config->has_audio = true; 1336 1337 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) { 1338 /* 1339 * See CEA-861-E - 5.1 Default Encoding Parameters 1340 * 1341 * FIXME: This bit is only valid when using TMDS encoding and 8 1342 * bit per color mode. 1343 */ 1344 if (pipe_config->has_hdmi_sink && 1345 drm_match_cea_mode(adjusted_mode) > 1) 1346 pipe_config->limited_color_range = true; 1347 } else { 1348 if (pipe_config->has_hdmi_sink && 1349 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED) 1350 pipe_config->limited_color_range = true; 1351 } 1352 1353 /* Clock computation needs to happen after pixel multiplier. */ 1354 if (IS_TV(intel_sdvo_connector)) 1355 i9xx_adjust_sdvo_tv_clock(pipe_config); 1356 1357 if (conn_state->picture_aspect_ratio) 1358 adjusted_mode->picture_aspect_ratio = 1359 conn_state->picture_aspect_ratio; 1360 1361 if (!intel_sdvo_compute_avi_infoframe(intel_sdvo, 1362 pipe_config, conn_state)) { 1363 DRM_DEBUG_KMS("bad AVI infoframe\n"); 1364 return -EINVAL; 1365 } 1366 1367 return 0; 1368 } 1369 1370 #define UPDATE_PROPERTY(input, NAME) \ 1371 do { \ 1372 val = input; \ 1373 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \ 1374 } while (0) 1375 1376 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo, 1377 const struct intel_sdvo_connector_state *sdvo_state) 1378 { 1379 const struct drm_connector_state *conn_state = &sdvo_state->base.base; 1380 struct intel_sdvo_connector *intel_sdvo_conn = 1381 to_intel_sdvo_connector(conn_state->connector); 1382 u16 val; 1383 1384 if (intel_sdvo_conn->left) 1385 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H); 1386 1387 if (intel_sdvo_conn->top) 1388 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V); 1389 1390 if (intel_sdvo_conn->hpos) 1391 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS); 1392 1393 if (intel_sdvo_conn->vpos) 1394 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS); 1395 1396 if (intel_sdvo_conn->saturation) 1397 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION); 1398 1399 if (intel_sdvo_conn->contrast) 1400 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST); 1401 1402 if (intel_sdvo_conn->hue) 1403 UPDATE_PROPERTY(conn_state->tv.hue, HUE); 1404 1405 if (intel_sdvo_conn->brightness) 1406 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS); 1407 1408 if (intel_sdvo_conn->sharpness) 1409 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS); 1410 1411 if (intel_sdvo_conn->flicker_filter) 1412 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER); 1413 1414 if (intel_sdvo_conn->flicker_filter_2d) 1415 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D); 1416 1417 if (intel_sdvo_conn->flicker_filter_adaptive) 1418 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 1419 1420 if (intel_sdvo_conn->tv_chroma_filter) 1421 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER); 1422 1423 if (intel_sdvo_conn->tv_luma_filter) 1424 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER); 1425 1426 if (intel_sdvo_conn->dot_crawl) 1427 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL); 1428 1429 #undef UPDATE_PROPERTY 1430 } 1431 1432 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, 1433 const struct intel_crtc_state *crtc_state, 1434 const struct drm_connector_state *conn_state) 1435 { 1436 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); 1437 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 1438 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 1439 const struct intel_sdvo_connector_state *sdvo_state = 1440 const_container_of(conn_state, struct intel_sdvo_connector_state, base.base); 1441 const struct intel_sdvo_connector *intel_sdvo_connector = 1442 const_container_of(conn_state->connector, struct intel_sdvo_connector, base.base); 1443 const struct drm_display_mode *mode = &crtc_state->hw.mode; 1444 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); 1445 u32 sdvox; 1446 struct intel_sdvo_in_out_map in_out; 1447 struct intel_sdvo_dtd input_dtd, output_dtd; 1448 int rate; 1449 1450 intel_sdvo_update_props(intel_sdvo, sdvo_state); 1451 1452 /* 1453 * First, set the input mapping for the first input to our controlled 1454 * output. This is only correct if we're a single-input device, in 1455 * which case the first input is the output from the appropriate SDVO 1456 * channel on the motherboard. In a two-input device, the first input 1457 * will be SDVOB and the second SDVOC. 1458 */ 1459 in_out.in0 = intel_sdvo->attached_output; 1460 in_out.in1 = 0; 1461 1462 intel_sdvo_set_value(intel_sdvo, 1463 SDVO_CMD_SET_IN_OUT_MAP, 1464 &in_out, sizeof(in_out)); 1465 1466 /* Set the output timings to the screen */ 1467 if (!intel_sdvo_set_target_output(intel_sdvo, 1468 intel_sdvo->attached_output)) 1469 return; 1470 1471 /* lvds has a special fixed output timing. */ 1472 if (IS_LVDS(intel_sdvo_connector)) 1473 intel_sdvo_get_dtd_from_mode(&output_dtd, 1474 intel_sdvo_connector->base.panel.fixed_mode); 1475 else 1476 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1477 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1478 DRM_INFO("Setting output timings on %s failed\n", 1479 SDVO_NAME(intel_sdvo)); 1480 1481 /* Set the input timing to the screen. Assume always input 0. */ 1482 if (!intel_sdvo_set_target_input(intel_sdvo)) 1483 return; 1484 1485 if (crtc_state->has_hdmi_sink) { 1486 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1487 intel_sdvo_set_colorimetry(intel_sdvo, 1488 SDVO_COLORIMETRY_RGB256); 1489 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state); 1490 } else 1491 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1492 1493 if (IS_TV(intel_sdvo_connector) && 1494 !intel_sdvo_set_tv_format(intel_sdvo, conn_state)) 1495 return; 1496 1497 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1498 1499 if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector)) 1500 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1501 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1502 DRM_INFO("Setting input timings on %s failed\n", 1503 SDVO_NAME(intel_sdvo)); 1504 1505 switch (crtc_state->pixel_multiplier) { 1506 default: 1507 WARN(1, "unknown pixel multiplier specified\n"); 1508 /* fall through */ 1509 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1510 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1511 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1512 } 1513 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1514 return; 1515 1516 /* Set the SDVO control regs. */ 1517 if (INTEL_GEN(dev_priv) >= 4) { 1518 /* The real mode polarity is set by the SDVO commands, using 1519 * struct intel_sdvo_dtd. */ 1520 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1521 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) 1522 sdvox |= HDMI_COLOR_RANGE_16_235; 1523 if (INTEL_GEN(dev_priv) < 5) 1524 sdvox |= SDVO_BORDER_ENABLE; 1525 } else { 1526 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1527 if (intel_sdvo->port == PORT_B) 1528 sdvox &= SDVOB_PRESERVE_MASK; 1529 else 1530 sdvox &= SDVOC_PRESERVE_MASK; 1531 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1532 } 1533 1534 if (HAS_PCH_CPT(dev_priv)) 1535 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); 1536 else 1537 sdvox |= SDVO_PIPE_SEL(crtc->pipe); 1538 1539 if (INTEL_GEN(dev_priv) >= 4) { 1540 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1541 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) || 1542 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) { 1543 /* done in crtc_mode_set as it lives inside the dpll register */ 1544 } else { 1545 sdvox |= (crtc_state->pixel_multiplier - 1) 1546 << SDVO_PORT_MULTIPLY_SHIFT; 1547 } 1548 1549 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1550 INTEL_GEN(dev_priv) < 5) 1551 sdvox |= SDVO_STALL_SELECT; 1552 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1553 } 1554 1555 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1556 { 1557 struct intel_sdvo_connector *intel_sdvo_connector = 1558 to_intel_sdvo_connector(&connector->base); 1559 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1560 u16 active_outputs = 0; 1561 1562 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1563 1564 return active_outputs & intel_sdvo_connector->output_flag; 1565 } 1566 1567 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv, 1568 i915_reg_t sdvo_reg, enum pipe *pipe) 1569 { 1570 u32 val; 1571 1572 val = I915_READ(sdvo_reg); 1573 1574 /* asserts want to know the pipe even if the port is disabled */ 1575 if (HAS_PCH_CPT(dev_priv)) 1576 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT; 1577 else if (IS_CHERRYVIEW(dev_priv)) 1578 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV; 1579 else 1580 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT; 1581 1582 return val & SDVO_ENABLE; 1583 } 1584 1585 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1586 enum pipe *pipe) 1587 { 1588 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1589 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1590 u16 active_outputs = 0; 1591 bool ret; 1592 1593 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1594 1595 ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe); 1596 1597 return ret || active_outputs; 1598 } 1599 1600 static void intel_sdvo_get_config(struct intel_encoder *encoder, 1601 struct intel_crtc_state *pipe_config) 1602 { 1603 struct drm_device *dev = encoder->base.dev; 1604 struct drm_i915_private *dev_priv = to_i915(dev); 1605 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1606 struct intel_sdvo_dtd dtd; 1607 int encoder_pixel_multiplier = 0; 1608 int dotclock; 1609 u32 flags = 0, sdvox; 1610 u8 val; 1611 bool ret; 1612 1613 pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO); 1614 1615 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1616 1617 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); 1618 if (!ret) { 1619 /* 1620 * Some sdvo encoders are not spec compliant and don't 1621 * implement the mandatory get_timings function. 1622 */ 1623 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); 1624 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; 1625 } else { 1626 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 1627 flags |= DRM_MODE_FLAG_PHSYNC; 1628 else 1629 flags |= DRM_MODE_FLAG_NHSYNC; 1630 1631 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 1632 flags |= DRM_MODE_FLAG_PVSYNC; 1633 else 1634 flags |= DRM_MODE_FLAG_NVSYNC; 1635 } 1636 1637 pipe_config->hw.adjusted_mode.flags |= flags; 1638 1639 /* 1640 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in 1641 * the sdvo port register, on all other platforms it is part of the dpll 1642 * state. Since the general pipe state readout happens before the 1643 * encoder->get_config we so already have a valid pixel multplier on all 1644 * other platfroms. 1645 */ 1646 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { 1647 pipe_config->pixel_multiplier = 1648 ((sdvox & SDVO_PORT_MULTIPLY_MASK) 1649 >> SDVO_PORT_MULTIPLY_SHIFT) + 1; 1650 } 1651 1652 dotclock = pipe_config->port_clock; 1653 1654 if (pipe_config->pixel_multiplier) 1655 dotclock /= pipe_config->pixel_multiplier; 1656 1657 pipe_config->hw.adjusted_mode.crtc_clock = dotclock; 1658 1659 /* Cross check the port pixel multiplier with the sdvo encoder state. */ 1660 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, 1661 &val, 1)) { 1662 switch (val) { 1663 case SDVO_CLOCK_RATE_MULT_1X: 1664 encoder_pixel_multiplier = 1; 1665 break; 1666 case SDVO_CLOCK_RATE_MULT_2X: 1667 encoder_pixel_multiplier = 2; 1668 break; 1669 case SDVO_CLOCK_RATE_MULT_4X: 1670 encoder_pixel_multiplier = 4; 1671 break; 1672 } 1673 } 1674 1675 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, 1676 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", 1677 pipe_config->pixel_multiplier, encoder_pixel_multiplier); 1678 1679 if (sdvox & HDMI_COLOR_RANGE_16_235) 1680 pipe_config->limited_color_range = true; 1681 1682 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, 1683 &val, 1)) { 1684 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT; 1685 1686 if ((val & mask) == mask) 1687 pipe_config->has_audio = true; 1688 } 1689 1690 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, 1691 &val, 1)) { 1692 if (val == SDVO_ENCODE_HDMI) 1693 pipe_config->has_hdmi_sink = true; 1694 } 1695 1696 intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config); 1697 } 1698 1699 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo) 1700 { 1701 intel_sdvo_set_audio_state(intel_sdvo, 0); 1702 } 1703 1704 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo, 1705 const struct intel_crtc_state *crtc_state, 1706 const struct drm_connector_state *conn_state) 1707 { 1708 const struct drm_display_mode *adjusted_mode = 1709 &crtc_state->hw.adjusted_mode; 1710 struct drm_connector *connector = conn_state->connector; 1711 u8 *eld = connector->eld; 1712 1713 eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2; 1714 1715 intel_sdvo_set_audio_state(intel_sdvo, 0); 1716 1717 intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD, 1718 SDVO_HBUF_TX_DISABLED, 1719 eld, drm_eld_size(eld)); 1720 1721 intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID | 1722 SDVO_AUDIO_PRESENCE_DETECT); 1723 } 1724 1725 static void intel_disable_sdvo(struct intel_encoder *encoder, 1726 const struct intel_crtc_state *old_crtc_state, 1727 const struct drm_connector_state *conn_state) 1728 { 1729 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1730 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1731 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 1732 u32 temp; 1733 1734 if (old_crtc_state->has_audio) 1735 intel_sdvo_disable_audio(intel_sdvo); 1736 1737 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1738 if (0) 1739 intel_sdvo_set_encoder_power_state(intel_sdvo, 1740 DRM_MODE_DPMS_OFF); 1741 1742 temp = I915_READ(intel_sdvo->sdvo_reg); 1743 1744 temp &= ~SDVO_ENABLE; 1745 intel_sdvo_write_sdvox(intel_sdvo, temp); 1746 1747 /* 1748 * HW workaround for IBX, we need to move the port 1749 * to transcoder A after disabling it to allow the 1750 * matching DP port to be enabled on transcoder A. 1751 */ 1752 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { 1753 /* 1754 * We get CPU/PCH FIFO underruns on the other pipe when 1755 * doing the workaround. Sweep them under the rug. 1756 */ 1757 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1758 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1759 1760 temp &= ~SDVO_PIPE_SEL_MASK; 1761 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A); 1762 intel_sdvo_write_sdvox(intel_sdvo, temp); 1763 1764 temp &= ~SDVO_ENABLE; 1765 intel_sdvo_write_sdvox(intel_sdvo, temp); 1766 1767 intel_wait_for_vblank_if_active(dev_priv, PIPE_A); 1768 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1769 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1770 } 1771 } 1772 1773 static void pch_disable_sdvo(struct intel_encoder *encoder, 1774 const struct intel_crtc_state *old_crtc_state, 1775 const struct drm_connector_state *old_conn_state) 1776 { 1777 } 1778 1779 static void pch_post_disable_sdvo(struct intel_encoder *encoder, 1780 const struct intel_crtc_state *old_crtc_state, 1781 const struct drm_connector_state *old_conn_state) 1782 { 1783 intel_disable_sdvo(encoder, old_crtc_state, old_conn_state); 1784 } 1785 1786 static void intel_enable_sdvo(struct intel_encoder *encoder, 1787 const struct intel_crtc_state *pipe_config, 1788 const struct drm_connector_state *conn_state) 1789 { 1790 struct drm_device *dev = encoder->base.dev; 1791 struct drm_i915_private *dev_priv = to_i915(dev); 1792 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1793 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); 1794 u32 temp; 1795 bool input1, input2; 1796 int i; 1797 bool success; 1798 1799 temp = I915_READ(intel_sdvo->sdvo_reg); 1800 temp |= SDVO_ENABLE; 1801 intel_sdvo_write_sdvox(intel_sdvo, temp); 1802 1803 for (i = 0; i < 2; i++) 1804 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); 1805 1806 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1807 /* 1808 * Warn if the device reported failure to sync. 1809 * 1810 * A lot of SDVO devices fail to notify of sync, but it's 1811 * a given it the status is a success, we succeeded. 1812 */ 1813 if (success && !input1) { 1814 DRM_DEBUG_KMS("First %s output reported failure to " 1815 "sync\n", SDVO_NAME(intel_sdvo)); 1816 } 1817 1818 if (0) 1819 intel_sdvo_set_encoder_power_state(intel_sdvo, 1820 DRM_MODE_DPMS_ON); 1821 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1822 1823 if (pipe_config->has_audio) 1824 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state); 1825 } 1826 1827 static enum drm_mode_status 1828 intel_sdvo_mode_valid(struct drm_connector *connector, 1829 struct drm_display_mode *mode) 1830 { 1831 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1832 struct intel_sdvo_connector *intel_sdvo_connector = 1833 to_intel_sdvo_connector(connector); 1834 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 1835 1836 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1837 return MODE_NO_DBLESCAN; 1838 1839 if (intel_sdvo->pixel_clock_min > mode->clock) 1840 return MODE_CLOCK_LOW; 1841 1842 if (intel_sdvo->pixel_clock_max < mode->clock) 1843 return MODE_CLOCK_HIGH; 1844 1845 if (mode->clock > max_dotclk) 1846 return MODE_CLOCK_HIGH; 1847 1848 if (IS_LVDS(intel_sdvo_connector)) { 1849 const struct drm_display_mode *fixed_mode = 1850 intel_sdvo_connector->base.panel.fixed_mode; 1851 1852 if (mode->hdisplay > fixed_mode->hdisplay) 1853 return MODE_PANEL; 1854 1855 if (mode->vdisplay > fixed_mode->vdisplay) 1856 return MODE_PANEL; 1857 } 1858 1859 return MODE_OK; 1860 } 1861 1862 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1863 { 1864 BUILD_BUG_ON(sizeof(*caps) != 8); 1865 if (!intel_sdvo_get_value(intel_sdvo, 1866 SDVO_CMD_GET_DEVICE_CAPS, 1867 caps, sizeof(*caps))) 1868 return false; 1869 1870 DRM_DEBUG_KMS("SDVO capabilities:\n" 1871 " vendor_id: %d\n" 1872 " device_id: %d\n" 1873 " device_rev_id: %d\n" 1874 " sdvo_version_major: %d\n" 1875 " sdvo_version_minor: %d\n" 1876 " sdvo_inputs_mask: %d\n" 1877 " smooth_scaling: %d\n" 1878 " sharp_scaling: %d\n" 1879 " up_scaling: %d\n" 1880 " down_scaling: %d\n" 1881 " stall_support: %d\n" 1882 " output_flags: %d\n", 1883 caps->vendor_id, 1884 caps->device_id, 1885 caps->device_rev_id, 1886 caps->sdvo_version_major, 1887 caps->sdvo_version_minor, 1888 caps->sdvo_inputs_mask, 1889 caps->smooth_scaling, 1890 caps->sharp_scaling, 1891 caps->up_scaling, 1892 caps->down_scaling, 1893 caps->stall_support, 1894 caps->output_flags); 1895 1896 return true; 1897 } 1898 1899 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1900 { 1901 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev); 1902 u16 hotplug; 1903 1904 if (!I915_HAS_HOTPLUG(dev_priv)) 1905 return 0; 1906 1907 /* 1908 * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1909 * on the line. 1910 */ 1911 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 1912 return 0; 1913 1914 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1915 &hotplug, sizeof(hotplug))) 1916 return 0; 1917 1918 return hotplug; 1919 } 1920 1921 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1922 { 1923 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1924 1925 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1926 &intel_sdvo->hotplug_active, 2); 1927 } 1928 1929 static enum intel_hotplug_state 1930 intel_sdvo_hotplug(struct intel_encoder *encoder, 1931 struct intel_connector *connector, 1932 bool irq_received) 1933 { 1934 intel_sdvo_enable_hotplug(encoder); 1935 1936 return intel_encoder_hotplug(encoder, connector, irq_received); 1937 } 1938 1939 static bool 1940 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1941 { 1942 /* Is there more than one type of output? */ 1943 return hweight16(intel_sdvo->caps.output_flags) > 1; 1944 } 1945 1946 static struct edid * 1947 intel_sdvo_get_edid(struct drm_connector *connector) 1948 { 1949 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1950 return drm_get_edid(connector, &sdvo->ddc); 1951 } 1952 1953 /* Mac mini hack -- use the same DDC as the analog connector */ 1954 static struct edid * 1955 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1956 { 1957 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1958 1959 return drm_get_edid(connector, 1960 intel_gmbus_get_adapter(dev_priv, 1961 dev_priv->vbt.crt_ddc_pin)); 1962 } 1963 1964 static enum drm_connector_status 1965 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1966 { 1967 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1968 struct intel_sdvo_connector *intel_sdvo_connector = 1969 to_intel_sdvo_connector(connector); 1970 enum drm_connector_status status; 1971 struct edid *edid; 1972 1973 edid = intel_sdvo_get_edid(connector); 1974 1975 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1976 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1977 1978 /* 1979 * Don't use the 1 as the argument of DDC bus switch to get 1980 * the EDID. It is used for SDVO SPD ROM. 1981 */ 1982 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1983 intel_sdvo->ddc_bus = ddc; 1984 edid = intel_sdvo_get_edid(connector); 1985 if (edid) 1986 break; 1987 } 1988 /* 1989 * If we found the EDID on the other bus, 1990 * assume that is the correct DDC bus. 1991 */ 1992 if (edid == NULL) 1993 intel_sdvo->ddc_bus = saved_ddc; 1994 } 1995 1996 /* 1997 * When there is no edid and no monitor is connected with VGA 1998 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1999 */ 2000 if (edid == NULL) 2001 edid = intel_sdvo_get_analog_edid(connector); 2002 2003 status = connector_status_unknown; 2004 if (edid != NULL) { 2005 /* DDC bus is shared, match EDID to connector type */ 2006 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 2007 status = connector_status_connected; 2008 if (intel_sdvo_connector->is_hdmi) { 2009 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 2010 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 2011 } 2012 } else 2013 status = connector_status_disconnected; 2014 kfree(edid); 2015 } 2016 2017 return status; 2018 } 2019 2020 static bool 2021 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 2022 struct edid *edid) 2023 { 2024 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 2025 bool connector_is_digital = !!IS_DIGITAL(sdvo); 2026 2027 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 2028 connector_is_digital, monitor_is_digital); 2029 return connector_is_digital == monitor_is_digital; 2030 } 2031 2032 static enum drm_connector_status 2033 intel_sdvo_detect(struct drm_connector *connector, bool force) 2034 { 2035 u16 response; 2036 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2037 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2038 enum drm_connector_status ret; 2039 2040 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2041 connector->base.id, connector->name); 2042 2043 if (!intel_sdvo_get_value(intel_sdvo, 2044 SDVO_CMD_GET_ATTACHED_DISPLAYS, 2045 &response, 2)) 2046 return connector_status_unknown; 2047 2048 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 2049 response & 0xff, response >> 8, 2050 intel_sdvo_connector->output_flag); 2051 2052 if (response == 0) 2053 return connector_status_disconnected; 2054 2055 intel_sdvo->attached_output = response; 2056 2057 intel_sdvo->has_hdmi_monitor = false; 2058 intel_sdvo->has_hdmi_audio = false; 2059 2060 if ((intel_sdvo_connector->output_flag & response) == 0) 2061 ret = connector_status_disconnected; 2062 else if (IS_TMDS(intel_sdvo_connector)) 2063 ret = intel_sdvo_tmds_sink_detect(connector); 2064 else { 2065 struct edid *edid; 2066 2067 /* if we have an edid check it matches the connection */ 2068 edid = intel_sdvo_get_edid(connector); 2069 if (edid == NULL) 2070 edid = intel_sdvo_get_analog_edid(connector); 2071 if (edid != NULL) { 2072 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 2073 edid)) 2074 ret = connector_status_connected; 2075 else 2076 ret = connector_status_disconnected; 2077 2078 kfree(edid); 2079 } else 2080 ret = connector_status_connected; 2081 } 2082 2083 return ret; 2084 } 2085 2086 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 2087 { 2088 struct edid *edid; 2089 2090 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2091 connector->base.id, connector->name); 2092 2093 /* set the bus switch and get the modes */ 2094 edid = intel_sdvo_get_edid(connector); 2095 2096 /* 2097 * Mac mini hack. On this device, the DVI-I connector shares one DDC 2098 * link between analog and digital outputs. So, if the regular SDVO 2099 * DDC fails, check to see if the analog output is disconnected, in 2100 * which case we'll look there for the digital DDC data. 2101 */ 2102 if (edid == NULL) 2103 edid = intel_sdvo_get_analog_edid(connector); 2104 2105 if (edid != NULL) { 2106 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 2107 edid)) { 2108 drm_connector_update_edid_property(connector, edid); 2109 drm_add_edid_modes(connector, edid); 2110 } 2111 2112 kfree(edid); 2113 } 2114 } 2115 2116 /* 2117 * Set of SDVO TV modes. 2118 * Note! This is in reply order (see loop in get_tv_modes). 2119 * XXX: all 60Hz refresh? 2120 */ 2121 static const struct drm_display_mode sdvo_tv_modes[] = { 2122 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 2123 416, 0, 200, 201, 232, 233, 0, 2124 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2125 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 2126 416, 0, 240, 241, 272, 273, 0, 2127 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2128 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 2129 496, 0, 300, 301, 332, 333, 0, 2130 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2131 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 2132 736, 0, 350, 351, 382, 383, 0, 2133 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2134 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 2135 736, 0, 400, 401, 432, 433, 0, 2136 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2137 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 2138 736, 0, 480, 481, 512, 513, 0, 2139 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2140 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 2141 800, 0, 480, 481, 512, 513, 0, 2142 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2143 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 2144 800, 0, 576, 577, 608, 609, 0, 2145 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2146 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 2147 816, 0, 350, 351, 382, 383, 0, 2148 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2149 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 2150 816, 0, 400, 401, 432, 433, 0, 2151 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2152 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 2153 816, 0, 480, 481, 512, 513, 0, 2154 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2155 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 2156 816, 0, 540, 541, 572, 573, 0, 2157 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2158 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 2159 816, 0, 576, 577, 608, 609, 0, 2160 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2161 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 2162 864, 0, 576, 577, 608, 609, 0, 2163 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2164 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 2165 896, 0, 600, 601, 632, 633, 0, 2166 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2167 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 2168 928, 0, 624, 625, 656, 657, 0, 2169 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2170 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 2171 1016, 0, 766, 767, 798, 799, 0, 2172 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2173 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 2174 1120, 0, 768, 769, 800, 801, 0, 2175 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2176 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 2177 1376, 0, 1024, 1025, 1056, 1057, 0, 2178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2179 }; 2180 2181 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 2182 { 2183 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2184 const struct drm_connector_state *conn_state = connector->state; 2185 struct intel_sdvo_sdtv_resolution_request tv_res; 2186 u32 reply = 0, format_map = 0; 2187 int i; 2188 2189 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2190 connector->base.id, connector->name); 2191 2192 /* 2193 * Read the list of supported input resolutions for the selected TV 2194 * format. 2195 */ 2196 format_map = 1 << conn_state->tv.mode; 2197 memcpy(&tv_res, &format_map, 2198 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 2199 2200 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 2201 return; 2202 2203 BUILD_BUG_ON(sizeof(tv_res) != 3); 2204 if (!intel_sdvo_write_cmd(intel_sdvo, 2205 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 2206 &tv_res, sizeof(tv_res))) 2207 return; 2208 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 2209 return; 2210 2211 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 2212 if (reply & (1 << i)) { 2213 struct drm_display_mode *nmode; 2214 nmode = drm_mode_duplicate(connector->dev, 2215 &sdvo_tv_modes[i]); 2216 if (nmode) 2217 drm_mode_probed_add(connector, nmode); 2218 } 2219 } 2220 2221 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 2222 { 2223 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2224 struct drm_i915_private *dev_priv = to_i915(connector->dev); 2225 struct drm_display_mode *newmode; 2226 2227 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2228 connector->base.id, connector->name); 2229 2230 /* 2231 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 2232 * SDVO->LVDS transcoders can't cope with the EDID mode. 2233 */ 2234 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { 2235 newmode = drm_mode_duplicate(connector->dev, 2236 dev_priv->vbt.sdvo_lvds_vbt_mode); 2237 if (newmode != NULL) { 2238 /* Guarantee the mode is preferred */ 2239 newmode->type = (DRM_MODE_TYPE_PREFERRED | 2240 DRM_MODE_TYPE_DRIVER); 2241 drm_mode_probed_add(connector, newmode); 2242 } 2243 } 2244 2245 /* 2246 * Attempt to get the mode list from DDC. 2247 * Assume that the preferred modes are 2248 * arranged in priority order. 2249 */ 2250 intel_ddc_get_modes(connector, &intel_sdvo->ddc); 2251 } 2252 2253 static int intel_sdvo_get_modes(struct drm_connector *connector) 2254 { 2255 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2256 2257 if (IS_TV(intel_sdvo_connector)) 2258 intel_sdvo_get_tv_modes(connector); 2259 else if (IS_LVDS(intel_sdvo_connector)) 2260 intel_sdvo_get_lvds_modes(connector); 2261 else 2262 intel_sdvo_get_ddc_modes(connector); 2263 2264 return !list_empty(&connector->probed_modes); 2265 } 2266 2267 static int 2268 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector, 2269 const struct drm_connector_state *state, 2270 struct drm_property *property, 2271 u64 *val) 2272 { 2273 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2274 const struct intel_sdvo_connector_state *sdvo_state = 2275 const_container_of(state, struct intel_sdvo_connector_state, base.base); 2276 2277 if (property == intel_sdvo_connector->tv_format) { 2278 int i; 2279 2280 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2281 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) { 2282 *val = i; 2283 2284 return 0; 2285 } 2286 2287 WARN_ON(1); 2288 *val = 0; 2289 } else if (property == intel_sdvo_connector->top || 2290 property == intel_sdvo_connector->bottom) 2291 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v; 2292 else if (property == intel_sdvo_connector->left || 2293 property == intel_sdvo_connector->right) 2294 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h; 2295 else if (property == intel_sdvo_connector->hpos) 2296 *val = sdvo_state->tv.hpos; 2297 else if (property == intel_sdvo_connector->vpos) 2298 *val = sdvo_state->tv.vpos; 2299 else if (property == intel_sdvo_connector->saturation) 2300 *val = state->tv.saturation; 2301 else if (property == intel_sdvo_connector->contrast) 2302 *val = state->tv.contrast; 2303 else if (property == intel_sdvo_connector->hue) 2304 *val = state->tv.hue; 2305 else if (property == intel_sdvo_connector->brightness) 2306 *val = state->tv.brightness; 2307 else if (property == intel_sdvo_connector->sharpness) 2308 *val = sdvo_state->tv.sharpness; 2309 else if (property == intel_sdvo_connector->flicker_filter) 2310 *val = sdvo_state->tv.flicker_filter; 2311 else if (property == intel_sdvo_connector->flicker_filter_2d) 2312 *val = sdvo_state->tv.flicker_filter_2d; 2313 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2314 *val = sdvo_state->tv.flicker_filter_adaptive; 2315 else if (property == intel_sdvo_connector->tv_chroma_filter) 2316 *val = sdvo_state->tv.chroma_filter; 2317 else if (property == intel_sdvo_connector->tv_luma_filter) 2318 *val = sdvo_state->tv.luma_filter; 2319 else if (property == intel_sdvo_connector->dot_crawl) 2320 *val = sdvo_state->tv.dot_crawl; 2321 else 2322 return intel_digital_connector_atomic_get_property(connector, state, property, val); 2323 2324 return 0; 2325 } 2326 2327 static int 2328 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector, 2329 struct drm_connector_state *state, 2330 struct drm_property *property, 2331 u64 val) 2332 { 2333 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2334 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state); 2335 2336 if (property == intel_sdvo_connector->tv_format) { 2337 state->tv.mode = intel_sdvo_connector->tv_format_supported[val]; 2338 2339 if (state->crtc) { 2340 struct drm_crtc_state *crtc_state = 2341 drm_atomic_get_new_crtc_state(state->state, state->crtc); 2342 2343 crtc_state->connectors_changed = true; 2344 } 2345 } else if (property == intel_sdvo_connector->top || 2346 property == intel_sdvo_connector->bottom) 2347 /* Cannot set these independent from each other */ 2348 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val; 2349 else if (property == intel_sdvo_connector->left || 2350 property == intel_sdvo_connector->right) 2351 /* Cannot set these independent from each other */ 2352 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val; 2353 else if (property == intel_sdvo_connector->hpos) 2354 sdvo_state->tv.hpos = val; 2355 else if (property == intel_sdvo_connector->vpos) 2356 sdvo_state->tv.vpos = val; 2357 else if (property == intel_sdvo_connector->saturation) 2358 state->tv.saturation = val; 2359 else if (property == intel_sdvo_connector->contrast) 2360 state->tv.contrast = val; 2361 else if (property == intel_sdvo_connector->hue) 2362 state->tv.hue = val; 2363 else if (property == intel_sdvo_connector->brightness) 2364 state->tv.brightness = val; 2365 else if (property == intel_sdvo_connector->sharpness) 2366 sdvo_state->tv.sharpness = val; 2367 else if (property == intel_sdvo_connector->flicker_filter) 2368 sdvo_state->tv.flicker_filter = val; 2369 else if (property == intel_sdvo_connector->flicker_filter_2d) 2370 sdvo_state->tv.flicker_filter_2d = val; 2371 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2372 sdvo_state->tv.flicker_filter_adaptive = val; 2373 else if (property == intel_sdvo_connector->tv_chroma_filter) 2374 sdvo_state->tv.chroma_filter = val; 2375 else if (property == intel_sdvo_connector->tv_luma_filter) 2376 sdvo_state->tv.luma_filter = val; 2377 else if (property == intel_sdvo_connector->dot_crawl) 2378 sdvo_state->tv.dot_crawl = val; 2379 else 2380 return intel_digital_connector_atomic_set_property(connector, state, property, val); 2381 2382 return 0; 2383 } 2384 2385 static int 2386 intel_sdvo_connector_register(struct drm_connector *connector) 2387 { 2388 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2389 int ret; 2390 2391 ret = intel_connector_register(connector); 2392 if (ret) 2393 return ret; 2394 2395 #ifdef __NetBSD__ 2396 __USE(sdvo); 2397 return 0; 2398 #else 2399 return sysfs_create_link(&connector->kdev->kobj, 2400 &sdvo->ddc.dev.kobj, 2401 sdvo->ddc.dev.kobj.name); 2402 #endif 2403 } 2404 2405 static void 2406 intel_sdvo_connector_unregister(struct drm_connector *connector) 2407 { 2408 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2409 2410 #ifdef __NetBSD__ 2411 __USE(sdvo); 2412 #else 2413 sysfs_remove_link(&connector->kdev->kobj, 2414 sdvo->ddc.dev.kobj.name); 2415 #endif 2416 intel_connector_unregister(connector); 2417 } 2418 2419 static struct drm_connector_state * 2420 intel_sdvo_connector_duplicate_state(struct drm_connector *connector) 2421 { 2422 struct intel_sdvo_connector_state *state; 2423 2424 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL); 2425 if (!state) 2426 return NULL; 2427 2428 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base); 2429 return &state->base.base; 2430 } 2431 2432 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2433 .detect = intel_sdvo_detect, 2434 .fill_modes = drm_helper_probe_single_connector_modes, 2435 .atomic_get_property = intel_sdvo_connector_atomic_get_property, 2436 .atomic_set_property = intel_sdvo_connector_atomic_set_property, 2437 .late_register = intel_sdvo_connector_register, 2438 .early_unregister = intel_sdvo_connector_unregister, 2439 .destroy = intel_connector_destroy, 2440 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 2441 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state, 2442 }; 2443 2444 static int intel_sdvo_atomic_check(struct drm_connector *conn, 2445 struct drm_atomic_state *state) 2446 { 2447 struct drm_connector_state *new_conn_state = 2448 drm_atomic_get_new_connector_state(state, conn); 2449 struct drm_connector_state *old_conn_state = 2450 drm_atomic_get_old_connector_state(state, conn); 2451 struct intel_sdvo_connector_state *old_state = 2452 to_intel_sdvo_connector_state(old_conn_state); 2453 struct intel_sdvo_connector_state *new_state = 2454 to_intel_sdvo_connector_state(new_conn_state); 2455 2456 if (new_conn_state->crtc && 2457 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) || 2458 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) { 2459 struct drm_crtc_state *crtc_state = 2460 drm_atomic_get_new_crtc_state(state, 2461 new_conn_state->crtc); 2462 2463 crtc_state->connectors_changed = true; 2464 } 2465 2466 return intel_digital_connector_atomic_check(conn, state); 2467 } 2468 2469 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2470 .get_modes = intel_sdvo_get_modes, 2471 .mode_valid = intel_sdvo_mode_valid, 2472 .atomic_check = intel_sdvo_atomic_check, 2473 }; 2474 2475 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2476 { 2477 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); 2478 2479 i2c_del_adapter(&intel_sdvo->ddc); 2480 intel_encoder_destroy(encoder); 2481 } 2482 2483 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2484 .destroy = intel_sdvo_enc_destroy, 2485 }; 2486 2487 static void 2488 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2489 { 2490 u16 mask = 0; 2491 unsigned int num_bits; 2492 2493 /* 2494 * Make a mask of outputs less than or equal to our own priority in the 2495 * list. 2496 */ 2497 switch (sdvo->controlled_output) { 2498 case SDVO_OUTPUT_LVDS1: 2499 mask |= SDVO_OUTPUT_LVDS1; 2500 /* fall through */ 2501 case SDVO_OUTPUT_LVDS0: 2502 mask |= SDVO_OUTPUT_LVDS0; 2503 /* fall through */ 2504 case SDVO_OUTPUT_TMDS1: 2505 mask |= SDVO_OUTPUT_TMDS1; 2506 /* fall through */ 2507 case SDVO_OUTPUT_TMDS0: 2508 mask |= SDVO_OUTPUT_TMDS0; 2509 /* fall through */ 2510 case SDVO_OUTPUT_RGB1: 2511 mask |= SDVO_OUTPUT_RGB1; 2512 /* fall through */ 2513 case SDVO_OUTPUT_RGB0: 2514 mask |= SDVO_OUTPUT_RGB0; 2515 break; 2516 } 2517 2518 /* Count bits to find what number we are in the priority list. */ 2519 mask &= sdvo->caps.output_flags; 2520 num_bits = hweight16(mask); 2521 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2522 if (num_bits > 3) 2523 num_bits = 3; 2524 2525 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2526 sdvo->ddc_bus = 1 << num_bits; 2527 } 2528 2529 /* 2530 * Choose the appropriate DDC bus for control bus switch command for this 2531 * SDVO output based on the controlled output. 2532 * 2533 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2534 * outputs, then LVDS outputs. 2535 */ 2536 static void 2537 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2538 struct intel_sdvo *sdvo) 2539 { 2540 struct sdvo_device_mapping *mapping; 2541 2542 if (sdvo->port == PORT_B) 2543 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2544 else 2545 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2546 2547 if (mapping->initialized) 2548 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2549 else 2550 intel_sdvo_guess_ddc_bus(sdvo); 2551 } 2552 2553 static void 2554 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2555 struct intel_sdvo *sdvo) 2556 { 2557 struct sdvo_device_mapping *mapping; 2558 u8 pin; 2559 2560 if (sdvo->port == PORT_B) 2561 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2562 else 2563 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2564 2565 if (mapping->initialized && 2566 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) 2567 pin = mapping->i2c_pin; 2568 else 2569 pin = GMBUS_PIN_DPB; 2570 2571 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2572 2573 /* 2574 * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2575 * our code totally fails once we start using gmbus. Hence fall back to 2576 * bit banging for now. 2577 */ 2578 intel_gmbus_force_bit(sdvo->i2c, true); 2579 } 2580 2581 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2582 static void 2583 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2584 { 2585 intel_gmbus_force_bit(sdvo->i2c, false); 2586 } 2587 2588 static bool 2589 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2590 { 2591 return intel_sdvo_check_supp_encode(intel_sdvo); 2592 } 2593 2594 static u8 2595 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv, 2596 struct intel_sdvo *sdvo) 2597 { 2598 struct sdvo_device_mapping *my_mapping, *other_mapping; 2599 2600 if (sdvo->port == PORT_B) { 2601 my_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2602 other_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2603 } else { 2604 my_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2605 other_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2606 } 2607 2608 /* If the BIOS described our SDVO device, take advantage of it. */ 2609 if (my_mapping->slave_addr) 2610 return my_mapping->slave_addr; 2611 2612 /* 2613 * If the BIOS only described a different SDVO device, use the 2614 * address that it isn't using. 2615 */ 2616 if (other_mapping->slave_addr) { 2617 if (other_mapping->slave_addr == 0x70) 2618 return 0x72; 2619 else 2620 return 0x70; 2621 } 2622 2623 /* 2624 * No SDVO device info is found for another DVO port, 2625 * so use mapping assumption we had before BIOS parsing. 2626 */ 2627 if (sdvo->port == PORT_B) 2628 return 0x70; 2629 else 2630 return 0x72; 2631 } 2632 2633 static int 2634 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2635 struct intel_sdvo *encoder) 2636 { 2637 struct drm_connector *drm_connector; 2638 int ret; 2639 2640 drm_connector = &connector->base.base; 2641 ret = drm_connector_init(encoder->base.base.dev, 2642 drm_connector, 2643 &intel_sdvo_connector_funcs, 2644 connector->base.base.connector_type); 2645 if (ret < 0) 2646 return ret; 2647 2648 drm_connector_helper_add(drm_connector, 2649 &intel_sdvo_connector_helper_funcs); 2650 2651 connector->base.base.interlace_allowed = 1; 2652 connector->base.base.doublescan_allowed = 0; 2653 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2654 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2655 2656 intel_connector_attach_encoder(&connector->base, &encoder->base); 2657 2658 return 0; 2659 } 2660 2661 static void 2662 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, 2663 struct intel_sdvo_connector *connector) 2664 { 2665 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev); 2666 2667 intel_attach_force_audio_property(&connector->base.base); 2668 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) { 2669 intel_attach_broadcast_rgb_property(&connector->base.base); 2670 } 2671 intel_attach_aspect_ratio_property(&connector->base.base); 2672 } 2673 2674 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void) 2675 { 2676 struct intel_sdvo_connector *sdvo_connector; 2677 struct intel_sdvo_connector_state *conn_state; 2678 2679 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL); 2680 if (!sdvo_connector) 2681 return NULL; 2682 2683 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL); 2684 if (!conn_state) { 2685 kfree(sdvo_connector); 2686 return NULL; 2687 } 2688 2689 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base, 2690 &conn_state->base.base); 2691 2692 return sdvo_connector; 2693 } 2694 2695 static bool 2696 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2697 { 2698 struct drm_encoder *encoder = &intel_sdvo->base.base; 2699 struct drm_connector *connector; 2700 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2701 struct intel_connector *intel_connector; 2702 struct intel_sdvo_connector *intel_sdvo_connector; 2703 2704 DRM_DEBUG_KMS("initialising DVI device %d\n", device); 2705 2706 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2707 if (!intel_sdvo_connector) 2708 return false; 2709 2710 if (device == 0) { 2711 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2712 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2713 } else if (device == 1) { 2714 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2715 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2716 } 2717 2718 intel_connector = &intel_sdvo_connector->base; 2719 connector = &intel_connector->base; 2720 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2721 intel_sdvo_connector->output_flag) { 2722 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2723 /* 2724 * Some SDVO devices have one-shot hotplug interrupts. 2725 * Ensure that they get re-enabled when an interrupt happens. 2726 */ 2727 intel_encoder->hotplug = intel_sdvo_hotplug; 2728 intel_sdvo_enable_hotplug(intel_encoder); 2729 } else { 2730 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2731 } 2732 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2733 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2734 2735 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2736 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2737 intel_sdvo_connector->is_hdmi = true; 2738 } 2739 2740 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2741 kfree(intel_sdvo_connector); 2742 return false; 2743 } 2744 2745 if (intel_sdvo_connector->is_hdmi) 2746 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); 2747 2748 return true; 2749 } 2750 2751 static bool 2752 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2753 { 2754 struct drm_encoder *encoder = &intel_sdvo->base.base; 2755 struct drm_connector *connector; 2756 struct intel_connector *intel_connector; 2757 struct intel_sdvo_connector *intel_sdvo_connector; 2758 2759 DRM_DEBUG_KMS("initialising TV type %d\n", type); 2760 2761 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2762 if (!intel_sdvo_connector) 2763 return false; 2764 2765 intel_connector = &intel_sdvo_connector->base; 2766 connector = &intel_connector->base; 2767 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2768 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2769 2770 intel_sdvo->controlled_output |= type; 2771 intel_sdvo_connector->output_flag = type; 2772 2773 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2774 kfree(intel_sdvo_connector); 2775 return false; 2776 } 2777 2778 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2779 goto err; 2780 2781 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2782 goto err; 2783 2784 return true; 2785 2786 err: 2787 intel_connector_destroy(connector); 2788 return false; 2789 } 2790 2791 static bool 2792 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2793 { 2794 struct drm_encoder *encoder = &intel_sdvo->base.base; 2795 struct drm_connector *connector; 2796 struct intel_connector *intel_connector; 2797 struct intel_sdvo_connector *intel_sdvo_connector; 2798 2799 DRM_DEBUG_KMS("initialising analog device %d\n", device); 2800 2801 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2802 if (!intel_sdvo_connector) 2803 return false; 2804 2805 intel_connector = &intel_sdvo_connector->base; 2806 connector = &intel_connector->base; 2807 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2808 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2809 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2810 2811 if (device == 0) { 2812 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2813 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2814 } else if (device == 1) { 2815 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2816 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2817 } 2818 2819 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2820 kfree(intel_sdvo_connector); 2821 return false; 2822 } 2823 2824 return true; 2825 } 2826 2827 static bool 2828 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2829 { 2830 struct drm_encoder *encoder = &intel_sdvo->base.base; 2831 struct drm_connector *connector; 2832 struct intel_connector *intel_connector; 2833 struct intel_sdvo_connector *intel_sdvo_connector; 2834 struct drm_display_mode *mode; 2835 2836 DRM_DEBUG_KMS("initialising LVDS device %d\n", device); 2837 2838 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2839 if (!intel_sdvo_connector) 2840 return false; 2841 2842 intel_connector = &intel_sdvo_connector->base; 2843 connector = &intel_connector->base; 2844 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2845 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2846 2847 if (device == 0) { 2848 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2849 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2850 } else if (device == 1) { 2851 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2852 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2853 } 2854 2855 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2856 kfree(intel_sdvo_connector); 2857 return false; 2858 } 2859 2860 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2861 goto err; 2862 2863 intel_sdvo_get_lvds_modes(connector); 2864 2865 list_for_each_entry(mode, &connector->probed_modes, head) { 2866 if (mode->type & DRM_MODE_TYPE_PREFERRED) { 2867 struct drm_display_mode *fixed_mode = 2868 drm_mode_duplicate(connector->dev, mode); 2869 2870 intel_panel_init(&intel_connector->panel, 2871 fixed_mode, NULL); 2872 break; 2873 } 2874 } 2875 2876 if (!intel_connector->panel.fixed_mode) 2877 goto err; 2878 2879 return true; 2880 2881 err: 2882 intel_connector_destroy(connector); 2883 return false; 2884 } 2885 2886 static bool 2887 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags) 2888 { 2889 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2890 2891 if (flags & SDVO_OUTPUT_TMDS0) 2892 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2893 return false; 2894 2895 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2896 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2897 return false; 2898 2899 /* TV has no XXX1 function block */ 2900 if (flags & SDVO_OUTPUT_SVID0) 2901 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2902 return false; 2903 2904 if (flags & SDVO_OUTPUT_CVBS0) 2905 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2906 return false; 2907 2908 if (flags & SDVO_OUTPUT_YPRPB0) 2909 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2910 return false; 2911 2912 if (flags & SDVO_OUTPUT_RGB0) 2913 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2914 return false; 2915 2916 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2917 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2918 return false; 2919 2920 if (flags & SDVO_OUTPUT_LVDS0) 2921 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2922 return false; 2923 2924 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2925 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2926 return false; 2927 2928 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2929 unsigned char bytes[2]; 2930 2931 intel_sdvo->controlled_output = 0; 2932 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2933 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2934 SDVO_NAME(intel_sdvo), 2935 bytes[0], bytes[1]); 2936 return false; 2937 } 2938 intel_sdvo->base.pipe_mask = ~0; 2939 2940 return true; 2941 } 2942 2943 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2944 { 2945 struct drm_device *dev = intel_sdvo->base.base.dev; 2946 struct drm_connector *connector, *tmp; 2947 2948 list_for_each_entry_safe(connector, tmp, 2949 &dev->mode_config.connector_list, head) { 2950 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) { 2951 drm_connector_unregister(connector); 2952 intel_connector_destroy(connector); 2953 } 2954 } 2955 } 2956 2957 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2958 struct intel_sdvo_connector *intel_sdvo_connector, 2959 int type) 2960 { 2961 struct drm_device *dev = intel_sdvo->base.base.dev; 2962 struct intel_sdvo_tv_format format; 2963 u32 format_map, i; 2964 2965 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2966 return false; 2967 2968 BUILD_BUG_ON(sizeof(format) != 6); 2969 if (!intel_sdvo_get_value(intel_sdvo, 2970 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2971 &format, sizeof(format))) 2972 return false; 2973 2974 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2975 2976 if (format_map == 0) 2977 return false; 2978 2979 intel_sdvo_connector->format_supported_num = 0; 2980 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2981 if (format_map & (1 << i)) 2982 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2983 2984 2985 intel_sdvo_connector->tv_format = 2986 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2987 "mode", intel_sdvo_connector->format_supported_num); 2988 if (!intel_sdvo_connector->tv_format) 2989 return false; 2990 2991 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2992 drm_property_add_enum(intel_sdvo_connector->tv_format, i, 2993 tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2994 2995 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0]; 2996 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2997 intel_sdvo_connector->tv_format, 0); 2998 return true; 2999 3000 } 3001 3002 #define _ENHANCEMENT(state_assignment, name, NAME) do { \ 3003 if (enhancements.name) { \ 3004 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 3005 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 3006 return false; \ 3007 intel_sdvo_connector->name = \ 3008 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 3009 if (!intel_sdvo_connector->name) return false; \ 3010 state_assignment = response; \ 3011 drm_object_attach_property(&connector->base, \ 3012 intel_sdvo_connector->name, 0); \ 3013 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 3014 data_value[0], data_value[1], response); \ 3015 } \ 3016 } while (0) 3017 3018 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME) 3019 3020 static bool 3021 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 3022 struct intel_sdvo_connector *intel_sdvo_connector, 3023 struct intel_sdvo_enhancements_reply enhancements) 3024 { 3025 struct drm_device *dev = intel_sdvo->base.base.dev; 3026 struct drm_connector *connector = &intel_sdvo_connector->base.base; 3027 struct drm_connector_state *conn_state = connector->state; 3028 struct intel_sdvo_connector_state *sdvo_state = 3029 to_intel_sdvo_connector_state(conn_state); 3030 u16 response, data_value[2]; 3031 3032 /* when horizontal overscan is supported, Add the left/right property */ 3033 if (enhancements.overscan_h) { 3034 if (!intel_sdvo_get_value(intel_sdvo, 3035 SDVO_CMD_GET_MAX_OVERSCAN_H, 3036 &data_value, 4)) 3037 return false; 3038 3039 if (!intel_sdvo_get_value(intel_sdvo, 3040 SDVO_CMD_GET_OVERSCAN_H, 3041 &response, 2)) 3042 return false; 3043 3044 sdvo_state->tv.overscan_h = response; 3045 3046 intel_sdvo_connector->max_hscan = data_value[0]; 3047 intel_sdvo_connector->left = 3048 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 3049 if (!intel_sdvo_connector->left) 3050 return false; 3051 3052 drm_object_attach_property(&connector->base, 3053 intel_sdvo_connector->left, 0); 3054 3055 intel_sdvo_connector->right = 3056 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 3057 if (!intel_sdvo_connector->right) 3058 return false; 3059 3060 drm_object_attach_property(&connector->base, 3061 intel_sdvo_connector->right, 0); 3062 DRM_DEBUG_KMS("h_overscan: max %d, " 3063 "default %d, current %d\n", 3064 data_value[0], data_value[1], response); 3065 } 3066 3067 if (enhancements.overscan_v) { 3068 if (!intel_sdvo_get_value(intel_sdvo, 3069 SDVO_CMD_GET_MAX_OVERSCAN_V, 3070 &data_value, 4)) 3071 return false; 3072 3073 if (!intel_sdvo_get_value(intel_sdvo, 3074 SDVO_CMD_GET_OVERSCAN_V, 3075 &response, 2)) 3076 return false; 3077 3078 sdvo_state->tv.overscan_v = response; 3079 3080 intel_sdvo_connector->max_vscan = data_value[0]; 3081 intel_sdvo_connector->top = 3082 drm_property_create_range(dev, 0, 3083 "top_margin", 0, data_value[0]); 3084 if (!intel_sdvo_connector->top) 3085 return false; 3086 3087 drm_object_attach_property(&connector->base, 3088 intel_sdvo_connector->top, 0); 3089 3090 intel_sdvo_connector->bottom = 3091 drm_property_create_range(dev, 0, 3092 "bottom_margin", 0, data_value[0]); 3093 if (!intel_sdvo_connector->bottom) 3094 return false; 3095 3096 drm_object_attach_property(&connector->base, 3097 intel_sdvo_connector->bottom, 0); 3098 DRM_DEBUG_KMS("v_overscan: max %d, " 3099 "default %d, current %d\n", 3100 data_value[0], data_value[1], response); 3101 } 3102 3103 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS); 3104 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS); 3105 ENHANCEMENT(&conn_state->tv, saturation, SATURATION); 3106 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST); 3107 ENHANCEMENT(&conn_state->tv, hue, HUE); 3108 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS); 3109 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS); 3110 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER); 3111 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 3112 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D); 3113 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER); 3114 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER); 3115 3116 if (enhancements.dot_crawl) { 3117 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 3118 return false; 3119 3120 sdvo_state->tv.dot_crawl = response & 0x1; 3121 intel_sdvo_connector->dot_crawl = 3122 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 3123 if (!intel_sdvo_connector->dot_crawl) 3124 return false; 3125 3126 drm_object_attach_property(&connector->base, 3127 intel_sdvo_connector->dot_crawl, 0); 3128 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 3129 } 3130 3131 return true; 3132 } 3133 3134 static bool 3135 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 3136 struct intel_sdvo_connector *intel_sdvo_connector, 3137 struct intel_sdvo_enhancements_reply enhancements) 3138 { 3139 struct drm_device *dev = intel_sdvo->base.base.dev; 3140 struct drm_connector *connector = &intel_sdvo_connector->base.base; 3141 u16 response, data_value[2]; 3142 3143 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS); 3144 3145 return true; 3146 } 3147 #undef ENHANCEMENT 3148 #undef _ENHANCEMENT 3149 3150 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 3151 struct intel_sdvo_connector *intel_sdvo_connector) 3152 { 3153 union { 3154 struct intel_sdvo_enhancements_reply reply; 3155 u16 response; 3156 } enhancements; 3157 3158 BUILD_BUG_ON(sizeof(enhancements) != 2); 3159 3160 if (!intel_sdvo_get_value(intel_sdvo, 3161 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 3162 &enhancements, sizeof(enhancements)) || 3163 enhancements.response == 0) { 3164 DRM_DEBUG_KMS("No enhancement is supported\n"); 3165 return true; 3166 } 3167 3168 if (IS_TV(intel_sdvo_connector)) 3169 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 3170 else if (IS_LVDS(intel_sdvo_connector)) 3171 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 3172 else 3173 return true; 3174 } 3175 3176 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 3177 struct i2c_msg *msgs, 3178 int num) 3179 { 3180 struct intel_sdvo *sdvo = adapter->algo_data; 3181 3182 if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 3183 return -EIO; 3184 3185 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 3186 } 3187 3188 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 3189 { 3190 struct intel_sdvo *sdvo = adapter->algo_data; 3191 return sdvo->i2c->algo->functionality(sdvo->i2c); 3192 } 3193 3194 static const struct i2c_algorithm intel_sdvo_ddc_proxy = { 3195 .master_xfer = intel_sdvo_ddc_proxy_xfer, 3196 .functionality = intel_sdvo_ddc_proxy_func 3197 }; 3198 3199 static void proxy_lock_bus(struct i2c_adapter *adapter, 3200 unsigned int flags) 3201 { 3202 struct intel_sdvo *sdvo = adapter->algo_data; 3203 sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags); 3204 } 3205 3206 static int proxy_trylock_bus(struct i2c_adapter *adapter, 3207 unsigned int flags) 3208 { 3209 struct intel_sdvo *sdvo = adapter->algo_data; 3210 return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags); 3211 } 3212 3213 static void proxy_unlock_bus(struct i2c_adapter *adapter, 3214 unsigned int flags) 3215 { 3216 struct intel_sdvo *sdvo = adapter->algo_data; 3217 sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags); 3218 } 3219 3220 static const struct i2c_lock_operations proxy_lock_ops = { 3221 .lock_bus = proxy_lock_bus, 3222 .trylock_bus = proxy_trylock_bus, 3223 .unlock_bus = proxy_unlock_bus, 3224 }; 3225 3226 static bool 3227 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, 3228 struct drm_i915_private *dev_priv) 3229 { 3230 struct pci_dev *pdev = dev_priv->drm.pdev; 3231 3232 sdvo->ddc.owner = THIS_MODULE; 3233 sdvo->ddc.class = I2C_CLASS_DDC; 3234 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 3235 sdvo->ddc.dev.parent = pci_dev_dev(pdev); 3236 sdvo->ddc.algo_data = sdvo; 3237 sdvo->ddc.algo = &intel_sdvo_ddc_proxy; 3238 sdvo->ddc.lock_ops = &proxy_lock_ops; 3239 3240 return i2c_add_adapter(&sdvo->ddc) == 0; 3241 } 3242 3243 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv, 3244 enum port port) 3245 { 3246 if (HAS_PCH_SPLIT(dev_priv)) 3247 WARN_ON(port != PORT_B); 3248 else 3249 WARN_ON(port != PORT_B && port != PORT_C); 3250 } 3251 3252 bool intel_sdvo_init(struct drm_i915_private *dev_priv, 3253 i915_reg_t sdvo_reg, enum port port) 3254 { 3255 struct intel_encoder *intel_encoder; 3256 struct intel_sdvo *intel_sdvo; 3257 int i; 3258 3259 assert_sdvo_port_valid(dev_priv, port); 3260 3261 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); 3262 if (!intel_sdvo) 3263 return false; 3264 3265 intel_sdvo->sdvo_reg = sdvo_reg; 3266 intel_sdvo->port = port; 3267 intel_sdvo->slave_addr = 3268 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1; 3269 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo); 3270 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv)) 3271 goto err_i2c_bus; 3272 3273 /* encoder type will be decided later */ 3274 intel_encoder = &intel_sdvo->base; 3275 intel_encoder->type = INTEL_OUTPUT_SDVO; 3276 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 3277 intel_encoder->port = port; 3278 drm_encoder_init(&dev_priv->drm, &intel_encoder->base, 3279 &intel_sdvo_enc_funcs, 0, 3280 "SDVO %c", port_name(port)); 3281 3282 /* Read the regs to test if we can talk to the device */ 3283 for (i = 0; i < 0x40; i++) { 3284 u8 byte; 3285 3286 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 3287 DRM_DEBUG_KMS("No SDVO device found on %s\n", 3288 SDVO_NAME(intel_sdvo)); 3289 goto err; 3290 } 3291 } 3292 3293 intel_encoder->compute_config = intel_sdvo_compute_config; 3294 if (HAS_PCH_SPLIT(dev_priv)) { 3295 intel_encoder->disable = pch_disable_sdvo; 3296 intel_encoder->post_disable = pch_post_disable_sdvo; 3297 } else { 3298 intel_encoder->disable = intel_disable_sdvo; 3299 } 3300 intel_encoder->pre_enable = intel_sdvo_pre_enable; 3301 intel_encoder->enable = intel_enable_sdvo; 3302 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 3303 intel_encoder->get_config = intel_sdvo_get_config; 3304 3305 /* In default case sdvo lvds is false */ 3306 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 3307 goto err; 3308 3309 if (intel_sdvo_output_setup(intel_sdvo, 3310 intel_sdvo->caps.output_flags) != true) { 3311 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", 3312 SDVO_NAME(intel_sdvo)); 3313 /* Output_setup can leave behind connectors! */ 3314 goto err_output; 3315 } 3316 3317 /* 3318 * Only enable the hotplug irq if we need it, to work around noisy 3319 * hotplug lines. 3320 */ 3321 if (intel_sdvo->hotplug_active) { 3322 if (intel_sdvo->port == PORT_B) 3323 intel_encoder->hpd_pin = HPD_SDVO_B; 3324 else 3325 intel_encoder->hpd_pin = HPD_SDVO_C; 3326 } 3327 3328 /* 3329 * Cloning SDVO with anything is often impossible, since the SDVO 3330 * encoder can request a special input timing mode. And even if that's 3331 * not the case we have evidence that cloning a plain unscaled mode with 3332 * VGA doesn't really work. Furthermore the cloning flags are way too 3333 * simplistic anyway to express such constraints, so just give up on 3334 * cloning for SDVO encoders. 3335 */ 3336 intel_sdvo->base.cloneable = 0; 3337 3338 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo); 3339 3340 /* Set the input timing to the screen. Assume always input 0. */ 3341 if (!intel_sdvo_set_target_input(intel_sdvo)) 3342 goto err_output; 3343 3344 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 3345 &intel_sdvo->pixel_clock_min, 3346 &intel_sdvo->pixel_clock_max)) 3347 goto err_output; 3348 3349 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 3350 "clock range %dMHz - %dMHz, " 3351 "input 1: %c, input 2: %c, " 3352 "output 1: %c, output 2: %c\n", 3353 SDVO_NAME(intel_sdvo), 3354 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 3355 intel_sdvo->caps.device_rev_id, 3356 intel_sdvo->pixel_clock_min / 1000, 3357 intel_sdvo->pixel_clock_max / 1000, 3358 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 3359 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 3360 /* check currently supported outputs */ 3361 intel_sdvo->caps.output_flags & 3362 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 3363 intel_sdvo->caps.output_flags & 3364 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 3365 return true; 3366 3367 err_output: 3368 intel_sdvo_output_cleanup(intel_sdvo); 3369 3370 err: 3371 drm_encoder_cleanup(&intel_encoder->base); 3372 i2c_del_adapter(&intel_sdvo->ddc); 3373 err_i2c_bus: 3374 intel_sdvo_unselect_i2c_bus(intel_sdvo); 3375 kfree(intel_sdvo); 3376 3377 return false; 3378 } 3379
Indexes created Sat Sep 20 22:09:52 GMT 2025