1 /* $NetBSD: r300d.h,v 1.3 2021/12/18 23:45:42 riastradh Exp $ */ 2 3 /* 4 * Copyright 2008 Advanced Micro Devices, Inc. 5 * Copyright 2008 Red Hat Inc. 6 * Copyright 2009 Jerome Glisse. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 24 * OTHER DEALINGS IN THE SOFTWARE. 25 * 26 * Authors: Dave Airlie 27 * Alex Deucher 28 * Jerome Glisse 29 */ 30 #ifndef __R300D_H__ 31 #define __R300D_H__ 32 33 #define CP_PACKET0 0x00000000 34 #define PACKET0_BASE_INDEX_SHIFT 0 35 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0) 36 #define PACKET0_COUNT_SHIFT 16 37 #define PACKET0_COUNT_MASK (0x3fff << 16) 38 #define CP_PACKET1 0x40000000 39 #define CP_PACKET2 0x80000000 40 #define PACKET2_PAD_SHIFT 0 41 #define PACKET2_PAD_MASK (0x3fffffff << 0) 42 #define CP_PACKET3 0xC0000000 43 #define PACKET3_IT_OPCODE_SHIFT 8 44 #define PACKET3_IT_OPCODE_MASK (0xff << 8) 45 #define PACKET3_COUNT_SHIFT 16 46 #define PACKET3_COUNT_MASK (0x3fff << 16) 47 /* PACKET3 op code */ 48 #define PACKET3_NOP 0x10 49 #define PACKET3_3D_DRAW_VBUF 0x28 50 #define PACKET3_3D_DRAW_IMMD 0x29 51 #define PACKET3_3D_DRAW_INDX 0x2A 52 #define PACKET3_3D_LOAD_VBPNTR 0x2F 53 #define PACKET3_3D_CLEAR_ZMASK 0x32 54 #define PACKET3_INDX_BUFFER 0x33 55 #define PACKET3_3D_DRAW_VBUF_2 0x34 56 #define PACKET3_3D_DRAW_IMMD_2 0x35 57 #define PACKET3_3D_DRAW_INDX_2 0x36 58 #define PACKET3_3D_CLEAR_HIZ 0x37 59 #define PACKET3_3D_CLEAR_CMASK 0x38 60 #define PACKET3_BITBLT_MULTI 0x9B 61 62 #define PACKET0(reg, n) (CP_PACKET0 | \ 63 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \ 64 REG_SET(PACKET0_COUNT, (n))) 65 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) 66 #define PACKET3(op, n) (CP_PACKET3 | \ 67 REG_SET(PACKET3_IT_OPCODE, (op)) | \ 68 REG_SET(PACKET3_COUNT, (n))) 69 70 /* Registers */ 71 #define R_000148_MC_FB_LOCATION 0x000148 72 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 73 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 74 #define C_000148_MC_FB_START 0xFFFF0000 75 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 76 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 77 #define C_000148_MC_FB_TOP 0x0000FFFF 78 #define R_00014C_MC_AGP_LOCATION 0x00014C 79 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) 80 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) 81 #define C_00014C_MC_AGP_START 0xFFFF0000 82 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) 83 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) 84 #define C_00014C_MC_AGP_TOP 0x0000FFFF 85 #define R_00015C_AGP_BASE_2 0x00015C 86 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) 87 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) 88 #define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0 89 #define R_000170_AGP_BASE 0x000170 90 #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) 91 #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) 92 #define C_000170_AGP_BASE_ADDR 0x00000000 93 #define R_0007C0_CP_STAT 0x0007C0 94 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 95 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 96 #define C_0007C0_MRU_BUSY 0xFFFFFFFE 97 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 98 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 99 #define C_0007C0_MWU_BUSY 0xFFFFFFFD 100 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 101 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 102 #define C_0007C0_RSIU_BUSY 0xFFFFFFFB 103 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 104 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 105 #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 106 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 107 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 108 #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 109 #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 110 #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 111 #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 112 #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 113 #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 114 #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 115 #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 116 #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 117 #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 118 #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 119 #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 120 #define C_0007C0_CSI_BUSY 0xFFFFDFFF 121 #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 122 #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 123 #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 124 #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 125 #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 126 #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 127 #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 128 #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 129 #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 130 #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 131 #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 132 #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 133 #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 134 #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 135 #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 136 #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 137 #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 138 #define C_0007C0_CP_BUSY 0x7FFFFFFF 139 #define R_000E40_RBBM_STATUS 0x000E40 140 #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 141 #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 142 #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 143 #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 144 #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 145 #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 146 #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 147 #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 148 #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 149 #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 150 #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 151 #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 152 #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 153 #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 154 #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 155 #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 156 #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 157 #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 158 #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 159 #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 160 #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 161 #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 162 #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 163 #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 164 #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 165 #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 166 #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 167 #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 168 #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 169 #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 170 #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 171 #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 172 #define C_000E40_E2_BUSY 0xFFFDFFFF 173 #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 174 #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 175 #define C_000E40_RB2D_BUSY 0xFFFBFFFF 176 #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 177 #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 178 #define C_000E40_RB3D_BUSY 0xFFF7FFFF 179 #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 180 #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 181 #define C_000E40_VAP_BUSY 0xFFEFFFFF 182 #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 183 #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 184 #define C_000E40_RE_BUSY 0xFFDFFFFF 185 #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 186 #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 187 #define C_000E40_TAM_BUSY 0xFFBFFFFF 188 #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 189 #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 190 #define C_000E40_TDM_BUSY 0xFF7FFFFF 191 #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 192 #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 193 #define C_000E40_PB_BUSY 0xFEFFFFFF 194 #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 195 #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 196 #define C_000E40_TIM_BUSY 0xFDFFFFFF 197 #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 198 #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 199 #define C_000E40_GA_BUSY 0xFBFFFFFF 200 #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 201 #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 202 #define C_000E40_CBA2D_BUSY 0xF7FFFFFF 203 #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 204 #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 205 #define C_000E40_GUI_ACTIVE 0x7FFFFFFF 206 #define R_0000F0_RBBM_SOFT_RESET 0x0000F0 207 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 208 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 209 #define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE 210 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 211 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 212 #define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD 213 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 214 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 215 #define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB 216 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 217 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 218 #define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7 219 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 220 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) 221 #define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF 222 #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) 223 #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) 224 #define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF 225 #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) 226 #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) 227 #define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF 228 #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) 229 #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) 230 #define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F 231 #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) 232 #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) 233 #define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF 234 #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) 235 #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) 236 #define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF 237 #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) 238 #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) 239 #define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF 240 #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) 241 #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) 242 #define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF 243 #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) 244 #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) 245 #define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF 246 #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) 247 #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) 248 #define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF 249 #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) 250 #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) 251 #define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF 252 253 #define R_00000D_SCLK_CNTL 0x00000D 254 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) 255 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) 256 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8 257 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 258 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 259 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7 260 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 261 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 262 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF 263 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 264 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 265 #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF 266 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 267 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 268 #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF 269 #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 270 #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) 271 #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F 272 #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) 273 #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) 274 #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF 275 #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) 276 #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) 277 #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF 278 #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) 279 #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) 280 #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF 281 #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) 282 #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) 283 #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF 284 #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) 285 #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) 286 #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF 287 #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) 288 #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) 289 #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF 290 #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) 291 #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) 292 #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF 293 #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) 294 #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) 295 #define C_00000D_FORCE_DISP2 0xFFFF7FFF 296 #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) 297 #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) 298 #define C_00000D_FORCE_CP 0xFFFEFFFF 299 #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) 300 #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) 301 #define C_00000D_FORCE_HDP 0xFFFDFFFF 302 #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) 303 #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) 304 #define C_00000D_FORCE_DISP1 0xFFFBFFFF 305 #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) 306 #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) 307 #define C_00000D_FORCE_TOP 0xFFF7FFFF 308 #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) 309 #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) 310 #define C_00000D_FORCE_E2 0xFFEFFFFF 311 #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) 312 #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) 313 #define C_00000D_FORCE_SE 0xFFDFFFFF 314 #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) 315 #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) 316 #define C_00000D_FORCE_IDCT 0xFFBFFFFF 317 #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) 318 #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) 319 #define C_00000D_FORCE_VIP 0xFF7FFFFF 320 #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) 321 #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) 322 #define C_00000D_FORCE_RE 0xFEFFFFFF 323 #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) 324 #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) 325 #define C_00000D_FORCE_PB 0xFDFFFFFF 326 #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) 327 #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) 328 #define C_00000D_FORCE_TAM 0xFBFFFFFF 329 #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) 330 #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) 331 #define C_00000D_FORCE_TDM 0xF7FFFFFF 332 #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) 333 #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) 334 #define C_00000D_FORCE_RB 0xEFFFFFFF 335 #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) 336 #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) 337 #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF 338 #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) 339 #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) 340 #define C_00000D_FORCE_SUBPIC 0xBFFFFFFF 341 #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) 342 #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) 343 #define C_00000D_FORCE_OV0 0x7FFFFFFF 344 345 #endif 346
Indexes created Fri Sep 26 20:09:58 GMT 2025