1 /* $NetBSD: svga3d_devcaps.h,v 1.3 2021/12/18 23:45:45 riastradh Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 4 /********************************************************** 5 * Copyright 1998-2015 VMware, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person 8 * obtaining a copy of this software and associated documentation 9 * files (the "Software"), to deal in the Software without 10 * restriction, including without limitation the rights to use, copy, 11 * modify, merge, publish, distribute, sublicense, and/or sell copies 12 * of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be 16 * included in all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 21 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 22 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 23 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 24 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 25 * SOFTWARE. 26 * 27 **********************************************************/ 28 29 /* 30 * svga3d_devcaps.h -- 31 * 32 * SVGA 3d caps definitions 33 */ 34 35 #ifndef _SVGA3D_DEVCAPS_H_ 36 #define _SVGA3D_DEVCAPS_H_ 37 38 #define INCLUDE_ALLOW_MODULE 39 #define INCLUDE_ALLOW_USERLEVEL 40 #define INCLUDE_ALLOW_VMCORE 41 42 #include "includeCheck.h" 43 44 /* 45 * 3D Hardware Version 46 * 47 * The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo 48 * register. Is set by the host and read by the guest. This lets 49 * us make new guest drivers which are backwards-compatible with old 50 * SVGA hardware revisions. It does not let us support old guest 51 * drivers. Good enough for now. 52 * 53 */ 54 55 #define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) 56 #define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16) 57 #define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF) 58 59 typedef enum { 60 SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1), 61 SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2), 62 SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3), 63 SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1), 64 SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4), 65 SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0), 66 SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1), 67 SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1, 68 } SVGA3dHardwareVersion; 69 70 /* 71 * DevCap indexes. 72 */ 73 74 typedef enum { 75 SVGA3D_DEVCAP_INVALID = ((uint32)-1), 76 SVGA3D_DEVCAP_3D = 0, 77 SVGA3D_DEVCAP_MAX_LIGHTS = 1, 78 79 /* 80 * SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of 81 * fixed-function texture units available. Each of these units 82 * work in both FFP and Shader modes, and they support texture 83 * transforms and texture coordinates. The host may have additional 84 * texture image units that are only usable with shaders. 85 */ 86 SVGA3D_DEVCAP_MAX_TEXTURES = 2, 87 SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3, 88 SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4, 89 SVGA3D_DEVCAP_VERTEX_SHADER = 5, 90 SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6, 91 SVGA3D_DEVCAP_FRAGMENT_SHADER = 7, 92 SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8, 93 SVGA3D_DEVCAP_S23E8_TEXTURES = 9, 94 SVGA3D_DEVCAP_S10E5_TEXTURES = 10, 95 SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11, 96 SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12, 97 SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13, 98 SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14, 99 SVGA3D_DEVCAP_QUERY_TYPES = 15, 100 SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16, 101 SVGA3D_DEVCAP_MAX_POINT_SIZE = 17, 102 SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18, 103 SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19, 104 SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20, 105 SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21, 106 SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22, 107 SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23, 108 SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24, 109 SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25, 110 SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26, 111 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27, 112 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28, 113 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29, 114 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30, 115 SVGA3D_DEVCAP_TEXTURE_OPS = 31, 116 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32, 117 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33, 118 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34, 119 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35, 120 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36, 121 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37, 122 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38, 123 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39, 124 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40, 125 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41, 126 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42, 127 SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43, 128 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44, 129 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45, 130 SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46, 131 SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47, 132 SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48, 133 SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49, 134 SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50, 135 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51, 136 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52, 137 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53, 138 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54, 139 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55, 140 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56, 141 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57, 142 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58, 143 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59, 144 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60, 145 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61, 146 147 /* 148 * There is a hole in our devcap definitions for 149 * historical reasons. 150 * 151 * Define a constant just for completeness. 152 */ 153 SVGA3D_DEVCAP_MISSING62 = 62, 154 155 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63, 156 157 /* 158 * Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color 159 * render targets. This does not include the depth or stencil targets. 160 */ 161 SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64, 162 163 SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65, 164 SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66, 165 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67, 166 SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68, 167 SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69, 168 SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = 70, 169 SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = 71, 170 SVGA3D_DEVCAP_ALPHATOCOVERAGE = 72, 171 SVGA3D_DEVCAP_SUPERSAMPLE = 73, 172 SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74, 173 SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75, 174 SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76, 175 176 /* 177 * This is the maximum number of SVGA context IDs that the guest 178 * can define using SVGA_3D_CMD_CONTEXT_DEFINE. 179 */ 180 SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77, 181 182 /* 183 * This is the maximum number of SVGA surface IDs that the guest 184 * can define using SVGA_3D_CMD_SURFACE_DEFINE*. 185 */ 186 SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78, 187 188 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79, 189 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80, 190 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81, 191 192 SVGA3D_DEVCAP_SURFACEFMT_ATI1 = 82, 193 SVGA3D_DEVCAP_SURFACEFMT_ATI2 = 83, 194 195 /* 196 * Deprecated. 197 */ 198 SVGA3D_DEVCAP_DEAD1 = 84, 199 200 /* 201 * This contains several SVGA_3D_CAPS_VIDEO_DECODE elements 202 * ored together, one for every type of video decoding supported. 203 */ 204 SVGA3D_DEVCAP_VIDEO_DECODE = 85, 205 206 /* 207 * This contains several SVGA_3D_CAPS_VIDEO_PROCESS elements 208 * ored together, one for every type of video processing supported. 209 */ 210 SVGA3D_DEVCAP_VIDEO_PROCESS = 86, 211 212 SVGA3D_DEVCAP_LINE_AA = 87, /* boolean */ 213 SVGA3D_DEVCAP_LINE_STIPPLE = 88, /* boolean */ 214 SVGA3D_DEVCAP_MAX_LINE_WIDTH = 89, /* float */ 215 SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH = 90, /* float */ 216 217 SVGA3D_DEVCAP_SURFACEFMT_YV12 = 91, 218 219 /* 220 * Does the host support the SVGA logic ops commands? 221 */ 222 SVGA3D_DEVCAP_LOGICOPS = 92, 223 224 /* 225 * Are TS_CONSTANT, TS_COLOR_KEY, and TS_COLOR_KEY_ENABLE supported? 226 */ 227 SVGA3D_DEVCAP_TS_COLOR_KEY = 93, /* boolean */ 228 229 /* 230 * Deprecated. 231 */ 232 SVGA3D_DEVCAP_DEAD2 = 94, 233 234 /* 235 * Does the device support DXContexts? 236 */ 237 SVGA3D_DEVCAP_DXCONTEXT = 95, 238 239 /* 240 * What is the maximum size of a texture array? 241 * 242 * (Even if this cap is zero, cubemaps are still allowed.) 243 */ 244 SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE = 96, 245 246 /* 247 * What is the maximum number of vertex buffers or vertex input registers 248 * that can be expected to work correctly with a DXContext? 249 * 250 * The guest is allowed to set up to SVGA3D_DX_MAX_VERTEXBUFFERS, but 251 * anything in excess of this cap is not guaranteed to render correctly. 252 * 253 * Similarly, the guest can set up to SVGA3D_DX_MAX_VERTEXINPUTREGISTERS 254 * input registers without the SVGA3D_DEVCAP_SM4_1 cap, or 255 * SVGA3D_DX_SM41_MAX_VERTEXINPUTREGISTERS with the SVGA3D_DEVCAP_SM4_1, 256 * but only the registers up to this cap value are guaranteed to render 257 * correctly. 258 * 259 * If guest-drivers are able to expose a lower-limit, it's recommended 260 * that they clamp to this value. Otherwise, the host will make a 261 * best-effort on case-by-case basis if guests exceed this. 262 */ 263 SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS = 97, 264 265 /* 266 * What is the maximum number of constant buffers that can be expected to 267 * work correctly with a DX context? 268 * 269 * The guest is allowed to set up to SVGA3D_DX_MAX_CONSTBUFFERS, but 270 * anything in excess of this cap is not guaranteed to render correctly. 271 * 272 * If guest-drivers are able to expose a lower-limit, it's recommended 273 * that they clamp to this value. Otherwise, the host will make a 274 * best-effort on case-by-case basis if guests exceed this. 275 */ 276 SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS = 98, 277 278 /* 279 * Does the device support provoking vertex control? 280 * 281 * If this cap is present, the provokingVertexLast field in the 282 * rasterizer state is enabled. (Guests can then set it to FALSE, 283 * meaning that the first vertex is the provoking vertex, or TRUE, 284 * meaning that the last verteix is the provoking vertex.) 285 * 286 * If this cap is FALSE, then guests should set the provokingVertexLast 287 * to FALSE, otherwise rendering behavior is undefined. 288 */ 289 SVGA3D_DEVCAP_DX_PROVOKING_VERTEX = 99, 290 291 SVGA3D_DEVCAP_DXFMT_X8R8G8B8 = 100, 292 SVGA3D_DEVCAP_DXFMT_A8R8G8B8 = 101, 293 SVGA3D_DEVCAP_DXFMT_R5G6B5 = 102, 294 SVGA3D_DEVCAP_DXFMT_X1R5G5B5 = 103, 295 SVGA3D_DEVCAP_DXFMT_A1R5G5B5 = 104, 296 SVGA3D_DEVCAP_DXFMT_A4R4G4B4 = 105, 297 SVGA3D_DEVCAP_DXFMT_Z_D32 = 106, 298 SVGA3D_DEVCAP_DXFMT_Z_D16 = 107, 299 SVGA3D_DEVCAP_DXFMT_Z_D24S8 = 108, 300 SVGA3D_DEVCAP_DXFMT_Z_D15S1 = 109, 301 SVGA3D_DEVCAP_DXFMT_LUMINANCE8 = 110, 302 SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4 = 111, 303 SVGA3D_DEVCAP_DXFMT_LUMINANCE16 = 112, 304 SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8 = 113, 305 SVGA3D_DEVCAP_DXFMT_DXT1 = 114, 306 SVGA3D_DEVCAP_DXFMT_DXT2 = 115, 307 SVGA3D_DEVCAP_DXFMT_DXT3 = 116, 308 SVGA3D_DEVCAP_DXFMT_DXT4 = 117, 309 SVGA3D_DEVCAP_DXFMT_DXT5 = 118, 310 SVGA3D_DEVCAP_DXFMT_BUMPU8V8 = 119, 311 SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5 = 120, 312 SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8 = 121, 313 SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1 = 122, 314 SVGA3D_DEVCAP_DXFMT_ARGB_S10E5 = 123, 315 SVGA3D_DEVCAP_DXFMT_ARGB_S23E8 = 124, 316 SVGA3D_DEVCAP_DXFMT_A2R10G10B10 = 125, 317 SVGA3D_DEVCAP_DXFMT_V8U8 = 126, 318 SVGA3D_DEVCAP_DXFMT_Q8W8V8U8 = 127, 319 SVGA3D_DEVCAP_DXFMT_CxV8U8 = 128, 320 SVGA3D_DEVCAP_DXFMT_X8L8V8U8 = 129, 321 SVGA3D_DEVCAP_DXFMT_A2W10V10U10 = 130, 322 SVGA3D_DEVCAP_DXFMT_ALPHA8 = 131, 323 SVGA3D_DEVCAP_DXFMT_R_S10E5 = 132, 324 SVGA3D_DEVCAP_DXFMT_R_S23E8 = 133, 325 SVGA3D_DEVCAP_DXFMT_RG_S10E5 = 134, 326 SVGA3D_DEVCAP_DXFMT_RG_S23E8 = 135, 327 SVGA3D_DEVCAP_DXFMT_BUFFER = 136, 328 SVGA3D_DEVCAP_DXFMT_Z_D24X8 = 137, 329 SVGA3D_DEVCAP_DXFMT_V16U16 = 138, 330 SVGA3D_DEVCAP_DXFMT_G16R16 = 139, 331 SVGA3D_DEVCAP_DXFMT_A16B16G16R16 = 140, 332 SVGA3D_DEVCAP_DXFMT_UYVY = 141, 333 SVGA3D_DEVCAP_DXFMT_YUY2 = 142, 334 SVGA3D_DEVCAP_DXFMT_NV12 = 143, 335 SVGA3D_DEVCAP_DXFMT_AYUV = 144, 336 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS = 145, 337 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT = 146, 338 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT = 147, 339 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS = 148, 340 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT = 149, 341 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT = 150, 342 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT = 151, 343 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS = 152, 344 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT = 153, 345 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM = 154, 346 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT = 155, 347 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS = 156, 348 SVGA3D_DEVCAP_DXFMT_R32G32_UINT = 157, 349 SVGA3D_DEVCAP_DXFMT_R32G32_SINT = 158, 350 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS = 159, 351 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT = 160, 352 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24 = 161, 353 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT = 162, 354 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS = 163, 355 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT = 164, 356 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT = 165, 357 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS = 166, 358 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM = 167, 359 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB = 168, 360 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT = 169, 361 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT = 170, 362 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS = 171, 363 SVGA3D_DEVCAP_DXFMT_R16G16_UINT = 172, 364 SVGA3D_DEVCAP_DXFMT_R16G16_SINT = 173, 365 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS = 174, 366 SVGA3D_DEVCAP_DXFMT_D32_FLOAT = 175, 367 SVGA3D_DEVCAP_DXFMT_R32_UINT = 176, 368 SVGA3D_DEVCAP_DXFMT_R32_SINT = 177, 369 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS = 178, 370 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT = 179, 371 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8 = 180, 372 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT = 181, 373 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS = 182, 374 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM = 183, 375 SVGA3D_DEVCAP_DXFMT_R8G8_UINT = 184, 376 SVGA3D_DEVCAP_DXFMT_R8G8_SINT = 185, 377 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS = 186, 378 SVGA3D_DEVCAP_DXFMT_R16_UNORM = 187, 379 SVGA3D_DEVCAP_DXFMT_R16_UINT = 188, 380 SVGA3D_DEVCAP_DXFMT_R16_SNORM = 189, 381 SVGA3D_DEVCAP_DXFMT_R16_SINT = 190, 382 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS = 191, 383 SVGA3D_DEVCAP_DXFMT_R8_UNORM = 192, 384 SVGA3D_DEVCAP_DXFMT_R8_UINT = 193, 385 SVGA3D_DEVCAP_DXFMT_R8_SNORM = 194, 386 SVGA3D_DEVCAP_DXFMT_R8_SINT = 195, 387 SVGA3D_DEVCAP_DXFMT_P8 = 196, 388 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP = 197, 389 SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM = 198, 390 SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM = 199, 391 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS = 200, 392 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB = 201, 393 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS = 202, 394 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB = 203, 395 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS = 204, 396 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB = 205, 397 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS = 206, 398 SVGA3D_DEVCAP_DXFMT_ATI1 = 207, 399 SVGA3D_DEVCAP_DXFMT_BC4_SNORM = 208, 400 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS = 209, 401 SVGA3D_DEVCAP_DXFMT_ATI2 = 210, 402 SVGA3D_DEVCAP_DXFMT_BC5_SNORM = 211, 403 SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM = 212, 404 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS = 213, 405 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB = 214, 406 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS = 215, 407 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB = 216, 408 SVGA3D_DEVCAP_DXFMT_Z_DF16 = 217, 409 SVGA3D_DEVCAP_DXFMT_Z_DF24 = 218, 410 SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT = 219, 411 SVGA3D_DEVCAP_DXFMT_YV12 = 220, 412 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT = 221, 413 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT = 222, 414 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM = 223, 415 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT = 224, 416 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM = 225, 417 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM = 226, 418 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT = 227, 419 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM = 228, 420 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM = 229, 421 SVGA3D_DEVCAP_DXFMT_R32_FLOAT = 230, 422 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM = 231, 423 SVGA3D_DEVCAP_DXFMT_R16_FLOAT = 232, 424 SVGA3D_DEVCAP_DXFMT_D16_UNORM = 233, 425 SVGA3D_DEVCAP_DXFMT_A8_UNORM = 234, 426 SVGA3D_DEVCAP_DXFMT_BC1_UNORM = 235, 427 SVGA3D_DEVCAP_DXFMT_BC2_UNORM = 236, 428 SVGA3D_DEVCAP_DXFMT_BC3_UNORM = 237, 429 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM = 238, 430 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM = 239, 431 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM = 240, 432 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM = 241, 433 SVGA3D_DEVCAP_DXFMT_BC4_UNORM = 242, 434 SVGA3D_DEVCAP_DXFMT_BC5_UNORM = 243, 435 436 /* 437 * Advertises shaderModel 4.1 support, independent blend-states, 438 * cube-map arrays, and a higher vertex input registers limit. 439 * 440 * (See documentation on SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS.) 441 */ 442 SVGA3D_DEVCAP_SM41 = 244, 443 444 SVGA3D_DEVCAP_MULTISAMPLE_2X = 245, 445 SVGA3D_DEVCAP_MULTISAMPLE_4X = 246, 446 447 SVGA3D_DEVCAP_MAX /* This must be the last index. */ 448 } SVGA3dDevCapIndex; 449 450 /* 451 * Bit definitions for DXFMT devcaps 452 * 453 * 454 * SUPPORTED: Can the format be defined? 455 * SHADER_SAMPLE: Can the format be sampled from a shader? 456 * COLOR_RENDERTARGET: Can the format be a color render target? 457 * DEPTH_RENDERTARGET: Can the format be a depth render target? 458 * BLENDABLE: Is the format blendable? 459 * MIPS: Does the format support mip levels? 460 * ARRAY: Does the format support texture arrays? 461 * VOLUME: Does the format support having volume? 462 * MULTISAMPLE: Does the format support multisample? 463 */ 464 #define SVGA3D_DXFMT_SUPPORTED (1 << 0) 465 #define SVGA3D_DXFMT_SHADER_SAMPLE (1 << 1) 466 #define SVGA3D_DXFMT_COLOR_RENDERTARGET (1 << 2) 467 #define SVGA3D_DXFMT_DEPTH_RENDERTARGET (1 << 3) 468 #define SVGA3D_DXFMT_BLENDABLE (1 << 4) 469 #define SVGA3D_DXFMT_MIPS (1 << 5) 470 #define SVGA3D_DXFMT_ARRAY (1 << 6) 471 #define SVGA3D_DXFMT_VOLUME (1 << 7) 472 #define SVGA3D_DXFMT_DX_VERTEX_BUFFER (1 << 8) 473 #define SVGA3D_DXFMT_MULTISAMPLE (1 << 9) 474 #define SVGA3D_DXFMT_MAX (1 << 10) 475 476 typedef union { 477 Bool b; 478 uint32 u; 479 int32 i; 480 float f; 481 } SVGA3dDevCapResult; 482 483 #endif /* _SVGA3D_DEVCAPS_H_ */ 484
Indexes created Tue Sep 23 23:09:58 GMT 2025