1 /* $NetBSD: drm_hdcp.h,v 1.2 2021/12/18 23:45:46 riastradh Exp $ */ 2 3 /* SPDX-License-Identifier: MIT */ 4 /* 5 * Copyright (C) 2017 Google, Inc. 6 * 7 * Authors: 8 * Sean Paul <seanpaul (at) chromium.org> 9 */ 10 11 #ifndef _DRM_HDCP_H_INCLUDED_ 12 #define _DRM_HDCP_H_INCLUDED_ 13 14 #include <linux/types.h> 15 16 /* Period of hdcp checks (to ensure we're still authenticated) */ 17 #define DRM_HDCP_CHECK_PERIOD_MS (128 * 16) 18 #define DRM_HDCP2_CHECK_PERIOD_MS 500 19 20 /* Shared lengths/masks between HDMI/DVI/DisplayPort */ 21 #define DRM_HDCP_AN_LEN 8 22 #define DRM_HDCP_BSTATUS_LEN 2 23 #define DRM_HDCP_KSV_LEN 5 24 #define DRM_HDCP_RI_LEN 2 25 #define DRM_HDCP_V_PRIME_PART_LEN 4 26 #define DRM_HDCP_V_PRIME_NUM_PARTS 5 27 #define DRM_HDCP_NUM_DOWNSTREAM(x) (x & 0x7f) 28 #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3)) 29 #define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7)) 30 31 /* Slave address for the HDCP registers in the receiver */ 32 #define DRM_HDCP_DDC_ADDR 0x3A 33 34 /* HDCP register offsets for HDMI/DVI devices */ 35 #define DRM_HDCP_DDC_BKSV 0x00 36 #define DRM_HDCP_DDC_RI_PRIME 0x08 37 #define DRM_HDCP_DDC_AKSV 0x10 38 #define DRM_HDCP_DDC_AN 0x18 39 #define DRM_HDCP_DDC_V_PRIME(h) (0x20 + h * 4) 40 #define DRM_HDCP_DDC_BCAPS 0x40 41 #define DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT BIT(6) 42 #define DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY BIT(5) 43 #define DRM_HDCP_DDC_BSTATUS 0x41 44 #define DRM_HDCP_DDC_KSV_FIFO 0x43 45 46 #define DRM_HDCP_1_4_SRM_ID 0x8 47 #define DRM_HDCP_1_4_VRL_LENGTH_SIZE 3 48 #define DRM_HDCP_1_4_DCP_SIG_SIZE 40 49 50 /* Protocol message definition for HDCP2.2 specification */ 51 /* 52 * Protected content streams are classified into 2 types: 53 * - Type0: Can be transmitted with HDCP 1.4+ 54 * - Type1: Can be transmitted with HDCP 2.2+ 55 */ 56 #define HDCP_STREAM_TYPE0 0x00 57 #define HDCP_STREAM_TYPE1 0x01 58 59 /* HDCP2.2 Msg IDs */ 60 #define HDCP_2_2_NULL_MSG 1 61 #define HDCP_2_2_AKE_INIT 2 62 #define HDCP_2_2_AKE_SEND_CERT 3 63 #define HDCP_2_2_AKE_NO_STORED_KM 4 64 #define HDCP_2_2_AKE_STORED_KM 5 65 #define HDCP_2_2_AKE_SEND_HPRIME 7 66 #define HDCP_2_2_AKE_SEND_PAIRING_INFO 8 67 #define HDCP_2_2_LC_INIT 9 68 #define HDCP_2_2_LC_SEND_LPRIME 10 69 #define HDCP_2_2_SKE_SEND_EKS 11 70 #define HDCP_2_2_REP_SEND_RECVID_LIST 12 71 #define HDCP_2_2_REP_SEND_ACK 15 72 #define HDCP_2_2_REP_STREAM_MANAGE 16 73 #define HDCP_2_2_REP_STREAM_READY 17 74 75 #define HDCP_2_2_RTX_LEN 8 76 #define HDCP_2_2_RRX_LEN 8 77 78 #define HDCP_2_2_K_PUB_RX_MOD_N_LEN 128 79 #define HDCP_2_2_K_PUB_RX_EXP_E_LEN 3 80 #define HDCP_2_2_K_PUB_RX_LEN (HDCP_2_2_K_PUB_RX_MOD_N_LEN + \ 81 HDCP_2_2_K_PUB_RX_EXP_E_LEN) 82 83 #define HDCP_2_2_DCP_LLC_SIG_LEN 384 84 85 #define HDCP_2_2_E_KPUB_KM_LEN 128 86 #define HDCP_2_2_E_KH_KM_M_LEN (16 + 16) 87 #define HDCP_2_2_H_PRIME_LEN 32 88 #define HDCP_2_2_E_KH_KM_LEN 16 89 #define HDCP_2_2_RN_LEN 8 90 #define HDCP_2_2_L_PRIME_LEN 32 91 #define HDCP_2_2_E_DKEY_KS_LEN 16 92 #define HDCP_2_2_RIV_LEN 8 93 #define HDCP_2_2_SEQ_NUM_LEN 3 94 #define HDCP_2_2_V_PRIME_HALF_LEN (HDCP_2_2_L_PRIME_LEN / 2) 95 #define HDCP_2_2_RECEIVER_ID_LEN DRM_HDCP_KSV_LEN 96 #define HDCP_2_2_MAX_DEVICE_COUNT 31 97 #define HDCP_2_2_RECEIVER_IDS_MAX_LEN (HDCP_2_2_RECEIVER_ID_LEN * \ 98 HDCP_2_2_MAX_DEVICE_COUNT) 99 #define HDCP_2_2_MPRIME_LEN 32 100 101 /* Following Macros take a byte at a time for bit(s) masking */ 102 /* 103 * TODO: This has to be changed for DP MST, as multiple stream on 104 * same port is possible. 105 * For HDCP2.2 on HDMI and DP SST this value is always 1. 106 */ 107 #define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1 108 #define HDCP_2_2_TXCAP_MASK_LEN 2 109 #define HDCP_2_2_RXCAPS_LEN 3 110 #define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0)) 111 #define HDCP_2_2_DP_HDCP_CAPABLE(x) ((x) & BIT(1)) 112 #define HDCP_2_2_RXINFO_LEN 2 113 114 /* HDCP1.x compliant device in downstream */ 115 #define HDCP_2_2_HDCP1_DEVICE_CONNECTED(x) ((x) & BIT(0)) 116 117 /* HDCP2.0 Compliant repeater in downstream */ 118 #define HDCP_2_2_HDCP_2_0_REP_CONNECTED(x) ((x) & BIT(1)) 119 #define HDCP_2_2_MAX_CASCADE_EXCEEDED(x) ((x) & BIT(2)) 120 #define HDCP_2_2_MAX_DEVS_EXCEEDED(x) ((x) & BIT(3)) 121 #define HDCP_2_2_DEV_COUNT_LO(x) (((x) & (0xF << 4)) >> 4) 122 #define HDCP_2_2_DEV_COUNT_HI(x) ((x) & BIT(0)) 123 #define HDCP_2_2_DEPTH(x) (((x) & (0x7 << 1)) >> 1) 124 125 struct hdcp2_cert_rx { 126 u8 receiver_id[HDCP_2_2_RECEIVER_ID_LEN]; 127 u8 kpub_rx[HDCP_2_2_K_PUB_RX_LEN]; 128 u8 reserved[2]; 129 u8 dcp_signature[HDCP_2_2_DCP_LLC_SIG_LEN]; 130 } __packed; 131 132 struct hdcp2_streamid_type { 133 u8 stream_id; 134 u8 stream_type; 135 } __packed; 136 137 /* 138 * The TxCaps field specified in the HDCP HDMI, DP specs 139 * This field is big endian as specified in the errata. 140 */ 141 struct hdcp2_tx_caps { 142 /* Transmitter must set this to 0x2 */ 143 u8 version; 144 145 /* Reserved for HDCP and DP Spec. Read as Zero */ 146 u8 tx_cap_mask[HDCP_2_2_TXCAP_MASK_LEN]; 147 } __packed; 148 149 /* Main structures for HDCP2.2 protocol communication */ 150 struct hdcp2_ake_init { 151 u8 msg_id; 152 u8 r_tx[HDCP_2_2_RTX_LEN]; 153 struct hdcp2_tx_caps tx_caps; 154 } __packed; 155 156 struct hdcp2_ake_send_cert { 157 u8 msg_id; 158 struct hdcp2_cert_rx cert_rx; 159 u8 r_rx[HDCP_2_2_RRX_LEN]; 160 u8 rx_caps[HDCP_2_2_RXCAPS_LEN]; 161 } __packed; 162 163 struct hdcp2_ake_no_stored_km { 164 u8 msg_id; 165 u8 e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN]; 166 } __packed; 167 168 struct hdcp2_ake_stored_km { 169 u8 msg_id; 170 u8 e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN]; 171 } __packed; 172 173 struct hdcp2_ake_send_hprime { 174 u8 msg_id; 175 u8 h_prime[HDCP_2_2_H_PRIME_LEN]; 176 } __packed; 177 178 struct hdcp2_ake_send_pairing_info { 179 u8 msg_id; 180 u8 e_kh_km[HDCP_2_2_E_KH_KM_LEN]; 181 } __packed; 182 183 struct hdcp2_lc_init { 184 u8 msg_id; 185 u8 r_n[HDCP_2_2_RN_LEN]; 186 } __packed; 187 188 struct hdcp2_lc_send_lprime { 189 u8 msg_id; 190 u8 l_prime[HDCP_2_2_L_PRIME_LEN]; 191 } __packed; 192 193 struct hdcp2_ske_send_eks { 194 u8 msg_id; 195 u8 e_dkey_ks[HDCP_2_2_E_DKEY_KS_LEN]; 196 u8 riv[HDCP_2_2_RIV_LEN]; 197 } __packed; 198 199 struct hdcp2_rep_send_receiverid_list { 200 u8 msg_id; 201 u8 rx_info[HDCP_2_2_RXINFO_LEN]; 202 u8 seq_num_v[HDCP_2_2_SEQ_NUM_LEN]; 203 u8 v_prime[HDCP_2_2_V_PRIME_HALF_LEN]; 204 u8 receiver_ids[HDCP_2_2_RECEIVER_IDS_MAX_LEN]; 205 } __packed; 206 207 struct hdcp2_rep_send_ack { 208 u8 msg_id; 209 u8 v[HDCP_2_2_V_PRIME_HALF_LEN]; 210 } __packed; 211 212 struct hdcp2_rep_stream_manage { 213 u8 msg_id; 214 u8 seq_num_m[HDCP_2_2_SEQ_NUM_LEN]; 215 __be16 k; 216 struct hdcp2_streamid_type streams[HDCP_2_2_MAX_CONTENT_STREAMS_CNT]; 217 } __packed; 218 219 struct hdcp2_rep_stream_ready { 220 u8 msg_id; 221 u8 m_prime[HDCP_2_2_MPRIME_LEN]; 222 } __packed; 223 224 /* HDCP2.2 TIMEOUTs in mSec */ 225 #define HDCP_2_2_CERT_TIMEOUT_MS 100 226 #define HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS 1000 227 #define HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS 200 228 #define HDCP_2_2_PAIRING_TIMEOUT_MS 200 229 #define HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS 20 230 #define HDCP_2_2_DP_LPRIME_TIMEOUT_MS 7 231 #define HDCP_2_2_RECVID_LIST_TIMEOUT_MS 3000 232 #define HDCP_2_2_STREAM_READY_TIMEOUT_MS 100 233 234 /* HDMI HDCP2.2 Register Offsets */ 235 #define HDCP_2_2_HDMI_REG_VER_OFFSET 0x50 236 #define HDCP_2_2_HDMI_REG_WR_MSG_OFFSET 0x60 237 #define HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET 0x70 238 #define HDCP_2_2_HDMI_REG_RD_MSG_OFFSET 0x80 239 #define HDCP_2_2_HDMI_REG_DBG_OFFSET 0xC0 240 241 #define HDCP_2_2_HDMI_SUPPORT_MASK BIT(2) 242 #define HDCP_2_2_RX_CAPS_VERSION_VAL 0x02 243 #define HDCP_2_2_SEQ_NUM_MAX 0xFFFFFF 244 #define HDCP_2_2_DELAY_BEFORE_ENCRYPTION_EN 200 245 246 /* Below macros take a byte at a time and mask the bit(s) */ 247 #define HDCP_2_2_HDMI_RXSTATUS_LEN 2 248 #define HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(x) ((x) & 0x3) 249 #define HDCP_2_2_HDMI_RXSTATUS_READY(x) ((x) & BIT(2)) 250 #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3)) 251 252 /* 253 * Helper functions to convert 24bit big endian hdcp sequence number to 254 * host format and back 255 */ 256 static inline 257 u32 drm_hdcp_be24_to_cpu(const u8 seq_num[HDCP_2_2_SEQ_NUM_LEN]) 258 { 259 return (u32)(seq_num[2] | seq_num[1] << 8 | seq_num[0] << 16); 260 } 261 262 static inline 263 void drm_hdcp_cpu_to_be24(u8 seq_num[HDCP_2_2_SEQ_NUM_LEN], u32 val) 264 { 265 seq_num[0] = val >> 16; 266 seq_num[1] = val >> 8; 267 seq_num[2] = val; 268 } 269 270 #define DRM_HDCP_SRM_GEN1_MAX_BYTES (5 * 1024) 271 #define DRM_HDCP_1_4_SRM_ID 0x8 272 #define DRM_HDCP_SRM_ID_MASK (0xF << 4) 273 #define DRM_HDCP_1_4_VRL_LENGTH_SIZE 3 274 #define DRM_HDCP_1_4_DCP_SIG_SIZE 40 275 #define DRM_HDCP_2_SRM_ID 0x9 276 #define DRM_HDCP_2_INDICATOR 0x1 277 #define DRM_HDCP_2_INDICATOR_MASK 0xF 278 #define DRM_HDCP_2_VRL_LENGTH_SIZE 3 279 #define DRM_HDCP_2_DCP_SIG_SIZE 384 280 #define DRM_HDCP_2_NO_OF_DEV_PLUS_RESERVED_SZ 4 281 #define DRM_HDCP_2_KSV_COUNT_2_LSBITS(byte) (((byte) & 0xC) >> 6) 282 283 struct hdcp_srm_header { 284 u8 srm_id; 285 u8 reserved; 286 __be16 srm_version; 287 u8 srm_gen_no; 288 } __packed; 289 290 struct drm_device; 291 struct drm_connector; 292 293 bool drm_hdcp_check_ksvs_revoked(struct drm_device *dev, 294 u8 *ksvs, u32 ksv_count); 295 int drm_connector_attach_content_protection_property( 296 struct drm_connector *connector, bool hdcp_content_type); 297 void drm_hdcp_update_content_protection(struct drm_connector *connector, 298 u64 val); 299 300 /* Content Type classification for HDCP2.2 vs others */ 301 #define DRM_MODE_HDCP_CONTENT_TYPE0 0 302 #define DRM_MODE_HDCP_CONTENT_TYPE1 1 303 304 #endif 305
Indexes created Sat Sep 20 22:09:52 GMT 2025