1 /* $NetBSD: i810_drm.h,v 1.2 2021/12/18 23:45:46 riastradh Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 #ifndef _I810_DRM_H_ 5 #define _I810_DRM_H_ 6 7 #include "drm.h" 8 9 #if defined(__cplusplus) 10 extern "C" { 11 #endif 12 13 /* WARNING: These defines must be the same as what the Xserver uses. 14 * if you change them, you must change the defines in the Xserver. 15 */ 16 17 #ifndef _I810_DEFINES_ 18 #define _I810_DEFINES_ 19 20 #define I810_DMA_BUF_ORDER 12 21 #define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) 22 #define I810_DMA_BUF_NR 256 23 #define I810_NR_SAREA_CLIPRECTS 8 24 25 /* Each region is a minimum of 64k, and there are at most 64 of them. 26 */ 27 #define I810_NR_TEX_REGIONS 64 28 #define I810_LOG_MIN_TEX_REGION_SIZE 16 29 #endif 30 31 #define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ 32 #define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ 33 #define I810_UPLOAD_CTX 0x4 34 #define I810_UPLOAD_BUFFERS 0x8 35 #define I810_UPLOAD_TEX0 0x10 36 #define I810_UPLOAD_TEX1 0x20 37 #define I810_UPLOAD_CLIPRECTS 0x40 38 39 /* Indices into buf.Setup where various bits of state are mirrored per 40 * context and per buffer. These can be fired at the card as a unit, 41 * or in a piecewise fashion as required. 42 */ 43 44 /* Destbuffer state 45 * - backbuffer linear offset and pitch -- invarient in the current dri 46 * - zbuffer linear offset and pitch -- also invarient 47 * - drawing origin in back and depth buffers. 48 * 49 * Keep the depth/back buffer state here to accommodate private buffers 50 * in the future. 51 */ 52 #define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ 53 #define I810_DESTREG_DI1 1 54 #define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ 55 #define I810_DESTREG_DV1 3 56 #define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ 57 #define I810_DESTREG_DR1 5 58 #define I810_DESTREG_DR2 6 59 #define I810_DESTREG_DR3 7 60 #define I810_DESTREG_DR4 8 61 #define I810_DEST_SETUP_SIZE 10 62 63 /* Context state 64 */ 65 #define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */ 66 #define I810_CTXREG_CF1 1 67 #define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */ 68 #define I810_CTXREG_ST1 3 69 #define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */ 70 #define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */ 71 #define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ 72 #define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ 73 #define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ 74 #define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ 75 #define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ 76 #define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ 77 #define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ 78 #define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ 79 #define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ 80 #define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ 81 #define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ 82 #define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ 83 #define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ 84 #define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ 85 #define I810_CTX_SETUP_SIZE 20 86 87 /* Texture state (per tex unit) 88 */ 89 #define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ 90 #define I810_TEXREG_MI1 1 91 #define I810_TEXREG_MI2 2 92 #define I810_TEXREG_MI3 3 93 #define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ 94 #define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ 95 #define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ 96 #define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ 97 #define I810_TEX_SETUP_SIZE 8 98 99 /* Flags for clear ioctl 100 */ 101 #define I810_FRONT 0x1 102 #define I810_BACK 0x2 103 #define I810_DEPTH 0x4 104 105 typedef enum _drm_i810_init_func { 106 I810_INIT_DMA = 0x01, 107 I810_CLEANUP_DMA = 0x02, 108 I810_INIT_DMA_1_4 = 0x03 109 } drm_i810_init_func_t; 110 111 /* This is the init structure after v1.2 */ 112 typedef struct _drm_i810_init { 113 drm_i810_init_func_t func; 114 unsigned int mmio_offset; 115 unsigned int buffers_offset; 116 int sarea_priv_offset; 117 unsigned int ring_start; 118 unsigned int ring_end; 119 unsigned int ring_size; 120 unsigned int front_offset; 121 unsigned int back_offset; 122 unsigned int depth_offset; 123 unsigned int overlay_offset; 124 unsigned int overlay_physical; 125 unsigned int w; 126 unsigned int h; 127 unsigned int pitch; 128 unsigned int pitch_bits; 129 } drm_i810_init_t; 130 131 /* This is the init structure prior to v1.2 */ 132 typedef struct _drm_i810_pre12_init { 133 drm_i810_init_func_t func; 134 unsigned int mmio_offset; 135 unsigned int buffers_offset; 136 int sarea_priv_offset; 137 unsigned int ring_start; 138 unsigned int ring_end; 139 unsigned int ring_size; 140 unsigned int front_offset; 141 unsigned int back_offset; 142 unsigned int depth_offset; 143 unsigned int w; 144 unsigned int h; 145 unsigned int pitch; 146 unsigned int pitch_bits; 147 } drm_i810_pre12_init_t; 148 149 /* Warning: If you change the SAREA structure you must change the Xserver 150 * structure as well */ 151 152 typedef struct _drm_i810_tex_region { 153 unsigned char next, prev; /* indices to form a circular LRU */ 154 unsigned char in_use; /* owned by a client, or free? */ 155 int age; /* tracked by clients to update local LRU's */ 156 } drm_i810_tex_region_t; 157 158 typedef struct _drm_i810_sarea { 159 unsigned int ContextState[I810_CTX_SETUP_SIZE]; 160 unsigned int BufferState[I810_DEST_SETUP_SIZE]; 161 unsigned int TexState[2][I810_TEX_SETUP_SIZE]; 162 unsigned int dirty; 163 164 unsigned int nbox; 165 struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS]; 166 167 /* Maintain an LRU of contiguous regions of texture space. If 168 * you think you own a region of texture memory, and it has an 169 * age different to the one you set, then you are mistaken and 170 * it has been stolen by another client. If global texAge 171 * hasn't changed, there is no need to walk the list. 172 * 173 * These regions can be used as a proxy for the fine-grained 174 * texture information of other clients - by maintaining them 175 * in the same lru which is used to age their own textures, 176 * clients have an approximate lru for the whole of global 177 * texture space, and can make informed decisions as to which 178 * areas to kick out. There is no need to choose whether to 179 * kick out your own texture or someone else's - simply eject 180 * them all in LRU order. 181 */ 182 183 drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1]; 184 /* Last elt is sentinal */ 185 int texAge; /* last time texture was uploaded */ 186 int last_enqueue; /* last time a buffer was enqueued */ 187 int last_dispatch; /* age of the most recently dispatched buffer */ 188 int last_quiescent; /* */ 189 int ctxOwner; /* last context to upload state */ 190 191 int vertex_prim; 192 193 int pf_enabled; /* is pageflipping allowed? */ 194 int pf_active; 195 int pf_current_page; /* which buffer is being displayed? */ 196 } drm_i810_sarea_t; 197 198 /* WARNING: If you change any of these defines, make sure to change the 199 * defines in the Xserver file (xf86drmMga.h) 200 */ 201 202 /* i810 specific ioctls 203 * The device specific ioctl range is 0x40 to 0x79. 204 */ 205 #define DRM_I810_INIT 0x00 206 #define DRM_I810_VERTEX 0x01 207 #define DRM_I810_CLEAR 0x02 208 #define DRM_I810_FLUSH 0x03 209 #define DRM_I810_GETAGE 0x04 210 #define DRM_I810_GETBUF 0x05 211 #define DRM_I810_SWAP 0x06 212 #define DRM_I810_COPY 0x07 213 #define DRM_I810_DOCOPY 0x08 214 #define DRM_I810_OV0INFO 0x09 215 #define DRM_I810_FSTATUS 0x0a 216 #define DRM_I810_OV0FLIP 0x0b 217 #define DRM_I810_MC 0x0c 218 #define DRM_I810_RSTATUS 0x0d 219 #define DRM_I810_FLIP 0x0e 220 221 #define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t) 222 #define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t) 223 #define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t) 224 #define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH) 225 #define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE) 226 #define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t) 227 #define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP) 228 #define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t) 229 #define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY) 230 #define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t) 231 #define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS) 232 #define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP) 233 #define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t) 234 #define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS) 235 #define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP) 236 237 typedef struct _drm_i810_clear { 238 int clear_color; 239 int clear_depth; 240 int flags; 241 } drm_i810_clear_t; 242 243 /* These may be placeholders if we have more cliprects than 244 * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to 245 * false, indicating that the buffer will be dispatched again with a 246 * new set of cliprects. 247 */ 248 typedef struct _drm_i810_vertex { 249 int idx; /* buffer index */ 250 int used; /* nr bytes in use */ 251 int discard; /* client is finished with the buffer? */ 252 } drm_i810_vertex_t; 253 254 typedef struct _drm_i810_copy_t { 255 int idx; /* buffer index */ 256 int used; /* nr bytes in use */ 257 void *address; /* Address to copy from */ 258 } drm_i810_copy_t; 259 260 #define PR_TRIANGLES (0x0<<18) 261 #define PR_TRISTRIP_0 (0x1<<18) 262 #define PR_TRISTRIP_1 (0x2<<18) 263 #define PR_TRIFAN (0x3<<18) 264 #define PR_POLYGON (0x4<<18) 265 #define PR_LINES (0x5<<18) 266 #define PR_LINESTRIP (0x6<<18) 267 #define PR_RECTS (0x7<<18) 268 #define PR_MASK (0x7<<18) 269 270 typedef struct drm_i810_dma { 271 void *virtual; 272 int request_idx; 273 int request_size; 274 int granted; 275 } drm_i810_dma_t; 276 277 typedef struct _drm_i810_overlay_t { 278 unsigned int offset; /* Address of the Overlay Regs */ 279 unsigned int physical; 280 } drm_i810_overlay_t; 281 282 typedef struct _drm_i810_mc { 283 int idx; /* buffer index */ 284 int used; /* nr bytes in use */ 285 int num_blocks; /* number of GFXBlocks */ 286 int *length; /* List of lengths for GFXBlocks (FUTURE) */ 287 unsigned int last_render; /* Last Render Request */ 288 } drm_i810_mc_t; 289 290 #if defined(__cplusplus) 291 } 292 #endif 293 294 #endif /* _I810_DRM_H_ */ 295
Indexes created Sat Sep 20 22:09:52 GMT 2025