1 /* $NetBSD: via_drm.h,v 1.2 2021/12/18 23:45:46 riastradh Exp $ */ 2 3 /* 4 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. 5 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sub license, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 * DEALINGS IN THE SOFTWARE. 25 */ 26 #ifndef _VIA_DRM_H_ 27 #define _VIA_DRM_H_ 28 29 #include "drm.h" 30 31 #if defined(__cplusplus) 32 extern "C" { 33 #endif 34 35 /* WARNING: These defines must be the same as what the Xserver uses. 36 * if you change them, you must change the defines in the Xserver. 37 */ 38 39 #ifndef _VIA_DEFINES_ 40 #define _VIA_DEFINES_ 41 42 43 #define VIA_NR_SAREA_CLIPRECTS 8 44 #define VIA_NR_XVMC_PORTS 10 45 #define VIA_NR_XVMC_LOCKS 5 46 #define VIA_MAX_CACHELINE_SIZE 64 47 #define XVMCLOCKPTR(saPriv,lockNo) \ 48 ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ 49 (VIA_MAX_CACHELINE_SIZE - 1)) & \ 50 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ 51 VIA_MAX_CACHELINE_SIZE*(lockNo))) 52 53 /* Each region is a minimum of 64k, and there are at most 64 of them. 54 */ 55 #define VIA_NR_TEX_REGIONS 64 56 #define VIA_LOG_MIN_TEX_REGION_SIZE 16 57 #endif 58 59 #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ 60 #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ 61 #define VIA_UPLOAD_CTX 0x4 62 #define VIA_UPLOAD_BUFFERS 0x8 63 #define VIA_UPLOAD_TEX0 0x10 64 #define VIA_UPLOAD_TEX1 0x20 65 #define VIA_UPLOAD_CLIPRECTS 0x40 66 #define VIA_UPLOAD_ALL 0xff 67 68 /* VIA specific ioctls */ 69 #define DRM_VIA_ALLOCMEM 0x00 70 #define DRM_VIA_FREEMEM 0x01 71 #define DRM_VIA_AGP_INIT 0x02 72 #define DRM_VIA_FB_INIT 0x03 73 #define DRM_VIA_MAP_INIT 0x04 74 #define DRM_VIA_DEC_FUTEX 0x05 75 #define NOT_USED 76 #define DRM_VIA_DMA_INIT 0x07 77 #define DRM_VIA_CMDBUFFER 0x08 78 #define DRM_VIA_FLUSH 0x09 79 #define DRM_VIA_PCICMD 0x0a 80 #define DRM_VIA_CMDBUF_SIZE 0x0b 81 #define NOT_USED 82 #define DRM_VIA_WAIT_IRQ 0x0d 83 #define DRM_VIA_DMA_BLIT 0x0e 84 #define DRM_VIA_BLIT_SYNC 0x0f 85 86 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) 87 #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) 88 #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) 89 #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) 90 #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) 91 #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) 92 #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) 93 #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) 94 #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) 95 #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) 96 #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ 97 drm_via_cmdbuf_size_t) 98 #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) 99 #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) 100 #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) 101 102 /* Indices into buf.Setup where various bits of state are mirrored per 103 * context and per buffer. These can be fired at the card as a unit, 104 * or in a piecewise fashion as required. 105 */ 106 107 #define VIA_TEX_SETUP_SIZE 8 108 109 /* Flags for clear ioctl 110 */ 111 #define VIA_FRONT 0x1 112 #define VIA_BACK 0x2 113 #define VIA_DEPTH 0x4 114 #define VIA_STENCIL 0x8 115 #define VIA_MEM_VIDEO 0 /* matches drm constant */ 116 #define VIA_MEM_AGP 1 /* matches drm constant */ 117 #define VIA_MEM_SYSTEM 2 118 #define VIA_MEM_MIXED 3 119 #define VIA_MEM_UNKNOWN 4 120 121 typedef struct { 122 __u32 offset; 123 __u32 size; 124 } drm_via_agp_t; 125 126 typedef struct { 127 __u32 offset; 128 __u32 size; 129 } drm_via_fb_t; 130 131 typedef struct { 132 __u32 context; 133 __u32 type; 134 __u32 size; 135 unsigned long index; 136 unsigned long offset; 137 } drm_via_mem_t; 138 139 typedef struct _drm_via_init { 140 enum { 141 VIA_INIT_MAP = 0x01, 142 VIA_CLEANUP_MAP = 0x02 143 } func; 144 145 unsigned long sarea_priv_offset; 146 unsigned long fb_offset; 147 unsigned long mmio_offset; 148 unsigned long agpAddr; 149 } drm_via_init_t; 150 151 typedef struct _drm_via_futex { 152 enum { 153 VIA_FUTEX_WAIT = 0x00, 154 VIA_FUTEX_WAKE = 0X01 155 } func; 156 __u32 ms; 157 __u32 lock; 158 __u32 val; 159 } drm_via_futex_t; 160 161 typedef struct _drm_via_dma_init { 162 enum { 163 VIA_INIT_DMA = 0x01, 164 VIA_CLEANUP_DMA = 0x02, 165 VIA_DMA_INITIALIZED = 0x03 166 } func; 167 168 unsigned long offset; 169 unsigned long size; 170 unsigned long reg_pause_addr; 171 } drm_via_dma_init_t; 172 173 typedef struct _drm_via_cmdbuffer { 174 char __user *buf; 175 unsigned long size; 176 } drm_via_cmdbuffer_t; 177 178 /* Warning: If you change the SAREA structure you must change the Xserver 179 * structure as well */ 180 181 typedef struct _drm_via_tex_region { 182 unsigned char next, prev; /* indices to form a circular LRU */ 183 unsigned char inUse; /* owned by a client, or free? */ 184 int age; /* tracked by clients to update local LRU's */ 185 } drm_via_tex_region_t; 186 187 typedef struct _drm_via_sarea { 188 unsigned int dirty; 189 unsigned int nbox; 190 struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS]; 191 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; 192 int texAge; /* last time texture was uploaded */ 193 int ctxOwner; /* last context to upload state */ 194 int vertexPrim; 195 196 /* 197 * Below is for XvMC. 198 * We want the lock integers alone on, and aligned to, a cache line. 199 * Therefore this somewhat strange construct. 200 */ 201 202 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; 203 204 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; 205 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; 206 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */ 207 208 /* Used by the 3d driver only at this point, for pageflipping: 209 */ 210 unsigned int pfCurrentOffset; 211 } drm_via_sarea_t; 212 213 typedef struct _drm_via_cmdbuf_size { 214 enum { 215 VIA_CMDBUF_SPACE = 0x01, 216 VIA_CMDBUF_LAG = 0x02 217 } func; 218 int wait; 219 __u32 size; 220 } drm_via_cmdbuf_size_t; 221 222 typedef enum { 223 VIA_IRQ_ABSOLUTE = 0x0, 224 VIA_IRQ_RELATIVE = 0x1, 225 VIA_IRQ_SIGNAL = 0x10000000, 226 VIA_IRQ_FORCE_SEQUENCE = 0x20000000 227 } via_irq_seq_type_t; 228 229 #define VIA_IRQ_FLAGS_MASK 0xF0000000 230 231 enum drm_via_irqs { 232 drm_via_irq_hqv0 = 0, 233 drm_via_irq_hqv1, 234 drm_via_irq_dma0_dd, 235 drm_via_irq_dma0_td, 236 drm_via_irq_dma1_dd, 237 drm_via_irq_dma1_td, 238 drm_via_irq_num 239 }; 240 241 struct drm_via_wait_irq_request { 242 unsigned irq; 243 via_irq_seq_type_t type; 244 __u32 sequence; 245 __u32 signal; 246 }; 247 248 typedef union drm_via_irqwait { 249 struct drm_via_wait_irq_request request; 250 struct drm_wait_vblank_reply reply; 251 } drm_via_irqwait_t; 252 253 typedef struct drm_via_blitsync { 254 __u32 sync_handle; 255 unsigned engine; 256 } drm_via_blitsync_t; 257 258 /* - * Below,"flags" is currently unused but will be used for possible future 259 * extensions like kernel space bounce buffers for bad alignments and 260 * blit engine busy-wait polling for better latency in the absence of 261 * interrupts. 262 */ 263 264 typedef struct drm_via_dmablit { 265 __u32 num_lines; 266 __u32 line_length; 267 268 __u32 fb_addr; 269 __u32 fb_stride; 270 271 unsigned char *mem_addr; 272 __u32 mem_stride; 273 274 __u32 flags; 275 int to_fb; 276 277 drm_via_blitsync_t sync; 278 } drm_via_dmablit_t; 279 280 #if defined(__cplusplus) 281 } 282 #endif 283 284 #endif /* _VIA_DRM_H_ */ 285
Indexes created Fri Sep 26 20:09:58 GMT 2025