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      1 /*	$NetBSD: eficontext.h,v 1.1.1.1 2014/04/01 16:16:07 jakllsch Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1999, 2000
      5  * Intel Corporation.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  *
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  *
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *
     22  *    This product includes software developed by Intel Corporation and
     23  *    its contributors.
     24  *
     25  * 4. Neither the name of Intel Corporation or its contributors may be
     26  *    used to endorse or promote products derived from this software
     27  *    without specific prior written permission.
     28  *
     29  * THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
     30  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     31  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     32  * ARE DISCLAIMED.  IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
     33  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     34  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     35  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     36  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     37  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     38  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     39  * THE POSSIBILITY OF SUCH DAMAGE.
     40  *
     41  */
     42 
     43 
     44 #ifndef _EFICONTEXT_H_
     45 #define _EFICONTEXT_H_
     46 
     47 
     48 //
     49 //  IA-64 processor exception types
     50 //
     51 #define    EXCPT_ALT_DTLB            4
     52 #define    EXCPT_DNESTED_TLB         5
     53 #define    EXCPT_BREAKPOINT         11
     54 #define    EXCPT_EXTERNAL_INTERRUPT	12
     55 #define    EXCPT_GEN_EXCEPT         24
     56 #define    EXCPT_NAT_CONSUMPTION    26
     57 #define    EXCPT_DEBUG_EXCEPT       29
     58 #define    EXCPT_UNALIGNED_ACCESS   30
     59 #define    EXCPT_FP_FAULT           32
     60 #define    EXCPT_FP_TRAP            33
     61 #define    EXCPT_TAKEN_BRANCH       35
     62 #define    EXCPT_SINGLE_STEP        36
     63 
     64 //
     65 //  IA-64 processor context definition - must be 512 byte aligned!!!
     66 //
     67 typedef
     68 struct {
     69 	UINT64 reserved;	// necessary to preserve alignment for the correct bits in UNAT and to insure F2 is 16 byte aligned...
     70 
     71     UINT64 r1;
     72     UINT64 r2;
     73     UINT64 r3;
     74     UINT64 r4;
     75     UINT64 r5;
     76     UINT64 r6;
     77     UINT64 r7;
     78     UINT64 r8;
     79     UINT64 r9;
     80     UINT64 r10;
     81     UINT64 r11;
     82     UINT64 r12;
     83     UINT64 r13;
     84     UINT64 r14;
     85     UINT64 r15;
     86     UINT64 r16;
     87     UINT64 r17;
     88     UINT64 r18;
     89     UINT64 r19;
     90     UINT64 r20;
     91     UINT64 r21;
     92     UINT64 r22;
     93     UINT64 r23;
     94     UINT64 r24;
     95     UINT64 r25;
     96     UINT64 r26;
     97     UINT64 r27;
     98     UINT64 r28;
     99     UINT64 r29;
    100     UINT64 r30;
    101     UINT64 r31;
    102 
    103     UINT64 f2[2];
    104     UINT64 f3[2];
    105     UINT64 f4[2];
    106     UINT64 f5[2];
    107     UINT64 f6[2];
    108     UINT64 f7[2];
    109     UINT64 f8[2];
    110     UINT64 f9[2];
    111     UINT64 f10[2];
    112     UINT64 f11[2];
    113     UINT64 f12[2];
    114     UINT64 f13[2];
    115     UINT64 f14[2];
    116     UINT64 f15[2];
    117     UINT64 f16[2];
    118     UINT64 f17[2];
    119     UINT64 f18[2];
    120     UINT64 f19[2];
    121     UINT64 f20[2];
    122     UINT64 f21[2];
    123     UINT64 f22[2];
    124     UINT64 f23[2];
    125     UINT64 f24[2];
    126     UINT64 f25[2];
    127     UINT64 f26[2];
    128     UINT64 f27[2];
    129     UINT64 f28[2];
    130     UINT64 f29[2];
    131     UINT64 f30[2];
    132     UINT64 f31[2];
    133 
    134     UINT64 pr;
    135 
    136     UINT64 b0;
    137     UINT64 b1;
    138     UINT64 b2;
    139     UINT64 b3;
    140     UINT64 b4;
    141     UINT64 b5;
    142     UINT64 b6;
    143     UINT64 b7;
    144 
    145     // application registers
    146     UINT64 ar_rsc;
    147     UINT64 ar_bsp;
    148     UINT64 ar_bspstore;
    149     UINT64 ar_rnat;
    150 
    151     UINT64 ar_fcr;
    152 
    153     UINT64 ar_eflag;
    154     UINT64 ar_csd;
    155     UINT64 ar_ssd;
    156     UINT64 ar_cflg;
    157     UINT64 ar_fsr;
    158     UINT64 ar_fir;
    159     UINT64 ar_fdr;
    160 
    161     UINT64 ar_ccv;
    162 
    163     UINT64 ar_unat;
    164 
    165     UINT64 ar_fpsr;
    166 
    167     UINT64 ar_pfs;
    168     UINT64 ar_lc;
    169     UINT64 ar_ec;
    170 
    171     // control registers
    172     UINT64 cr_dcr;
    173     UINT64 cr_itm;
    174     UINT64 cr_iva;
    175     UINT64 cr_pta;
    176     UINT64 cr_ipsr;
    177     UINT64 cr_isr;
    178     UINT64 cr_iip;
    179     UINT64 cr_ifa;
    180     UINT64 cr_itir;
    181     UINT64 cr_iipa;
    182     UINT64 cr_ifs;
    183     UINT64 cr_iim;
    184     UINT64 cr_iha;
    185 
    186     // debug registers
    187     UINT64 dbr0;
    188     UINT64 dbr1;
    189     UINT64 dbr2;
    190     UINT64 dbr3;
    191     UINT64 dbr4;
    192     UINT64 dbr5;
    193     UINT64 dbr6;
    194     UINT64 dbr7;
    195 
    196     UINT64 ibr0;
    197     UINT64 ibr1;
    198     UINT64 ibr2;
    199     UINT64 ibr3;
    200     UINT64 ibr4;
    201     UINT64 ibr5;
    202     UINT64 ibr6;
    203     UINT64 ibr7;
    204 
    205     // virtual registers
    206     UINT64 int_nat;	// nat bits for R1-R31
    207 
    208 } SYSTEM_CONTEXT;
    209 
    210 #endif /* _EFI_CONTEXT_H_ */
    211