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      1 // SPDX-License-Identifier: GPL-2.0
      2 #include <dt-bindings/input/input.h>
      3 #include <dt-bindings/thermal/thermal.h>
      4 #include "tegra30.dtsi"
      5 #include "tegra30-cpu-opp.dtsi"
      6 #include "tegra30-cpu-opp-microvolt.dtsi"
      7 
      8 /**
      9  * This file contains common DT entry for all fab version of Cardhu.
     10  * There is multiple fab version of Cardhu starting from A01 to A07.
     11  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
     12  * A02 will have different sets of GPIOs for fixed regulator compare to
     13  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
     14  * compatible with fab version A04. Based on Cardhu fab version, the
     15  * related dts file need to be chosen like for Cardhu fab version A02,
     16  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
     17  * tegra30-cardhu-a04.dts.
     18  * The identification of board is done in two ways, by looking the sticker
     19  * on PCB and by reading board id eeprom.
     20  * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
     21  * number is the fab version like here it is 002 and hence fab version A02.
     22  * The (downstream internal) U-Boot of Cardhu display the board-id as
     23  * follows:
     24  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
     25  * In this Fab version is 02 i.e. A02.
     26  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
     27  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
     28  * wide.
     29  */
     30 
     31 / {
     32 	model = "NVIDIA Tegra30 Cardhu evaluation board";
     33 	compatible = "nvidia,cardhu", "nvidia,tegra30";
     34 
     35 	aliases {
     36 		rtc0 = "/i2c@7000d000/tps65911@2d";
     37 		rtc1 = "/rtc@7000e000";
     38 		serial0 = &uarta;
     39 		serial1 = &uartc;
     40 	};
     41 
     42 	chosen {
     43 		stdout-path = "serial0:115200n8";
     44 	};
     45 
     46 	memory@80000000 {
     47 		reg = <0x80000000 0x40000000>;
     48 	};
     49 
     50 	pcie@3000 {
     51 		status = "okay";
     52 
     53 		/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
     54 		avdd-pexb-supply = <&ldo1_reg>;
     55 		vdd-pexb-supply = <&ldo1_reg>;
     56 		avdd-pex-pll-supply = <&ldo1_reg>;
     57 		hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
     58 		vddio-pex-ctl-supply = <&sys_3v3_reg>;
     59 		avdd-plle-supply = <&ldo2_reg>;
     60 
     61 		pci@1,0 {
     62 			nvidia,num-lanes = <4>;
     63 		};
     64 
     65 		pci@2,0 {
     66 			nvidia,num-lanes = <1>;
     67 		};
     68 
     69 		pci@3,0 {
     70 			status = "okay";
     71 			nvidia,num-lanes = <1>;
     72 		};
     73 	};
     74 
     75 	host1x@50000000 {
     76 		dc@54200000 {
     77 			rgb {
     78 				status = "okay";
     79 
     80 				nvidia,panel = <&panel>;
     81 			};
     82 		};
     83 	};
     84 
     85 	pinmux@70000868 {
     86 		pinctrl-names = "default";
     87 		pinctrl-0 = <&state_default>;
     88 
     89 		state_default: pinmux {
     90 			sdmmc1_clk_pz0 {
     91 				nvidia,pins = "sdmmc1_clk_pz0";
     92 				nvidia,function = "sdmmc1";
     93 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
     94 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     95 			};
     96 			sdmmc1_cmd_pz1 {
     97 				nvidia,pins =	"sdmmc1_cmd_pz1",
     98 						"sdmmc1_dat0_py7",
     99 						"sdmmc1_dat1_py6",
    100 						"sdmmc1_dat2_py5",
    101 						"sdmmc1_dat3_py4";
    102 				nvidia,function = "sdmmc1";
    103 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    104 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    105 			};
    106 			sdmmc3_clk_pa6 {
    107 				nvidia,pins = "sdmmc3_clk_pa6";
    108 				nvidia,function = "sdmmc3";
    109 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    110 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    111 			};
    112 			sdmmc3_cmd_pa7 {
    113 				nvidia,pins =	"sdmmc3_cmd_pa7",
    114 						"sdmmc3_dat0_pb7",
    115 						"sdmmc3_dat1_pb6",
    116 						"sdmmc3_dat2_pb5",
    117 						"sdmmc3_dat3_pb4";
    118 				nvidia,function = "sdmmc3";
    119 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    120 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    121 			};
    122 			sdmmc4_clk_pcc4 {
    123 				nvidia,pins =	"sdmmc4_clk_pcc4",
    124 						"sdmmc4_rst_n_pcc3";
    125 				nvidia,function = "sdmmc4";
    126 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    127 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    128 			};
    129 			sdmmc4_dat0_paa0 {
    130 				nvidia,pins =	"sdmmc4_dat0_paa0",
    131 						"sdmmc4_dat1_paa1",
    132 						"sdmmc4_dat2_paa2",
    133 						"sdmmc4_dat3_paa3",
    134 						"sdmmc4_dat4_paa4",
    135 						"sdmmc4_dat5_paa5",
    136 						"sdmmc4_dat6_paa6",
    137 						"sdmmc4_dat7_paa7";
    138 				nvidia,function = "sdmmc4";
    139 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    140 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    141 			};
    142 			dap2_fs_pa2 {
    143 				nvidia,pins =	"dap2_fs_pa2",
    144 						"dap2_sclk_pa3",
    145 						"dap2_din_pa4",
    146 						"dap2_dout_pa5";
    147 				nvidia,function = "i2s1";
    148 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    149 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    150 			};
    151 			sdio3 {
    152 				nvidia,pins = "drive_sdio3";
    153 				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
    154 				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
    155 				nvidia,pull-down-strength = <46>;
    156 				nvidia,pull-up-strength = <42>;
    157 				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
    158 				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
    159 			};
    160 			uart3_txd_pw6 {
    161 				nvidia,pins =	"uart3_txd_pw6",
    162 						"uart3_cts_n_pa1",
    163 						"uart3_rts_n_pc0",
    164 						"uart3_rxd_pw7";
    165 				nvidia,function = "uartc";
    166 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    167 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    168 			};
    169 		};
    170 	};
    171 
    172 	serial@70006000 {
    173 		/delete-property/ dmas;
    174 		/delete-property/ dma-names;
    175 		status = "okay";
    176 	};
    177 
    178 	serial@70006200 {
    179 		compatible = "nvidia,tegra30-hsuart";
    180 		reset-names = "serial";
    181 		/delete-property/ reg-shift;
    182 		status = "okay";
    183 	};
    184 
    185 	pwm@7000a000 {
    186 		status = "okay";
    187 	};
    188 
    189 	panelddc: i2c@7000c000 {
    190 		status = "okay";
    191 		clock-frequency = <100000>;
    192 	};
    193 
    194 	i2c@7000c400 {
    195 		status = "okay";
    196 		clock-frequency = <100000>;
    197 	};
    198 
    199 	i2c@7000c500 {
    200 		status = "okay";
    201 		clock-frequency = <100000>;
    202 
    203 		/* ALS and Proximity sensor */
    204 		isl29028@44 {
    205 			compatible = "isil,isl29028";
    206 			reg = <0x44>;
    207 			interrupt-parent = <&gpio>;
    208 			interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
    209 		};
    210 
    211 		i2cmux@70 {
    212 			compatible = "nxp,pca9546";
    213 			#address-cells = <1>;
    214 			#size-cells = <0>;
    215 			reg = <0x70>;
    216 			reset-gpios = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
    217 		};
    218 	};
    219 
    220 	i2c@7000c700 {
    221 		status = "okay";
    222 		clock-frequency = <100000>;
    223 	};
    224 
    225 	i2c@7000d000 {
    226 		status = "okay";
    227 		clock-frequency = <100000>;
    228 
    229 		wm8903: wm8903@1a {
    230 			compatible = "wlf,wm8903";
    231 			reg = <0x1a>;
    232 			interrupt-parent = <&gpio>;
    233 			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
    234 
    235 			gpio-controller;
    236 			#gpio-cells = <2>;
    237 
    238 			micdet-cfg = <0>;
    239 			micdet-delay = <100>;
    240 			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
    241 		};
    242 
    243 		pmic: tps65911@2d {
    244 			compatible = "ti,tps65911";
    245 			reg = <0x2d>;
    246 
    247 			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
    248 			#interrupt-cells = <2>;
    249 			interrupt-controller;
    250 			wakeup-source;
    251 
    252 			ti,system-power-controller;
    253 
    254 			#gpio-cells = <2>;
    255 			gpio-controller;
    256 
    257 			vcc1-supply = <&vdd_ac_bat_reg>;
    258 			vcc2-supply = <&vdd_ac_bat_reg>;
    259 			vcc3-supply = <&vio_reg>;
    260 			vcc4-supply = <&vdd_5v0_reg>;
    261 			vcc5-supply = <&vdd_ac_bat_reg>;
    262 			vcc6-supply = <&vdd2_reg>;
    263 			vcc7-supply = <&vdd_ac_bat_reg>;
    264 			vccio-supply = <&vdd_ac_bat_reg>;
    265 
    266 			regulators {
    267 				vdd1_reg: vdd1 {
    268 					regulator-name = "vddio_ddr_1v2";
    269 					regulator-min-microvolt = <1200000>;
    270 					regulator-max-microvolt = <1200000>;
    271 					regulator-always-on;
    272 				};
    273 
    274 				vdd2_reg: vdd2 {
    275 					regulator-name = "vdd_1v5_gen";
    276 					regulator-min-microvolt = <1500000>;
    277 					regulator-max-microvolt = <1500000>;
    278 					regulator-always-on;
    279 				};
    280 
    281 				vddctrl_reg: vddctrl {
    282 					regulator-name = "vdd_cpu,vdd_sys";
    283 					regulator-min-microvolt = <800000>;
    284 					regulator-max-microvolt = <1250000>;
    285 					regulator-coupled-with = <&vdd_core>;
    286 					regulator-coupled-max-spread = <300000>;
    287 					regulator-max-step-microvolt = <100000>;
    288 					regulator-always-on;
    289 
    290 					nvidia,tegra-cpu-regulator;
    291 				};
    292 
    293 				vio_reg: vio {
    294 					regulator-name = "vdd_1v8_gen";
    295 					regulator-min-microvolt = <1800000>;
    296 					regulator-max-microvolt = <1800000>;
    297 					regulator-always-on;
    298 				};
    299 
    300 				ldo1_reg: ldo1 {
    301 					regulator-name = "vdd_pexa,vdd_pexb";
    302 					regulator-min-microvolt = <1050000>;
    303 					regulator-max-microvolt = <1050000>;
    304 				};
    305 
    306 				ldo2_reg: ldo2 {
    307 					regulator-name = "vdd_sata,avdd_plle";
    308 					regulator-min-microvolt = <1050000>;
    309 					regulator-max-microvolt = <1050000>;
    310 				};
    311 
    312 				/* LDO3 is not connected to anything */
    313 
    314 				ldo4_reg: ldo4 {
    315 					regulator-name = "vdd_rtc";
    316 					regulator-min-microvolt = <1200000>;
    317 					regulator-max-microvolt = <1200000>;
    318 					regulator-always-on;
    319 				};
    320 
    321 				ldo5_reg: ldo5 {
    322 					regulator-name = "vddio_sdmmc,avdd_vdac";
    323 					regulator-min-microvolt = <3300000>;
    324 					regulator-max-microvolt = <3300000>;
    325 					regulator-always-on;
    326 				};
    327 
    328 				ldo6_reg: ldo6 {
    329 					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
    330 					regulator-min-microvolt = <1200000>;
    331 					regulator-max-microvolt = <1200000>;
    332 				};
    333 
    334 				ldo7_reg: ldo7 {
    335 					regulator-name = "vdd_pllm,x,u,a_p_c_s";
    336 					regulator-min-microvolt = <1200000>;
    337 					regulator-max-microvolt = <1200000>;
    338 					regulator-always-on;
    339 				};
    340 
    341 				ldo8_reg: ldo8 {
    342 					regulator-name = "vdd_ddr_hs";
    343 					regulator-min-microvolt = <1000000>;
    344 					regulator-max-microvolt = <1000000>;
    345 					regulator-always-on;
    346 				};
    347 			};
    348 		};
    349 
    350 		nct1008: temperature-sensor@4c {
    351 			compatible = "onnn,nct1008";
    352 			reg = <0x4c>;
    353 			vcc-supply = <&sys_3v3_reg>;
    354 			interrupt-parent = <&gpio>;
    355 			interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
    356 			#thermal-sensor-cells = <1>;
    357 		};
    358 
    359 		vdd_core: tps62361@60 {
    360 			compatible = "ti,tps62361";
    361 			reg = <0x60>;
    362 
    363 			regulator-name = "tps62361-vout";
    364 			regulator-min-microvolt = <500000>;
    365 			regulator-max-microvolt = <1500000>;
    366 			regulator-coupled-with = <&vddctrl_reg>;
    367 			regulator-coupled-max-spread = <300000>;
    368 			regulator-max-step-microvolt = <100000>;
    369 			regulator-boot-on;
    370 			regulator-always-on;
    371 			ti,vsel0-state-high;
    372 			ti,vsel1-state-high;
    373 
    374 			nvidia,tegra-core-regulator;
    375 		};
    376 	};
    377 
    378 	spi@7000da00 {
    379 		status = "okay";
    380 		spi-max-frequency = <25000000>;
    381 
    382 		flash@1 {
    383 			compatible = "winbond,w25q32", "jedec,spi-nor";
    384 			reg = <1>;
    385 			spi-max-frequency = <20000000>;
    386 		};
    387 	};
    388 
    389 	pmc@7000e400 {
    390 		status = "okay";
    391 		nvidia,invert-interrupt;
    392 		nvidia,suspend-mode = <1>;
    393 		nvidia,cpu-pwr-good-time = <2000>;
    394 		nvidia,cpu-pwr-off-time = <200>;
    395 		nvidia,core-pwr-good-time = <3845 3845>;
    396 		nvidia,core-pwr-off-time = <0>;
    397 		nvidia,core-power-req-active-high;
    398 		nvidia,sys-clock-req-active-high;
    399 		core-supply = <&vdd_core>;
    400 	};
    401 
    402 	ahub@70080000 {
    403 		i2s@70080400 {
    404 			status = "okay";
    405 		};
    406 	};
    407 
    408 	mmc@78000000 {
    409 		status = "okay";
    410 		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
    411 		wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
    412 		power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
    413 		bus-width = <4>;
    414 	};
    415 
    416 	mmc@78000600 {
    417 		status = "okay";
    418 		bus-width = <8>;
    419 		non-removable;
    420 	};
    421 
    422 	usb@7d008000 {
    423 		status = "okay";
    424 	};
    425 
    426 	usb-phy@7d008000 {
    427 		vbus-supply = <&usb3_vbus_reg>;
    428 		status = "okay";
    429 	};
    430 
    431 	backlight: backlight {
    432 		compatible = "pwm-backlight";
    433 
    434 		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
    435 		power-supply = <&vdd_bl_reg>;
    436 		pwms = <&pwm 0 5000000>;
    437 
    438 		brightness-levels = <0 4 8 16 32 64 128 255>;
    439 		default-brightness-level = <6>;
    440 	};
    441 
    442 	clk32k_in: clock-32k {
    443 		compatible = "fixed-clock";
    444 		clock-frequency = <32768>;
    445 		#clock-cells = <0>;
    446 	};
    447 
    448 	cpus {
    449 		cpu0: cpu@0 {
    450 			cpu-supply = <&vddctrl_reg>;
    451 			operating-points-v2 = <&cpu0_opp_table>;
    452 			#cooling-cells = <2>;
    453 		};
    454 
    455 		cpu1: cpu@1 {
    456 			cpu-supply = <&vddctrl_reg>;
    457 			operating-points-v2 = <&cpu0_opp_table>;
    458 			#cooling-cells = <2>;
    459 		};
    460 
    461 		cpu2: cpu@2 {
    462 			cpu-supply = <&vddctrl_reg>;
    463 			operating-points-v2 = <&cpu0_opp_table>;
    464 			#cooling-cells = <2>;
    465 		};
    466 
    467 		cpu3: cpu@3 {
    468 			cpu-supply = <&vddctrl_reg>;
    469 			operating-points-v2 = <&cpu0_opp_table>;
    470 			#cooling-cells = <2>;
    471 		};
    472 	};
    473 
    474 	gpio-keys {
    475 		compatible = "gpio-keys";
    476 
    477 		key-power {
    478 			label = "Power";
    479 			interrupt-parent = <&pmic>;
    480 			interrupts = <2 0>;
    481 			linux,code = <KEY_POWER>;
    482 			debounce-interval = <100>;
    483 			wakeup-source;
    484 		};
    485 
    486 		key-volume-down {
    487 			label = "Volume Down";
    488 			gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
    489 			linux,code = <KEY_VOLUMEDOWN>;
    490 			debounce-interval = <10>;
    491 		};
    492 
    493 		key-volume-up {
    494 			label = "Volume Up";
    495 			gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
    496 			linux,code = <KEY_VOLUMEUP>;
    497 			debounce-interval = <10>;
    498 		};
    499 	};
    500 
    501 	panel: panel {
    502 		compatible = "chunghwa,claa101wb01";
    503 		ddc-i2c-bus = <&panelddc>;
    504 
    505 		power-supply = <&vdd_pnl1_reg>;
    506 		enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
    507 
    508 		backlight = <&backlight>;
    509 	};
    510 
    511 	vdd_ac_bat_reg: regulator-acbat {
    512 		compatible = "regulator-fixed";
    513 		regulator-name = "vdd_ac_bat";
    514 		regulator-min-microvolt = <5000000>;
    515 		regulator-max-microvolt = <5000000>;
    516 		regulator-always-on;
    517 	};
    518 
    519 	cam_1v8_reg: regulator-cam {
    520 		compatible = "regulator-fixed";
    521 		regulator-name = "cam_1v8";
    522 		regulator-min-microvolt = <1800000>;
    523 		regulator-max-microvolt = <1800000>;
    524 		enable-active-high;
    525 		gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
    526 		vin-supply = <&vio_reg>;
    527 	};
    528 
    529 	cp_5v_reg: regulator-5v0cp {
    530 		compatible = "regulator-fixed";
    531 		regulator-name = "cp_5v";
    532 		regulator-min-microvolt = <5000000>;
    533 		regulator-max-microvolt = <5000000>;
    534 		regulator-boot-on;
    535 		regulator-always-on;
    536 		enable-active-high;
    537 		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
    538 	};
    539 
    540 	emmc_3v3_reg: regulator-emmc {
    541 		compatible = "regulator-fixed";
    542 		regulator-name = "emmc_3v3";
    543 		regulator-min-microvolt = <3300000>;
    544 		regulator-max-microvolt = <3300000>;
    545 		regulator-always-on;
    546 		regulator-boot-on;
    547 		enable-active-high;
    548 		gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
    549 		vin-supply = <&sys_3v3_reg>;
    550 	};
    551 
    552 	modem_3v3_reg: regulator-modem {
    553 		compatible = "regulator-fixed";
    554 		regulator-name = "modem_3v3";
    555 		regulator-min-microvolt = <3300000>;
    556 		regulator-max-microvolt = <3300000>;
    557 		enable-active-high;
    558 		gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
    559 	};
    560 
    561 	pex_hvdd_3v3_reg: regulator-pex {
    562 		compatible = "regulator-fixed";
    563 		regulator-name = "pex_hvdd_3v3";
    564 		regulator-min-microvolt = <3300000>;
    565 		regulator-max-microvolt = <3300000>;
    566 		enable-active-high;
    567 		gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
    568 		vin-supply = <&sys_3v3_reg>;
    569 	};
    570 
    571 	vdd_cam1_ldo_reg: regulator-cam1 {
    572 		compatible = "regulator-fixed";
    573 		regulator-name = "vdd_cam1_ldo";
    574 		regulator-min-microvolt = <2800000>;
    575 		regulator-max-microvolt = <2800000>;
    576 		enable-active-high;
    577 		gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
    578 		vin-supply = <&sys_3v3_reg>;
    579 	};
    580 
    581 	vdd_cam2_ldo_reg: regulator-cam2 {
    582 		compatible = "regulator-fixed";
    583 		regulator-name = "vdd_cam2_ldo";
    584 		regulator-min-microvolt = <2800000>;
    585 		regulator-max-microvolt = <2800000>;
    586 		enable-active-high;
    587 		gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
    588 		vin-supply = <&sys_3v3_reg>;
    589 	};
    590 
    591 	vdd_cam3_ldo_reg: regulator-cam3 {
    592 		compatible = "regulator-fixed";
    593 		regulator-name = "vdd_cam3_ldo";
    594 		regulator-min-microvolt = <3300000>;
    595 		regulator-max-microvolt = <3300000>;
    596 		enable-active-high;
    597 		gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
    598 		vin-supply = <&sys_3v3_reg>;
    599 	};
    600 
    601 	vdd_com_reg: regulator-com {
    602 		compatible = "regulator-fixed";
    603 		regulator-name = "vdd_com";
    604 		regulator-min-microvolt = <3300000>;
    605 		regulator-max-microvolt = <3300000>;
    606 		regulator-always-on;
    607 		regulator-boot-on;
    608 		enable-active-high;
    609 		gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
    610 		vin-supply = <&sys_3v3_reg>;
    611 	};
    612 
    613 	vdd_fuse_3v3_reg: regulator-fuse {
    614 		compatible = "regulator-fixed";
    615 		regulator-name = "vdd_fuse_3v3";
    616 		regulator-min-microvolt = <3300000>;
    617 		regulator-max-microvolt = <3300000>;
    618 		enable-active-high;
    619 		gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
    620 		vin-supply = <&sys_3v3_reg>;
    621 	};
    622 
    623 	vdd_pnl1_reg: regulator-pnl1 {
    624 		compatible = "regulator-fixed";
    625 		regulator-name = "vdd_pnl1";
    626 		regulator-min-microvolt = <3300000>;
    627 		regulator-max-microvolt = <3300000>;
    628 		regulator-always-on;
    629 		regulator-boot-on;
    630 		enable-active-high;
    631 		gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
    632 		vin-supply = <&sys_3v3_reg>;
    633 	};
    634 
    635 	vdd_vid_reg: regulator-vid {
    636 		compatible = "regulator-fixed";
    637 		regulator-name = "vddio_vid";
    638 		regulator-min-microvolt = <5000000>;
    639 		regulator-max-microvolt = <5000000>;
    640 		enable-active-high;
    641 		gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
    642 		gpio-open-drain;
    643 		vin-supply = <&vdd_5v0_reg>;
    644 	};
    645 
    646 	sound {
    647 		compatible = "nvidia,tegra-audio-wm8903-cardhu",
    648 			     "nvidia,tegra-audio-wm8903";
    649 		nvidia,model = "NVIDIA Tegra Cardhu";
    650 
    651 		nvidia,audio-routing =
    652 			"Headphone Jack", "HPOUTR",
    653 			"Headphone Jack", "HPOUTL",
    654 			"Int Spk", "ROP",
    655 			"Int Spk", "RON",
    656 			"Int Spk", "LOP",
    657 			"Int Spk", "LON",
    658 			"Mic Jack", "MICBIAS",
    659 			"IN1L", "Mic Jack";
    660 
    661 		nvidia,i2s-controller = <&tegra_i2s1>;
    662 		nvidia,audio-codec = <&wm8903>;
    663 
    664 		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
    665 		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
    666 			GPIO_ACTIVE_LOW>;
    667 
    668 		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
    669 			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
    670 			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
    671 		clock-names = "pll_a", "pll_a_out0", "mclk";
    672 
    673 		assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
    674 				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
    675 
    676 		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
    677 					 <&tegra_car TEGRA30_CLK_EXTERN1>;
    678 	};
    679 
    680 	thermal-zones {
    681 		cpu-thermal {
    682 			polling-delay-passive = <1000>; /* milliseconds */
    683 			polling-delay = <5000>; /* milliseconds */
    684 
    685 			thermal-sensors = <&nct1008 1>;
    686 
    687 			trips {
    688 				trip0: cpu-alert0 {
    689 					/* throttle at 57C until temperature drops to 56.8C */
    690 					temperature = <57000>;
    691 					hysteresis = <200>;
    692 					type = "passive";
    693 				};
    694 
    695 				trip1: cpu-crit {
    696 					/* shut down at 60C */
    697 					temperature = <60000>;
    698 					hysteresis = <2000>;
    699 					type = "critical";
    700 				};
    701 			};
    702 
    703 			cooling-maps {
    704 				map0 {
    705 					trip = <&trip0>;
    706 					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    707 							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    708 							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
    709 							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    710 				};
    711 			};
    712 		};
    713 	};
    714 };
    715