1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright 2012 Sascha Hauer <s.hauer (a] pengutronix.de>, Pengutronix 4 * Copyright 2012 Steffen Trumtrar <s.trumtrar (a] pengutronix.de>, Pengutronix 5 */ 6 7 /dts-v1/; 8 #include "imx53-tqma53.dtsi" 9 10 / { 11 model = "TQ MBa53 starter kit"; 12 compatible = "tq,mba53", "tq,tqma53", "fsl,imx53"; 13 14 chosen { 15 stdout-path = &uart2; 16 }; 17 18 backlight { 19 compatible = "pwm-backlight"; 20 pwms = <&pwm2 0 50000 0>; 21 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; 22 default-brightness-level = <10>; 23 enable-gpios = <&gpio7 7 0>; 24 power-supply = <®_backlight>; 25 }; 26 27 disp1: disp1 { 28 compatible = "fsl,imx-parallel-display"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_disp1_1>; 31 interface-pix-fmt = "rgb24"; 32 status = "disabled"; 33 34 port { 35 display1_in: endpoint { 36 remote-endpoint = <&ipu_di1_disp1>; 37 }; 38 }; 39 }; 40 41 reg_backlight: regulator-backlight { 42 compatible = "regulator-fixed"; 43 regulator-name = "lcd-supply"; 44 gpio = <&gpio2 5 0>; 45 startup-delay-us = <5000>; 46 }; 47 48 reg_3p2v: regulator-3p2v { 49 compatible = "regulator-fixed"; 50 regulator-name = "3P2V"; 51 regulator-min-microvolt = <3200000>; 52 regulator-max-microvolt = <3200000>; 53 regulator-always-on; 54 }; 55 56 sound { 57 compatible = "tq,imx53-mba53-sgtl5000", 58 "fsl,imx-audio-sgtl5000"; 59 model = "imx53-mba53-sgtl5000"; 60 ssi-controller = <&ssi2>; 61 audio-codec = <&codec>; 62 audio-routing = 63 "MIC_IN", "Mic Jack", 64 "Mic Jack", "Mic Bias", 65 "Headphone Jack", "HP_OUT"; 66 mux-int-port = <2>; 67 mux-ext-port = <5>; 68 }; 69 }; 70 71 &ldb { 72 pinctrl-names = "default"; 73 pinctrl-0 = <&pinctrl_lvds1_1>; 74 status = "disabled"; 75 }; 76 77 &iomuxc { 78 lvds1 { 79 pinctrl_lvds1_1: lvds1-grp1 { 80 fsl,pins = < 81 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 82 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 83 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 84 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 85 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 86 >; 87 }; 88 89 pinctrl_lvds1_2: lvds1-grp2 { 90 fsl,pins = < 91 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000 92 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000 93 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000 94 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000 95 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000 96 >; 97 }; 98 }; 99 100 disp1 { 101 pinctrl_disp1_1: disp1-grp1 { 102 fsl,pins = < 103 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */ 104 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x80000000 /* DISP1_DRDY */ 105 MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x80000000 /* DISP1_HSYNC */ 106 MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x80000000 /* DISP1_VSYNC */ 107 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000 108 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000 109 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000 110 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000 111 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000 112 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000 113 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000 114 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000 115 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000 116 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000 117 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000 118 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000 119 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000 120 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000 121 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x80000000 122 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x80000000 123 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x80000000 124 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x80000000 125 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x80000000 126 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x80000000 127 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x80000000 128 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x80000000 129 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x80000000 130 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x80000000 131 >; 132 }; 133 }; 134 135 tve { 136 pinctrl_vga_sync_1: vgasync-grp1 { 137 fsl,pins = < 138 /* VGA_VSYNC, HSYNC with max drive strength */ 139 MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6 140 MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6 141 >; 142 }; 143 }; 144 }; 145 146 &ipu_di1_disp1 { 147 remote-endpoint = <&display1_in>; 148 }; 149 150 &cspi { 151 status = "okay"; 152 }; 153 154 &audmux { 155 status = "okay"; 156 pinctrl-names = "default"; 157 pinctrl-0 = <&pinctrl_audmux>; 158 }; 159 160 &i2c2 { 161 codec: sgtl5000@a { 162 compatible = "fsl,sgtl5000"; 163 reg = <0x0a>; 164 #sound-dai-cells = <0>; 165 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; 166 VDDA-supply = <®_3p2v>; 167 VDDIO-supply = <®_3p2v>; 168 }; 169 170 expander: pca9554@20 { 171 compatible = "pca9554"; 172 reg = <0x20>; 173 interrupts = <109>; 174 #gpio-cells = <2>; 175 gpio-controller; 176 }; 177 178 sensor2: temperature-sensor@49 { 179 compatible = "national,lm75b"; 180 reg = <0x49>; 181 }; 182 }; 183 184 &fec { 185 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; 186 status = "okay"; 187 }; 188 189 &esdhc2 { 190 status = "okay"; 191 }; 192 193 &uart3 { 194 status = "okay"; 195 }; 196 197 &ecspi1 { 198 status = "okay"; 199 }; 200 201 &usbotg { 202 dr_mode = "host"; 203 status = "okay"; 204 }; 205 206 &usbh1 { 207 status = "okay"; 208 }; 209 210 &uart1 { 211 status = "okay"; 212 }; 213 214 &ssi2 { 215 status = "okay"; 216 }; 217 218 &uart2 { 219 status = "okay"; 220 }; 221 222 &can1 { 223 status = "okay"; 224 }; 225 226 &can2 { 227 status = "okay"; 228 }; 229 230 &i2c3 { 231 status = "okay"; 232 }; 233 234 &tve { 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_vga_sync_1>; 237 ddc-i2c-bus = <&i2c3>; 238 fsl,tve-mode = "vga"; 239 fsl,hsync-pin = <4>; 240 fsl,vsync-pin = <6>; 241 status = "okay"; 242 }; 243
Indexes created Mon Oct 26 00:26:21 UTC 2026