1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Device Tree Source for the R-Car E2 (R8A77940) SoC 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * Copyright (C) 2014 Ulrich Hecht 7 */ 8 9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a7794-sysc.h> 13 14 / { 15 compatible = "renesas,r8a7794"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c7; 28 spi0 = &qspi; 29 vin0 = &vin0; 30 vin1 = &vin1; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clka: audio_clka { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 audio_clkb: audio_clkb { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 audio_clkc: audio_clkc { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 /* External CAN clock */ 55 can_clk: can { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 /* This value must be overridden by the board. */ 59 clock-frequency = <0>; 60 }; 61 62 cpus { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 66 cpu0: cpu@0 { 67 device_type = "cpu"; 68 compatible = "arm,cortex-a7"; 69 reg = <0>; 70 clock-frequency = <1000000000>; 71 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 72 power-domains = <&sysc R8A7794_PD_CA7_CPU0>; 73 enable-method = "renesas,apmu"; 74 next-level-cache = <&L2_CA7>; 75 }; 76 77 cpu1: cpu@1 { 78 device_type = "cpu"; 79 compatible = "arm,cortex-a7"; 80 reg = <1>; 81 clock-frequency = <1000000000>; 82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 83 power-domains = <&sysc R8A7794_PD_CA7_CPU1>; 84 enable-method = "renesas,apmu"; 85 next-level-cache = <&L2_CA7>; 86 }; 87 88 L2_CA7: cache-controller-0 { 89 compatible = "cache"; 90 power-domains = <&sysc R8A7794_PD_CA7_SCU>; 91 cache-unified; 92 cache-level = <2>; 93 }; 94 }; 95 96 /* External root clock */ 97 extal_clk: extal { 98 compatible = "fixed-clock"; 99 #clock-cells = <0>; 100 /* This value must be overridden by the board. */ 101 clock-frequency = <0>; 102 }; 103 104 pmu { 105 compatible = "arm,cortex-a7-pmu"; 106 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 107 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 108 interrupt-affinity = <&cpu0>, <&cpu1>; 109 }; 110 111 /* External SCIF clock */ 112 scif_clk: scif { 113 compatible = "fixed-clock"; 114 #clock-cells = <0>; 115 /* This value must be overridden by the board. */ 116 clock-frequency = <0>; 117 }; 118 119 soc { 120 compatible = "simple-bus"; 121 interrupt-parent = <&gic>; 122 123 #address-cells = <2>; 124 #size-cells = <2>; 125 ranges; 126 127 rwdt: watchdog@e6020000 { 128 compatible = "renesas,r8a7794-wdt", 129 "renesas,rcar-gen2-wdt"; 130 reg = <0 0xe6020000 0 0x0c>; 131 clocks = <&cpg CPG_MOD 402>; 132 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 133 resets = <&cpg 402>; 134 status = "disabled"; 135 }; 136 137 gpio0: gpio@e6050000 { 138 compatible = "renesas,gpio-r8a7794", 139 "renesas,rcar-gen2-gpio"; 140 reg = <0 0xe6050000 0 0x50>; 141 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 142 #gpio-cells = <2>; 143 gpio-controller; 144 gpio-ranges = <&pfc 0 0 32>; 145 #interrupt-cells = <2>; 146 interrupt-controller; 147 clocks = <&cpg CPG_MOD 912>; 148 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 149 resets = <&cpg 912>; 150 }; 151 152 gpio1: gpio@e6051000 { 153 compatible = "renesas,gpio-r8a7794", 154 "renesas,rcar-gen2-gpio"; 155 reg = <0 0xe6051000 0 0x50>; 156 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 157 #gpio-cells = <2>; 158 gpio-controller; 159 gpio-ranges = <&pfc 0 32 26>; 160 #interrupt-cells = <2>; 161 interrupt-controller; 162 clocks = <&cpg CPG_MOD 911>; 163 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 164 resets = <&cpg 911>; 165 }; 166 167 gpio2: gpio@e6052000 { 168 compatible = "renesas,gpio-r8a7794", 169 "renesas,rcar-gen2-gpio"; 170 reg = <0 0xe6052000 0 0x50>; 171 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 172 #gpio-cells = <2>; 173 gpio-controller; 174 gpio-ranges = <&pfc 0 64 32>; 175 #interrupt-cells = <2>; 176 interrupt-controller; 177 clocks = <&cpg CPG_MOD 910>; 178 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 179 resets = <&cpg 910>; 180 }; 181 182 gpio3: gpio@e6053000 { 183 compatible = "renesas,gpio-r8a7794", 184 "renesas,rcar-gen2-gpio"; 185 reg = <0 0xe6053000 0 0x50>; 186 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 187 #gpio-cells = <2>; 188 gpio-controller; 189 gpio-ranges = <&pfc 0 96 32>; 190 #interrupt-cells = <2>; 191 interrupt-controller; 192 clocks = <&cpg CPG_MOD 909>; 193 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 194 resets = <&cpg 909>; 195 }; 196 197 gpio4: gpio@e6054000 { 198 compatible = "renesas,gpio-r8a7794", 199 "renesas,rcar-gen2-gpio"; 200 reg = <0 0xe6054000 0 0x50>; 201 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 128 32>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 908>; 208 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 209 resets = <&cpg 908>; 210 }; 211 212 gpio5: gpio@e6055000 { 213 compatible = "renesas,gpio-r8a7794", 214 "renesas,rcar-gen2-gpio"; 215 reg = <0 0xe6055000 0 0x50>; 216 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 160 28>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 907>; 223 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 224 resets = <&cpg 907>; 225 }; 226 227 gpio6: gpio@e6055400 { 228 compatible = "renesas,gpio-r8a7794", 229 "renesas,rcar-gen2-gpio"; 230 reg = <0 0xe6055400 0 0x50>; 231 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 192 26>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 905>; 238 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 239 resets = <&cpg 905>; 240 }; 241 242 pfc: pinctrl@e6060000 { 243 compatible = "renesas,pfc-r8a7794"; 244 reg = <0 0xe6060000 0 0x11c>; 245 }; 246 247 cpg: clock-controller@e6150000 { 248 compatible = "renesas,r8a7794-cpg-mssr"; 249 reg = <0 0xe6150000 0 0x1000>; 250 clocks = <&extal_clk>, <&usb_extal_clk>; 251 clock-names = "extal", "usb_extal"; 252 #clock-cells = <2>; 253 #power-domain-cells = <0>; 254 #reset-cells = <1>; 255 }; 256 257 apmu@e6151000 { 258 compatible = "renesas,r8a7794-apmu", "renesas,apmu"; 259 reg = <0 0xe6151000 0 0x188>; 260 cpus = <&cpu0>, <&cpu1>; 261 }; 262 263 rst: reset-controller@e6160000 { 264 compatible = "renesas,r8a7794-rst"; 265 reg = <0 0xe6160000 0 0x0100>; 266 }; 267 268 sysc: system-controller@e6180000 { 269 compatible = "renesas,r8a7794-sysc"; 270 reg = <0 0xe6180000 0 0x0200>; 271 #power-domain-cells = <1>; 272 }; 273 274 irqc0: interrupt-controller@e61c0000 { 275 compatible = "renesas,irqc-r8a7794", "renesas,irqc"; 276 #interrupt-cells = <2>; 277 interrupt-controller; 278 reg = <0 0xe61c0000 0 0x200>; 279 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 283 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 285 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 286 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 287 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 288 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 289 clocks = <&cpg CPG_MOD 407>; 290 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 291 resets = <&cpg 407>; 292 }; 293 294 ipmmu_sy0: iommu@e6280000 { 295 compatible = "renesas,ipmmu-r8a7794", 296 "renesas,ipmmu-vmsa"; 297 reg = <0 0xe6280000 0 0x1000>; 298 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 300 #iommu-cells = <1>; 301 status = "disabled"; 302 }; 303 304 ipmmu_sy1: iommu@e6290000 { 305 compatible = "renesas,ipmmu-r8a7794", 306 "renesas,ipmmu-vmsa"; 307 reg = <0 0xe6290000 0 0x1000>; 308 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 309 #iommu-cells = <1>; 310 status = "disabled"; 311 }; 312 313 ipmmu_ds: iommu@e6740000 { 314 compatible = "renesas,ipmmu-r8a7794", 315 "renesas,ipmmu-vmsa"; 316 reg = <0 0xe6740000 0 0x1000>; 317 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 319 #iommu-cells = <1>; 320 status = "disabled"; 321 }; 322 323 ipmmu_mp: iommu@ec680000 { 324 compatible = "renesas,ipmmu-r8a7794", 325 "renesas,ipmmu-vmsa"; 326 reg = <0 0xec680000 0 0x1000>; 327 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 328 #iommu-cells = <1>; 329 status = "disabled"; 330 }; 331 332 ipmmu_mx: iommu@fe951000 { 333 compatible = "renesas,ipmmu-r8a7794", 334 "renesas,ipmmu-vmsa"; 335 reg = <0 0xfe951000 0 0x1000>; 336 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 337 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 338 #iommu-cells = <1>; 339 status = "disabled"; 340 }; 341 342 ipmmu_gp: iommu@e62a0000 { 343 compatible = "renesas,ipmmu-r8a7794", 344 "renesas,ipmmu-vmsa"; 345 reg = <0 0xe62a0000 0 0x1000>; 346 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 348 #iommu-cells = <1>; 349 status = "disabled"; 350 }; 351 352 icram0: sram@e63a0000 { 353 compatible = "mmio-sram"; 354 reg = <0 0xe63a0000 0 0x12000>; 355 #address-cells = <1>; 356 #size-cells = <1>; 357 ranges = <0 0 0xe63a0000 0x12000>; 358 }; 359 360 icram1: sram@e63c0000 { 361 compatible = "mmio-sram"; 362 reg = <0 0xe63c0000 0 0x1000>; 363 #address-cells = <1>; 364 #size-cells = <1>; 365 ranges = <0 0 0xe63c0000 0x1000>; 366 367 smp-sram@0 { 368 compatible = "renesas,smp-sram"; 369 reg = <0 0x100>; 370 }; 371 }; 372 373 /* The memory map in the User's Manual maps the cores to 374 * bus numbers 375 */ 376 i2c0: i2c@e6508000 { 377 compatible = "renesas,i2c-r8a7794", 378 "renesas,rcar-gen2-i2c"; 379 reg = <0 0xe6508000 0 0x40>; 380 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 381 clocks = <&cpg CPG_MOD 931>; 382 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 383 resets = <&cpg 931>; 384 #address-cells = <1>; 385 #size-cells = <0>; 386 i2c-scl-internal-delay-ns = <6>; 387 status = "disabled"; 388 }; 389 390 i2c1: i2c@e6518000 { 391 compatible = "renesas,i2c-r8a7794", 392 "renesas,rcar-gen2-i2c"; 393 reg = <0 0xe6518000 0 0x40>; 394 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 395 clocks = <&cpg CPG_MOD 930>; 396 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 397 resets = <&cpg 930>; 398 #address-cells = <1>; 399 #size-cells = <0>; 400 i2c-scl-internal-delay-ns = <6>; 401 status = "disabled"; 402 }; 403 404 i2c2: i2c@e6530000 { 405 compatible = "renesas,i2c-r8a7794", 406 "renesas,rcar-gen2-i2c"; 407 reg = <0 0xe6530000 0 0x40>; 408 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 409 clocks = <&cpg CPG_MOD 929>; 410 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 411 resets = <&cpg 929>; 412 #address-cells = <1>; 413 #size-cells = <0>; 414 i2c-scl-internal-delay-ns = <6>; 415 status = "disabled"; 416 }; 417 418 i2c3: i2c@e6540000 { 419 compatible = "renesas,i2c-r8a7794", 420 "renesas,rcar-gen2-i2c"; 421 reg = <0 0xe6540000 0 0x40>; 422 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 423 clocks = <&cpg CPG_MOD 928>; 424 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 425 resets = <&cpg 928>; 426 #address-cells = <1>; 427 #size-cells = <0>; 428 i2c-scl-internal-delay-ns = <6>; 429 status = "disabled"; 430 }; 431 432 i2c4: i2c@e6520000 { 433 compatible = "renesas,i2c-r8a7794", 434 "renesas,rcar-gen2-i2c"; 435 reg = <0 0xe6520000 0 0x40>; 436 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 437 clocks = <&cpg CPG_MOD 927>; 438 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 439 resets = <&cpg 927>; 440 #address-cells = <1>; 441 #size-cells = <0>; 442 i2c-scl-internal-delay-ns = <6>; 443 status = "disabled"; 444 }; 445 446 i2c5: i2c@e6528000 { 447 compatible = "renesas,i2c-r8a7794", 448 "renesas,rcar-gen2-i2c"; 449 reg = <0 0xe6528000 0 0x40>; 450 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&cpg CPG_MOD 925>; 452 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 453 resets = <&cpg 925>; 454 #address-cells = <1>; 455 #size-cells = <0>; 456 i2c-scl-internal-delay-ns = <6>; 457 status = "disabled"; 458 }; 459 460 i2c6: i2c@e6500000 { 461 compatible = "renesas,iic-r8a7794", 462 "renesas,rcar-gen2-iic", 463 "renesas,rmobile-iic"; 464 reg = <0 0xe6500000 0 0x425>; 465 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 466 clocks = <&cpg CPG_MOD 318>; 467 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 468 <&dmac1 0x61>, <&dmac1 0x62>; 469 dma-names = "tx", "rx", "tx", "rx"; 470 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 471 resets = <&cpg 318>; 472 #address-cells = <1>; 473 #size-cells = <0>; 474 status = "disabled"; 475 }; 476 477 i2c7: i2c@e6510000 { 478 compatible = "renesas,iic-r8a7794", 479 "renesas,rcar-gen2-iic", 480 "renesas,rmobile-iic"; 481 reg = <0 0xe6510000 0 0x425>; 482 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 323>; 484 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 485 <&dmac1 0x65>, <&dmac1 0x66>; 486 dma-names = "tx", "rx", "tx", "rx"; 487 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 488 resets = <&cpg 323>; 489 #address-cells = <1>; 490 #size-cells = <0>; 491 status = "disabled"; 492 }; 493 494 hsusb: usb@e6590000 { 495 compatible = "renesas,usbhs-r8a7794", 496 "renesas,rcar-gen2-usbhs"; 497 reg = <0 0xe6590000 0 0x100>; 498 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 499 clocks = <&cpg CPG_MOD 704>; 500 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 501 resets = <&cpg 704>; 502 renesas,buswait = <4>; 503 phys = <&usb0 1>; 504 phy-names = "usb"; 505 status = "disabled"; 506 }; 507 508 usbphy: usb-phy@e6590100 { 509 compatible = "renesas,usb-phy-r8a7794", 510 "renesas,rcar-gen2-usb-phy"; 511 reg = <0 0xe6590100 0 0x100>; 512 #address-cells = <1>; 513 #size-cells = <0>; 514 clocks = <&cpg CPG_MOD 704>; 515 clock-names = "usbhs"; 516 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 517 resets = <&cpg 704>; 518 status = "disabled"; 519 520 usb0: usb-channel@0 { 521 reg = <0>; 522 #phy-cells = <1>; 523 }; 524 usb2: usb-channel@2 { 525 reg = <2>; 526 #phy-cells = <1>; 527 }; 528 }; 529 530 dmac0: dma-controller@e6700000 { 531 compatible = "renesas,dmac-r8a7794", 532 "renesas,rcar-dmac"; 533 reg = <0 0xe6700000 0 0x20000>; 534 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 535 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 537 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 538 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 539 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 540 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 541 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 542 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 544 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 547 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 548 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 549 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 550 interrupt-names = "error", 551 "ch0", "ch1", "ch2", "ch3", 552 "ch4", "ch5", "ch6", "ch7", 553 "ch8", "ch9", "ch10", "ch11", 554 "ch12", "ch13", "ch14"; 555 clocks = <&cpg CPG_MOD 219>; 556 clock-names = "fck"; 557 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 558 resets = <&cpg 219>; 559 #dma-cells = <1>; 560 dma-channels = <15>; 561 }; 562 563 dmac1: dma-controller@e6720000 { 564 compatible = "renesas,dmac-r8a7794", 565 "renesas,rcar-dmac"; 566 reg = <0 0xe6720000 0 0x20000>; 567 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 568 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 569 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 570 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 571 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 572 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 574 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 575 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 576 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 577 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 578 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 579 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 580 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 583 interrupt-names = "error", 584 "ch0", "ch1", "ch2", "ch3", 585 "ch4", "ch5", "ch6", "ch7", 586 "ch8", "ch9", "ch10", "ch11", 587 "ch12", "ch13", "ch14"; 588 clocks = <&cpg CPG_MOD 218>; 589 clock-names = "fck"; 590 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 591 resets = <&cpg 218>; 592 #dma-cells = <1>; 593 dma-channels = <15>; 594 }; 595 596 avb: ethernet@e6800000 { 597 compatible = "renesas,etheravb-r8a7794", 598 "renesas,etheravb-rcar-gen2"; 599 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 600 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 601 clocks = <&cpg CPG_MOD 812>; 602 clock-names = "fck"; 603 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 604 resets = <&cpg 812>; 605 #address-cells = <1>; 606 #size-cells = <0>; 607 status = "disabled"; 608 }; 609 610 qspi: spi@e6b10000 { 611 compatible = "renesas,qspi-r8a7794", "renesas,qspi"; 612 reg = <0 0xe6b10000 0 0x2c>; 613 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 917>; 615 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 616 <&dmac1 0x17>, <&dmac1 0x18>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 619 resets = <&cpg 917>; 620 num-cs = <1>; 621 #address-cells = <1>; 622 #size-cells = <0>; 623 status = "disabled"; 624 }; 625 626 scifa0: serial@e6c40000 { 627 compatible = "renesas,scifa-r8a7794", 628 "renesas,rcar-gen2-scifa", "renesas,scifa"; 629 reg = <0 0xe6c40000 0 64>; 630 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 204>; 632 clock-names = "fck"; 633 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 634 <&dmac1 0x21>, <&dmac1 0x22>; 635 dma-names = "tx", "rx", "tx", "rx"; 636 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 637 resets = <&cpg 204>; 638 status = "disabled"; 639 }; 640 641 scifa1: serial@e6c50000 { 642 compatible = "renesas,scifa-r8a7794", 643 "renesas,rcar-gen2-scifa", "renesas,scifa"; 644 reg = <0 0xe6c50000 0 64>; 645 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 203>; 647 clock-names = "fck"; 648 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 649 <&dmac1 0x25>, <&dmac1 0x26>; 650 dma-names = "tx", "rx", "tx", "rx"; 651 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 652 resets = <&cpg 203>; 653 status = "disabled"; 654 }; 655 656 scifa2: serial@e6c60000 { 657 compatible = "renesas,scifa-r8a7794", 658 "renesas,rcar-gen2-scifa", "renesas,scifa"; 659 reg = <0 0xe6c60000 0 64>; 660 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 661 clocks = <&cpg CPG_MOD 202>; 662 clock-names = "fck"; 663 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 664 <&dmac1 0x27>, <&dmac1 0x28>; 665 dma-names = "tx", "rx", "tx", "rx"; 666 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 667 resets = <&cpg 202>; 668 status = "disabled"; 669 }; 670 671 scifa3: serial@e6c70000 { 672 compatible = "renesas,scifa-r8a7794", 673 "renesas,rcar-gen2-scifa", "renesas,scifa"; 674 reg = <0 0xe6c70000 0 64>; 675 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 676 clocks = <&cpg CPG_MOD 1106>; 677 clock-names = "fck"; 678 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 679 <&dmac1 0x1b>, <&dmac1 0x1c>; 680 dma-names = "tx", "rx", "tx", "rx"; 681 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 682 resets = <&cpg 1106>; 683 status = "disabled"; 684 }; 685 686 scifa4: serial@e6c78000 { 687 compatible = "renesas,scifa-r8a7794", 688 "renesas,rcar-gen2-scifa", "renesas,scifa"; 689 reg = <0 0xe6c78000 0 64>; 690 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 691 clocks = <&cpg CPG_MOD 1107>; 692 clock-names = "fck"; 693 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 694 <&dmac1 0x1f>, <&dmac1 0x20>; 695 dma-names = "tx", "rx", "tx", "rx"; 696 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 697 resets = <&cpg 1107>; 698 status = "disabled"; 699 }; 700 701 scifa5: serial@e6c80000 { 702 compatible = "renesas,scifa-r8a7794", 703 "renesas,rcar-gen2-scifa", "renesas,scifa"; 704 reg = <0 0xe6c80000 0 64>; 705 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&cpg CPG_MOD 1108>; 707 clock-names = "fck"; 708 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 709 <&dmac1 0x23>, <&dmac1 0x24>; 710 dma-names = "tx", "rx", "tx", "rx"; 711 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 712 resets = <&cpg 1108>; 713 status = "disabled"; 714 }; 715 716 scifb0: serial@e6c20000 { 717 compatible = "renesas,scifb-r8a7794", 718 "renesas,rcar-gen2-scifb", "renesas,scifb"; 719 reg = <0 0xe6c20000 0 0x100>; 720 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 721 clocks = <&cpg CPG_MOD 206>; 722 clock-names = "fck"; 723 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 724 <&dmac1 0x3d>, <&dmac1 0x3e>; 725 dma-names = "tx", "rx", "tx", "rx"; 726 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 727 resets = <&cpg 206>; 728 status = "disabled"; 729 }; 730 731 scifb1: serial@e6c30000 { 732 compatible = "renesas,scifb-r8a7794", 733 "renesas,rcar-gen2-scifb", "renesas,scifb"; 734 reg = <0 0xe6c30000 0 0x100>; 735 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 736 clocks = <&cpg CPG_MOD 207>; 737 clock-names = "fck"; 738 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 739 <&dmac1 0x19>, <&dmac1 0x1a>; 740 dma-names = "tx", "rx", "tx", "rx"; 741 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 742 resets = <&cpg 207>; 743 status = "disabled"; 744 }; 745 746 scifb2: serial@e6ce0000 { 747 compatible = "renesas,scifb-r8a7794", 748 "renesas,rcar-gen2-scifb", "renesas,scifb"; 749 reg = <0 0xe6ce0000 0 0x100>; 750 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 751 clocks = <&cpg CPG_MOD 216>; 752 clock-names = "fck"; 753 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 754 <&dmac1 0x1d>, <&dmac1 0x1e>; 755 dma-names = "tx", "rx", "tx", "rx"; 756 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 757 resets = <&cpg 216>; 758 status = "disabled"; 759 }; 760 761 scif0: serial@e6e60000 { 762 compatible = "renesas,scif-r8a7794", 763 "renesas,rcar-gen2-scif", 764 "renesas,scif"; 765 reg = <0 0xe6e60000 0 64>; 766 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 767 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 768 <&scif_clk>; 769 clock-names = "fck", "brg_int", "scif_clk"; 770 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 771 <&dmac1 0x29>, <&dmac1 0x2a>; 772 dma-names = "tx", "rx", "tx", "rx"; 773 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 774 resets = <&cpg 721>; 775 status = "disabled"; 776 }; 777 778 scif1: serial@e6e68000 { 779 compatible = "renesas,scif-r8a7794", 780 "renesas,rcar-gen2-scif", 781 "renesas,scif"; 782 reg = <0 0xe6e68000 0 64>; 783 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 784 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 785 <&scif_clk>; 786 clock-names = "fck", "brg_int", "scif_clk"; 787 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 788 <&dmac1 0x2d>, <&dmac1 0x2e>; 789 dma-names = "tx", "rx", "tx", "rx"; 790 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 791 resets = <&cpg 720>; 792 status = "disabled"; 793 }; 794 795 scif2: serial@e6e58000 { 796 compatible = "renesas,scif-r8a7794", 797 "renesas,rcar-gen2-scif", "renesas,scif"; 798 reg = <0 0xe6e58000 0 64>; 799 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 800 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 801 <&scif_clk>; 802 clock-names = "fck", "brg_int", "scif_clk"; 803 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 804 <&dmac1 0x2b>, <&dmac1 0x2c>; 805 dma-names = "tx", "rx", "tx", "rx"; 806 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 807 resets = <&cpg 719>; 808 status = "disabled"; 809 }; 810 811 scif3: serial@e6ea8000 { 812 compatible = "renesas,scif-r8a7794", 813 "renesas,rcar-gen2-scif", "renesas,scif"; 814 reg = <0 0xe6ea8000 0 64>; 815 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 816 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 817 <&scif_clk>; 818 clock-names = "fck", "brg_int", "scif_clk"; 819 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 820 <&dmac1 0x2f>, <&dmac1 0x30>; 821 dma-names = "tx", "rx", "tx", "rx"; 822 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 823 resets = <&cpg 718>; 824 status = "disabled"; 825 }; 826 827 scif4: serial@e6ee0000 { 828 compatible = "renesas,scif-r8a7794", 829 "renesas,rcar-gen2-scif", "renesas,scif"; 830 reg = <0 0xe6ee0000 0 64>; 831 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 832 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 833 <&scif_clk>; 834 clock-names = "fck", "brg_int", "scif_clk"; 835 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 836 <&dmac1 0xfb>, <&dmac1 0xfc>; 837 dma-names = "tx", "rx", "tx", "rx"; 838 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 839 resets = <&cpg 715>; 840 status = "disabled"; 841 }; 842 843 scif5: serial@e6ee8000 { 844 compatible = "renesas,scif-r8a7794", 845 "renesas,rcar-gen2-scif", "renesas,scif"; 846 reg = <0 0xe6ee8000 0 64>; 847 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 848 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 849 <&scif_clk>; 850 clock-names = "fck", "brg_int", "scif_clk"; 851 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 852 <&dmac1 0xfd>, <&dmac1 0xfe>; 853 dma-names = "tx", "rx", "tx", "rx"; 854 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 855 resets = <&cpg 714>; 856 status = "disabled"; 857 }; 858 859 hscif0: serial@e62c0000 { 860 compatible = "renesas,hscif-r8a7794", 861 "renesas,rcar-gen2-hscif", "renesas,hscif"; 862 reg = <0 0xe62c0000 0 96>; 863 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 864 clocks = <&cpg CPG_MOD 717>, 865 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 866 clock-names = "fck", "brg_int", "scif_clk"; 867 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 868 <&dmac1 0x39>, <&dmac1 0x3a>; 869 dma-names = "tx", "rx", "tx", "rx"; 870 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 871 resets = <&cpg 717>; 872 status = "disabled"; 873 }; 874 875 hscif1: serial@e62c8000 { 876 compatible = "renesas,hscif-r8a7794", 877 "renesas,rcar-gen2-hscif", "renesas,hscif"; 878 reg = <0 0xe62c8000 0 96>; 879 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 880 clocks = <&cpg CPG_MOD 716>, 881 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 882 clock-names = "fck", "brg_int", "scif_clk"; 883 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 884 <&dmac1 0x4d>, <&dmac1 0x4e>; 885 dma-names = "tx", "rx", "tx", "rx"; 886 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 887 resets = <&cpg 716>; 888 status = "disabled"; 889 }; 890 891 hscif2: serial@e62d0000 { 892 compatible = "renesas,hscif-r8a7794", 893 "renesas,rcar-gen2-hscif", "renesas,hscif"; 894 reg = <0 0xe62d0000 0 96>; 895 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 896 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 897 <&scif_clk>; 898 clock-names = "fck", "brg_int", "scif_clk"; 899 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 900 <&dmac1 0x3b>, <&dmac1 0x3c>; 901 dma-names = "tx", "rx", "tx", "rx"; 902 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 903 resets = <&cpg 713>; 904 status = "disabled"; 905 }; 906 907 can0: can@e6e80000 { 908 compatible = "renesas,can-r8a7794", 909 "renesas,rcar-gen2-can"; 910 reg = <0 0xe6e80000 0 0x1000>; 911 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 912 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 913 <&can_clk>; 914 clock-names = "clkp1", "clkp2", "can_clk"; 915 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 916 resets = <&cpg 916>; 917 status = "disabled"; 918 }; 919 920 can1: can@e6e88000 { 921 compatible = "renesas,can-r8a7794", 922 "renesas,rcar-gen2-can"; 923 reg = <0 0xe6e88000 0 0x1000>; 924 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 925 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 926 <&can_clk>; 927 clock-names = "clkp1", "clkp2", "can_clk"; 928 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 929 resets = <&cpg 915>; 930 status = "disabled"; 931 }; 932 933 vin0: video@e6ef0000 { 934 compatible = "renesas,vin-r8a7794", 935 "renesas,rcar-gen2-vin"; 936 reg = <0 0xe6ef0000 0 0x1000>; 937 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 938 clocks = <&cpg CPG_MOD 811>; 939 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 940 resets = <&cpg 811>; 941 status = "disabled"; 942 }; 943 944 vin1: video@e6ef1000 { 945 compatible = "renesas,vin-r8a7794", 946 "renesas,rcar-gen2-vin"; 947 reg = <0 0xe6ef1000 0 0x1000>; 948 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 949 clocks = <&cpg CPG_MOD 810>; 950 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 951 resets = <&cpg 810>; 952 status = "disabled"; 953 }; 954 955 rcar_sound: sound@ec500000 { 956 /* 957 * #sound-dai-cells is required 958 * 959 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 960 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 961 */ 962 compatible = "renesas,rcar_sound-r8a7794", 963 "renesas,rcar_sound-gen2"; 964 reg = <0 0xec500000 0 0x1000>, /* SCU */ 965 <0 0xec5a0000 0 0x100>, /* ADG */ 966 <0 0xec540000 0 0x1000>, /* SSIU */ 967 <0 0xec541000 0 0x280>, /* SSI */ 968 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 969 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 970 971 clocks = <&cpg CPG_MOD 1005>, 972 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 973 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 974 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 975 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 976 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 977 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 978 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 979 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 980 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 981 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 982 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 983 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 984 <&cpg CPG_CORE R8A7794_CLK_M2>; 985 clock-names = "ssi-all", 986 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 987 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 988 "ssi.1", "ssi.0", 989 "src.6", "src.5", "src.4", "src.3", 990 "src.2", "src.1", 991 "ctu.0", "ctu.1", 992 "mix.0", "mix.1", 993 "dvc.0", "dvc.1", 994 "clk_a", "clk_b", "clk_c", "clk_i"; 995 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 996 resets = <&cpg 1005>, 997 <&cpg 1006>, <&cpg 1007>, 998 <&cpg 1008>, <&cpg 1009>, 999 <&cpg 1010>, <&cpg 1011>, 1000 <&cpg 1012>, <&cpg 1013>, 1001 <&cpg 1014>, <&cpg 1015>; 1002 reset-names = "ssi-all", 1003 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1004 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1005 "ssi.1", "ssi.0"; 1006 1007 status = "disabled"; 1008 1009 rcar_sound,dvc { 1010 dvc0: dvc-0 { 1011 dmas = <&audma0 0xbc>; 1012 dma-names = "tx"; 1013 }; 1014 dvc1: dvc-1 { 1015 dmas = <&audma0 0xbe>; 1016 dma-names = "tx"; 1017 }; 1018 }; 1019 1020 rcar_sound,mix { 1021 mix0: mix-0 { }; 1022 mix1: mix-1 { }; 1023 }; 1024 1025 rcar_sound,ctu { 1026 ctu00: ctu-0 { }; 1027 ctu01: ctu-1 { }; 1028 ctu02: ctu-2 { }; 1029 ctu03: ctu-3 { }; 1030 ctu10: ctu-4 { }; 1031 ctu11: ctu-5 { }; 1032 ctu12: ctu-6 { }; 1033 ctu13: ctu-7 { }; 1034 }; 1035 1036 rcar_sound,src { 1037 src-0 { 1038 status = "disabled"; 1039 }; 1040 src1: src-1 { 1041 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1042 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1043 dma-names = "rx", "tx"; 1044 }; 1045 src2: src-2 { 1046 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1047 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1048 dma-names = "rx", "tx"; 1049 }; 1050 src3: src-3 { 1051 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1052 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1053 dma-names = "rx", "tx"; 1054 }; 1055 src4: src-4 { 1056 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1057 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1058 dma-names = "rx", "tx"; 1059 }; 1060 src5: src-5 { 1061 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1062 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1063 dma-names = "rx", "tx"; 1064 }; 1065 src6: src-6 { 1066 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1067 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1068 dma-names = "rx", "tx"; 1069 }; 1070 }; 1071 1072 rcar_sound,ssi { 1073 ssi0: ssi-0 { 1074 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1075 dmas = <&audma0 0x01>, <&audma0 0x02>, 1076 <&audma0 0x15>, <&audma0 0x16>; 1077 dma-names = "rx", "tx", "rxu", "txu"; 1078 }; 1079 ssi1: ssi-1 { 1080 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1081 dmas = <&audma0 0x03>, <&audma0 0x04>, 1082 <&audma0 0x49>, <&audma0 0x4a>; 1083 dma-names = "rx", "tx", "rxu", "txu"; 1084 }; 1085 ssi2: ssi-2 { 1086 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1087 dmas = <&audma0 0x05>, <&audma0 0x06>, 1088 <&audma0 0x63>, <&audma0 0x64>; 1089 dma-names = "rx", "tx", "rxu", "txu"; 1090 }; 1091 ssi3: ssi-3 { 1092 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1093 dmas = <&audma0 0x07>, <&audma0 0x08>, 1094 <&audma0 0x6f>, <&audma0 0x70>; 1095 dma-names = "rx", "tx", "rxu", "txu"; 1096 }; 1097 ssi4: ssi-4 { 1098 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1099 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1100 <&audma0 0x71>, <&audma0 0x72>; 1101 dma-names = "rx", "tx", "rxu", "txu"; 1102 }; 1103 ssi5: ssi-5 { 1104 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1105 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1106 <&audma0 0x73>, <&audma0 0x74>; 1107 dma-names = "rx", "tx", "rxu", "txu"; 1108 }; 1109 ssi6: ssi-6 { 1110 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1111 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1112 <&audma0 0x75>, <&audma0 0x76>; 1113 dma-names = "rx", "tx", "rxu", "txu"; 1114 }; 1115 ssi7: ssi-7 { 1116 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1117 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1118 <&audma0 0x79>, <&audma0 0x7a>; 1119 dma-names = "rx", "tx", "rxu", "txu"; 1120 }; 1121 ssi8: ssi-8 { 1122 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1123 dmas = <&audma0 0x11>, <&audma0 0x12>, 1124 <&audma0 0x7b>, <&audma0 0x7c>; 1125 dma-names = "rx", "tx", "rxu", "txu"; 1126 }; 1127 ssi9: ssi-9 { 1128 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1129 dmas = <&audma0 0x13>, <&audma0 0x14>, 1130 <&audma0 0x7d>, <&audma0 0x7e>; 1131 dma-names = "rx", "tx", "rxu", "txu"; 1132 }; 1133 }; 1134 }; 1135 1136 audma0: dma-controller@ec700000 { 1137 compatible = "renesas,dmac-r8a7794", 1138 "renesas,rcar-dmac"; 1139 reg = <0 0xec700000 0 0x10000>; 1140 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1141 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1142 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1143 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1144 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1145 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1146 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1147 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1148 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1149 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1150 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1151 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1152 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1153 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1154 interrupt-names = "error", 1155 "ch0", "ch1", "ch2", "ch3", "ch4", 1156 "ch5", "ch6", "ch7", "ch8", "ch9", 1157 "ch10", "ch11", 1158 "ch12"; 1159 clocks = <&cpg CPG_MOD 502>; 1160 clock-names = "fck"; 1161 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1162 resets = <&cpg 502>; 1163 #dma-cells = <1>; 1164 dma-channels = <13>; 1165 }; 1166 1167 pci0: pci@ee090000 { 1168 compatible = "renesas,pci-r8a7794", 1169 "renesas,pci-rcar-gen2"; 1170 device_type = "pci"; 1171 reg = <0 0xee090000 0 0xc00>, 1172 <0 0xee080000 0 0x1100>; 1173 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1174 clocks = <&cpg CPG_MOD 703>; 1175 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1176 resets = <&cpg 703>; 1177 status = "disabled"; 1178 1179 bus-range = <0 0>; 1180 #address-cells = <3>; 1181 #size-cells = <2>; 1182 #interrupt-cells = <1>; 1183 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1184 interrupt-map-mask = <0xf800 0 0 0x7>; 1185 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1186 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1187 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1188 1189 usb@1,0 { 1190 reg = <0x800 0 0 0 0>; 1191 phys = <&usb0 0>; 1192 phy-names = "usb"; 1193 }; 1194 1195 usb@2,0 { 1196 reg = <0x1000 0 0 0 0>; 1197 phys = <&usb0 0>; 1198 phy-names = "usb"; 1199 }; 1200 }; 1201 1202 pci1: pci@ee0d0000 { 1203 compatible = "renesas,pci-r8a7794", 1204 "renesas,pci-rcar-gen2"; 1205 device_type = "pci"; 1206 reg = <0 0xee0d0000 0 0xc00>, 1207 <0 0xee0c0000 0 0x1100>; 1208 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 703>; 1210 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1211 resets = <&cpg 703>; 1212 status = "disabled"; 1213 1214 bus-range = <1 1>; 1215 #address-cells = <3>; 1216 #size-cells = <2>; 1217 #interrupt-cells = <1>; 1218 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1219 interrupt-map-mask = <0xf800 0 0 0x7>; 1220 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1221 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1222 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1223 1224 usb@1,0 { 1225 reg = <0x10800 0 0 0 0>; 1226 phys = <&usb2 0>; 1227 phy-names = "usb"; 1228 }; 1229 1230 usb@2,0 { 1231 reg = <0x11000 0 0 0 0>; 1232 phys = <&usb2 0>; 1233 phy-names = "usb"; 1234 }; 1235 }; 1236 1237 sdhi0: mmc@ee100000 { 1238 compatible = "renesas,sdhi-r8a7794", 1239 "renesas,rcar-gen2-sdhi"; 1240 reg = <0 0xee100000 0 0x328>; 1241 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1242 clocks = <&cpg CPG_MOD 314>; 1243 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1244 <&dmac1 0xcd>, <&dmac1 0xce>; 1245 dma-names = "tx", "rx", "tx", "rx"; 1246 max-frequency = <195000000>; 1247 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1248 resets = <&cpg 314>; 1249 status = "disabled"; 1250 }; 1251 1252 sdhi1: mmc@ee140000 { 1253 compatible = "renesas,sdhi-r8a7794", 1254 "renesas,rcar-gen2-sdhi"; 1255 reg = <0 0xee140000 0 0x100>; 1256 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1257 clocks = <&cpg CPG_MOD 312>; 1258 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1259 <&dmac1 0xc1>, <&dmac1 0xc2>; 1260 dma-names = "tx", "rx", "tx", "rx"; 1261 max-frequency = <97500000>; 1262 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1263 resets = <&cpg 312>; 1264 status = "disabled"; 1265 }; 1266 1267 sdhi2: mmc@ee160000 { 1268 compatible = "renesas,sdhi-r8a7794", 1269 "renesas,rcar-gen2-sdhi"; 1270 reg = <0 0xee160000 0 0x100>; 1271 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1272 clocks = <&cpg CPG_MOD 311>; 1273 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1274 <&dmac1 0xd3>, <&dmac1 0xd4>; 1275 dma-names = "tx", "rx", "tx", "rx"; 1276 max-frequency = <97500000>; 1277 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1278 resets = <&cpg 311>; 1279 status = "disabled"; 1280 }; 1281 1282 mmcif0: mmc@ee200000 { 1283 compatible = "renesas,mmcif-r8a7794", 1284 "renesas,sh-mmcif"; 1285 reg = <0 0xee200000 0 0x80>; 1286 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1287 clocks = <&cpg CPG_MOD 315>; 1288 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1289 <&dmac1 0xd1>, <&dmac1 0xd2>; 1290 dma-names = "tx", "rx", "tx", "rx"; 1291 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1292 resets = <&cpg 315>; 1293 reg-io-width = <4>; 1294 status = "disabled"; 1295 }; 1296 1297 ether: ethernet@ee700000 { 1298 compatible = "renesas,ether-r8a7794", 1299 "renesas,rcar-gen2-ether"; 1300 reg = <0 0xee700000 0 0x400>; 1301 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1302 clocks = <&cpg CPG_MOD 813>; 1303 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1304 resets = <&cpg 813>; 1305 phy-mode = "rmii"; 1306 #address-cells = <1>; 1307 #size-cells = <0>; 1308 status = "disabled"; 1309 }; 1310 1311 gic: interrupt-controller@f1001000 { 1312 compatible = "arm,gic-400"; 1313 #interrupt-cells = <3>; 1314 #address-cells = <0>; 1315 interrupt-controller; 1316 reg = <0 0xf1001000 0 0x1000>, 1317 <0 0xf1002000 0 0x2000>, 1318 <0 0xf1004000 0 0x2000>, 1319 <0 0xf1006000 0 0x2000>; 1320 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1321 clocks = <&cpg CPG_MOD 408>; 1322 clock-names = "clk"; 1323 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1324 resets = <&cpg 408>; 1325 }; 1326 1327 vsp@fe928000 { 1328 compatible = "renesas,vsp1"; 1329 reg = <0 0xfe928000 0 0x8000>; 1330 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1331 clocks = <&cpg CPG_MOD 131>; 1332 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1333 resets = <&cpg 131>; 1334 }; 1335 1336 vsp@fe930000 { 1337 compatible = "renesas,vsp1"; 1338 reg = <0 0xfe930000 0 0x8000>; 1339 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1340 clocks = <&cpg CPG_MOD 128>; 1341 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1342 resets = <&cpg 128>; 1343 }; 1344 1345 fdp1@fe940000 { 1346 compatible = "renesas,fdp1"; 1347 reg = <0 0xfe940000 0 0x2400>; 1348 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1349 clocks = <&cpg CPG_MOD 119>; 1350 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1351 resets = <&cpg 119>; 1352 }; 1353 1354 du: display@feb00000 { 1355 compatible = "renesas,du-r8a7794"; 1356 reg = <0 0xfeb00000 0 0x40000>; 1357 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1358 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1359 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1360 clock-names = "du.0", "du.1"; 1361 resets = <&cpg 724>; 1362 reset-names = "du.0"; 1363 status = "disabled"; 1364 1365 ports { 1366 #address-cells = <1>; 1367 #size-cells = <0>; 1368 1369 port@0 { 1370 reg = <0>; 1371 du_out_rgb0: endpoint { 1372 }; 1373 }; 1374 port@1 { 1375 reg = <1>; 1376 du_out_rgb1: endpoint { 1377 }; 1378 }; 1379 }; 1380 }; 1381 1382 prr: chipid@ff000044 { 1383 compatible = "renesas,prr"; 1384 reg = <0 0xff000044 0 4>; 1385 }; 1386 1387 cmt0: timer@ffca0000 { 1388 compatible = "renesas,r8a7794-cmt0", 1389 "renesas,rcar-gen2-cmt0"; 1390 reg = <0 0xffca0000 0 0x1004>; 1391 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1392 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1393 clocks = <&cpg CPG_MOD 124>; 1394 clock-names = "fck"; 1395 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1396 resets = <&cpg 124>; 1397 1398 status = "disabled"; 1399 }; 1400 1401 cmt1: timer@e6130000 { 1402 compatible = "renesas,r8a7794-cmt1", 1403 "renesas,rcar-gen2-cmt1"; 1404 reg = <0 0xe6130000 0 0x1004>; 1405 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1406 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1407 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1408 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1409 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1410 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1411 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1412 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1413 clocks = <&cpg CPG_MOD 329>; 1414 clock-names = "fck"; 1415 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1416 resets = <&cpg 329>; 1417 1418 status = "disabled"; 1419 }; 1420 }; 1421 1422 timer { 1423 compatible = "arm,armv7-timer"; 1424 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1425 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1426 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1427 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1428 }; 1429 1430 /* External USB clock - can be overridden by the board */ 1431 usb_extal_clk: usb_extal { 1432 compatible = "fixed-clock"; 1433 #clock-cells = <0>; 1434 clock-frequency = <48000000>; 1435 }; 1436 }; 1437
Indexes created Thu Oct 02 01:09:59 GMT 2025