r8a7794.dtsi revision 1.1.1.5
1 /* 2 * Device Tree Source for the r8a7794 SoC 3 * 4 * Copyright (C) 2014 Renesas Electronics Corporation 5 * Copyright (C) 2014 Ulrich Hecht 6 * 7 * This file is licensed under the terms of the GNU General Public License 8 * version 2. This program is licensed "as is" without any warranty of any 9 * kind, whether express or implied. 10 */ 11 12 #include <dt-bindings/clock/r8a7794-cpg-mssr.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/power/r8a7794-sysc.h> 16 17 / { 18 compatible = "renesas,r8a7794"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c7; 31 spi0 = &qspi; 32 vin0 = &vin0; 33 vin1 = &vin1; 34 }; 35 36 /* 37 * The external audio clocks are configured as 0 Hz fixed frequency 38 * clocks by default. 39 * Boards that provide audio clocks should override them. 40 */ 41 audio_clka: audio_clka { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 audio_clkb: audio_clkb { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 audio_clkc: audio_clkc { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <0>; 55 }; 56 57 /* External CAN clock */ 58 can_clk: can { 59 compatible = "fixed-clock"; 60 #clock-cells = <0>; 61 /* This value must be overridden by the board. */ 62 clock-frequency = <0>; 63 }; 64 65 cpus { 66 #address-cells = <1>; 67 #size-cells = <0>; 68 enable-method = "renesas,apmu"; 69 70 cpu0: cpu@0 { 71 device_type = "cpu"; 72 compatible = "arm,cortex-a7"; 73 reg = <0>; 74 clock-frequency = <1000000000>; 75 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 76 power-domains = <&sysc R8A7794_PD_CA7_CPU0>; 77 next-level-cache = <&L2_CA7>; 78 }; 79 80 cpu1: cpu@1 { 81 device_type = "cpu"; 82 compatible = "arm,cortex-a7"; 83 reg = <1>; 84 clock-frequency = <1000000000>; 85 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; 86 power-domains = <&sysc R8A7794_PD_CA7_CPU1>; 87 next-level-cache = <&L2_CA7>; 88 }; 89 90 L2_CA7: cache-controller-0 { 91 compatible = "cache"; 92 power-domains = <&sysc R8A7794_PD_CA7_SCU>; 93 cache-unified; 94 cache-level = <2>; 95 }; 96 }; 97 98 /* External root clock */ 99 extal_clk: extal { 100 compatible = "fixed-clock"; 101 #clock-cells = <0>; 102 /* This value must be overridden by the board. */ 103 clock-frequency = <0>; 104 }; 105 106 /* External SCIF clock */ 107 scif_clk: scif { 108 compatible = "fixed-clock"; 109 #clock-cells = <0>; 110 /* This value must be overridden by the board. */ 111 clock-frequency = <0>; 112 }; 113 114 soc { 115 compatible = "simple-bus"; 116 interrupt-parent = <&gic>; 117 118 #address-cells = <2>; 119 #size-cells = <2>; 120 ranges; 121 122 gpio0: gpio@e6050000 { 123 compatible = "renesas,gpio-r8a7794", 124 "renesas,rcar-gen2-gpio"; 125 reg = <0 0xe6050000 0 0x50>; 126 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 127 #gpio-cells = <2>; 128 gpio-controller; 129 gpio-ranges = <&pfc 0 0 32>; 130 #interrupt-cells = <2>; 131 interrupt-controller; 132 clocks = <&cpg CPG_MOD 912>; 133 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 134 resets = <&cpg 912>; 135 }; 136 137 gpio1: gpio@e6051000 { 138 compatible = "renesas,gpio-r8a7794", 139 "renesas,rcar-gen2-gpio"; 140 reg = <0 0xe6051000 0 0x50>; 141 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 142 #gpio-cells = <2>; 143 gpio-controller; 144 gpio-ranges = <&pfc 0 32 26>; 145 #interrupt-cells = <2>; 146 interrupt-controller; 147 clocks = <&cpg CPG_MOD 911>; 148 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 149 resets = <&cpg 911>; 150 }; 151 152 gpio2: gpio@e6052000 { 153 compatible = "renesas,gpio-r8a7794", 154 "renesas,rcar-gen2-gpio"; 155 reg = <0 0xe6052000 0 0x50>; 156 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 157 #gpio-cells = <2>; 158 gpio-controller; 159 gpio-ranges = <&pfc 0 64 32>; 160 #interrupt-cells = <2>; 161 interrupt-controller; 162 clocks = <&cpg CPG_MOD 910>; 163 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 164 resets = <&cpg 910>; 165 }; 166 167 gpio3: gpio@e6053000 { 168 compatible = "renesas,gpio-r8a7794", 169 "renesas,rcar-gen2-gpio"; 170 reg = <0 0xe6053000 0 0x50>; 171 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 172 #gpio-cells = <2>; 173 gpio-controller; 174 gpio-ranges = <&pfc 0 96 32>; 175 #interrupt-cells = <2>; 176 interrupt-controller; 177 clocks = <&cpg CPG_MOD 909>; 178 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 179 resets = <&cpg 909>; 180 }; 181 182 gpio4: gpio@e6054000 { 183 compatible = "renesas,gpio-r8a7794", 184 "renesas,rcar-gen2-gpio"; 185 reg = <0 0xe6054000 0 0x50>; 186 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 187 #gpio-cells = <2>; 188 gpio-controller; 189 gpio-ranges = <&pfc 0 128 32>; 190 #interrupt-cells = <2>; 191 interrupt-controller; 192 clocks = <&cpg CPG_MOD 908>; 193 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 194 resets = <&cpg 908>; 195 }; 196 197 gpio5: gpio@e6055000 { 198 compatible = "renesas,gpio-r8a7794", 199 "renesas,rcar-gen2-gpio"; 200 reg = <0 0xe6055000 0 0x50>; 201 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 160 28>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 907>; 208 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 209 resets = <&cpg 907>; 210 }; 211 212 gpio6: gpio@e6055400 { 213 compatible = "renesas,gpio-r8a7794", 214 "renesas,rcar-gen2-gpio"; 215 reg = <0 0xe6055400 0 0x50>; 216 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 192 26>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 905>; 223 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 224 resets = <&cpg 905>; 225 }; 226 227 pfc: pin-controller@e6060000 { 228 compatible = "renesas,pfc-r8a7794"; 229 reg = <0 0xe6060000 0 0x11c>; 230 }; 231 232 cpg: clock-controller@e6150000 { 233 compatible = "renesas,r8a7794-cpg-mssr"; 234 reg = <0 0xe6150000 0 0x1000>; 235 clocks = <&extal_clk>, <&usb_extal_clk>; 236 clock-names = "extal", "usb_extal"; 237 #clock-cells = <2>; 238 #power-domain-cells = <0>; 239 #reset-cells = <1>; 240 }; 241 242 apmu@e6151000 { 243 compatible = "renesas,r8a7794-apmu", "renesas,apmu"; 244 reg = <0 0xe6151000 0 0x188>; 245 cpus = <&cpu0 &cpu1>; 246 }; 247 248 rst: reset-controller@e6160000 { 249 compatible = "renesas,r8a7794-rst"; 250 reg = <0 0xe6160000 0 0x0100>; 251 }; 252 253 sysc: system-controller@e6180000 { 254 compatible = "renesas,r8a7794-sysc"; 255 reg = <0 0xe6180000 0 0x0200>; 256 #power-domain-cells = <1>; 257 }; 258 259 irqc0: interrupt-controller@e61c0000 { 260 compatible = "renesas,irqc-r8a7794", "renesas,irqc"; 261 #interrupt-cells = <2>; 262 interrupt-controller; 263 reg = <0 0xe61c0000 0 0x200>; 264 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 265 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 266 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 267 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 268 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 269 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 270 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 271 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 272 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 273 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 274 clocks = <&cpg CPG_MOD 407>; 275 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 276 resets = <&cpg 407>; 277 }; 278 279 ipmmu_sy0: mmu@e6280000 { 280 compatible = "renesas,ipmmu-r8a7794", 281 "renesas,ipmmu-vmsa"; 282 reg = <0 0xe6280000 0 0x1000>; 283 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 284 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 285 #iommu-cells = <1>; 286 status = "disabled"; 287 }; 288 289 ipmmu_sy1: mmu@e6290000 { 290 compatible = "renesas,ipmmu-r8a7794", 291 "renesas,ipmmu-vmsa"; 292 reg = <0 0xe6290000 0 0x1000>; 293 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 294 #iommu-cells = <1>; 295 status = "disabled"; 296 }; 297 298 ipmmu_ds: mmu@e6740000 { 299 compatible = "renesas,ipmmu-r8a7794", 300 "renesas,ipmmu-vmsa"; 301 reg = <0 0xe6740000 0 0x1000>; 302 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 304 #iommu-cells = <1>; 305 status = "disabled"; 306 }; 307 308 ipmmu_mp: mmu@ec680000 { 309 compatible = "renesas,ipmmu-r8a7794", 310 "renesas,ipmmu-vmsa"; 311 reg = <0 0xec680000 0 0x1000>; 312 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 313 #iommu-cells = <1>; 314 status = "disabled"; 315 }; 316 317 ipmmu_mx: mmu@fe951000 { 318 compatible = "renesas,ipmmu-r8a7794", 319 "renesas,ipmmu-vmsa"; 320 reg = <0 0xfe951000 0 0x1000>; 321 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 323 #iommu-cells = <1>; 324 status = "disabled"; 325 }; 326 327 ipmmu_gp: mmu@e62a0000 { 328 compatible = "renesas,ipmmu-r8a7794", 329 "renesas,ipmmu-vmsa"; 330 reg = <0 0xe62a0000 0 0x1000>; 331 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 333 #iommu-cells = <1>; 334 status = "disabled"; 335 }; 336 337 icram0: sram@e63a0000 { 338 compatible = "mmio-sram"; 339 reg = <0 0xe63a0000 0 0x12000>; 340 }; 341 342 icram1: sram@e63c0000 { 343 compatible = "mmio-sram"; 344 reg = <0 0xe63c0000 0 0x1000>; 345 #address-cells = <1>; 346 #size-cells = <1>; 347 ranges = <0 0 0xe63c0000 0x1000>; 348 349 smp-sram@0 { 350 compatible = "renesas,smp-sram"; 351 reg = <0 0x10>; 352 }; 353 }; 354 355 /* The memory map in the User's Manual maps the cores to 356 * bus numbers 357 */ 358 i2c0: i2c@e6508000 { 359 compatible = "renesas,i2c-r8a7794", 360 "renesas,rcar-gen2-i2c"; 361 reg = <0 0xe6508000 0 0x40>; 362 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 363 clocks = <&cpg CPG_MOD 931>; 364 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 365 resets = <&cpg 931>; 366 #address-cells = <1>; 367 #size-cells = <0>; 368 i2c-scl-internal-delay-ns = <6>; 369 status = "disabled"; 370 }; 371 372 i2c1: i2c@e6518000 { 373 compatible = "renesas,i2c-r8a7794", 374 "renesas,rcar-gen2-i2c"; 375 reg = <0 0xe6518000 0 0x40>; 376 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 377 clocks = <&cpg CPG_MOD 930>; 378 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 379 resets = <&cpg 930>; 380 #address-cells = <1>; 381 #size-cells = <0>; 382 i2c-scl-internal-delay-ns = <6>; 383 status = "disabled"; 384 }; 385 386 i2c2: i2c@e6530000 { 387 compatible = "renesas,i2c-r8a7794", 388 "renesas,rcar-gen2-i2c"; 389 reg = <0 0xe6530000 0 0x40>; 390 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 391 clocks = <&cpg CPG_MOD 929>; 392 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 393 resets = <&cpg 929>; 394 #address-cells = <1>; 395 #size-cells = <0>; 396 i2c-scl-internal-delay-ns = <6>; 397 status = "disabled"; 398 }; 399 400 i2c3: i2c@e6540000 { 401 compatible = "renesas,i2c-r8a7794", 402 "renesas,rcar-gen2-i2c"; 403 reg = <0 0xe6540000 0 0x40>; 404 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 405 clocks = <&cpg CPG_MOD 928>; 406 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 407 resets = <&cpg 928>; 408 #address-cells = <1>; 409 #size-cells = <0>; 410 i2c-scl-internal-delay-ns = <6>; 411 status = "disabled"; 412 }; 413 414 i2c4: i2c@e6520000 { 415 compatible = "renesas,i2c-r8a7794", 416 "renesas,rcar-gen2-i2c"; 417 reg = <0 0xe6520000 0 0x40>; 418 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 419 clocks = <&cpg CPG_MOD 927>; 420 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 421 resets = <&cpg 927>; 422 #address-cells = <1>; 423 #size-cells = <0>; 424 i2c-scl-internal-delay-ns = <6>; 425 status = "disabled"; 426 }; 427 428 i2c5: i2c@e6528000 { 429 compatible = "renesas,i2c-r8a7794", 430 "renesas,rcar-gen2-i2c"; 431 reg = <0 0xe6528000 0 0x40>; 432 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 433 clocks = <&cpg CPG_MOD 925>; 434 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 435 resets = <&cpg 925>; 436 #address-cells = <1>; 437 #size-cells = <0>; 438 i2c-scl-internal-delay-ns = <6>; 439 status = "disabled"; 440 }; 441 442 i2c6: i2c@e6500000 { 443 compatible = "renesas,iic-r8a7794", 444 "renesas,rcar-gen2-iic", 445 "renesas,rmobile-iic"; 446 reg = <0 0xe6500000 0 0x425>; 447 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 448 clocks = <&cpg CPG_MOD 318>; 449 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 450 <&dmac1 0x61>, <&dmac1 0x62>; 451 dma-names = "tx", "rx", "tx", "rx"; 452 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 453 resets = <&cpg 318>; 454 #address-cells = <1>; 455 #size-cells = <0>; 456 status = "disabled"; 457 }; 458 459 i2c7: i2c@e6510000 { 460 compatible = "renesas,iic-r8a7794", 461 "renesas,rcar-gen2-iic", 462 "renesas,rmobile-iic"; 463 reg = <0 0xe6510000 0 0x425>; 464 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 465 clocks = <&cpg CPG_MOD 323>; 466 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 467 <&dmac1 0x65>, <&dmac1 0x66>; 468 dma-names = "tx", "rx", "tx", "rx"; 469 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 470 resets = <&cpg 323>; 471 #address-cells = <1>; 472 #size-cells = <0>; 473 status = "disabled"; 474 }; 475 476 hsusb: usb@e6590000 { 477 compatible = "renesas,usbhs-r8a7794", 478 "renesas,rcar-gen2-usbhs"; 479 reg = <0 0xe6590000 0 0x100>; 480 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 481 clocks = <&cpg CPG_MOD 704>; 482 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 483 resets = <&cpg 704>; 484 renesas,buswait = <4>; 485 phys = <&usb0 1>; 486 phy-names = "usb"; 487 status = "disabled"; 488 }; 489 490 usbphy: usb-phy@e6590100 { 491 compatible = "renesas,usb-phy-r8a7794", 492 "renesas,rcar-gen2-usb-phy"; 493 reg = <0 0xe6590100 0 0x100>; 494 #address-cells = <1>; 495 #size-cells = <0>; 496 clocks = <&cpg CPG_MOD 704>; 497 clock-names = "usbhs"; 498 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 499 resets = <&cpg 704>; 500 status = "disabled"; 501 502 usb0: usb-channel@0 { 503 reg = <0>; 504 #phy-cells = <1>; 505 }; 506 usb2: usb-channel@2 { 507 reg = <2>; 508 #phy-cells = <1>; 509 }; 510 }; 511 512 dmac0: dma-controller@e6700000 { 513 compatible = "renesas,dmac-r8a7794", 514 "renesas,rcar-dmac"; 515 reg = <0 0xe6700000 0 0x20000>; 516 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 517 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 518 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 519 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 520 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 522 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 523 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 524 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 525 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 526 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 527 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 529 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 532 interrupt-names = "error", 533 "ch0", "ch1", "ch2", "ch3", 534 "ch4", "ch5", "ch6", "ch7", 535 "ch8", "ch9", "ch10", "ch11", 536 "ch12", "ch13", "ch14"; 537 clocks = <&cpg CPG_MOD 219>; 538 clock-names = "fck"; 539 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 540 resets = <&cpg 219>; 541 #dma-cells = <1>; 542 dma-channels = <15>; 543 }; 544 545 dmac1: dma-controller@e6720000 { 546 compatible = "renesas,dmac-r8a7794", 547 "renesas,rcar-dmac"; 548 reg = <0 0xe6720000 0 0x20000>; 549 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 550 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 551 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 552 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 553 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 554 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 555 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 556 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 557 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 558 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 559 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 560 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 561 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 562 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 563 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 564 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 565 interrupt-names = "error", 566 "ch0", "ch1", "ch2", "ch3", 567 "ch4", "ch5", "ch6", "ch7", 568 "ch8", "ch9", "ch10", "ch11", 569 "ch12", "ch13", "ch14"; 570 clocks = <&cpg CPG_MOD 218>; 571 clock-names = "fck"; 572 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 573 resets = <&cpg 218>; 574 #dma-cells = <1>; 575 dma-channels = <15>; 576 }; 577 578 avb: ethernet@e6800000 { 579 compatible = "renesas,etheravb-r8a7794", 580 "renesas,etheravb-rcar-gen2"; 581 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 582 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 812>; 584 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 585 resets = <&cpg 812>; 586 #address-cells = <1>; 587 #size-cells = <0>; 588 status = "disabled"; 589 }; 590 591 qspi: spi@e6b10000 { 592 compatible = "renesas,qspi-r8a7794", "renesas,qspi"; 593 reg = <0 0xe6b10000 0 0x2c>; 594 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 917>; 596 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 597 <&dmac1 0x17>, <&dmac1 0x18>; 598 dma-names = "tx", "rx", "tx", "rx"; 599 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 600 resets = <&cpg 917>; 601 num-cs = <1>; 602 #address-cells = <1>; 603 #size-cells = <0>; 604 status = "disabled"; 605 }; 606 607 scifa0: serial@e6c40000 { 608 compatible = "renesas,scifa-r8a7794", 609 "renesas,rcar-gen2-scifa", "renesas,scifa"; 610 reg = <0 0xe6c40000 0 64>; 611 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 204>; 613 clock-names = "fck"; 614 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 615 <&dmac1 0x21>, <&dmac1 0x22>; 616 dma-names = "tx", "rx", "tx", "rx"; 617 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 618 resets = <&cpg 204>; 619 status = "disabled"; 620 }; 621 622 scifa1: serial@e6c50000 { 623 compatible = "renesas,scifa-r8a7794", 624 "renesas,rcar-gen2-scifa", "renesas,scifa"; 625 reg = <0 0xe6c50000 0 64>; 626 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 627 clocks = <&cpg CPG_MOD 203>; 628 clock-names = "fck"; 629 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 630 <&dmac1 0x25>, <&dmac1 0x26>; 631 dma-names = "tx", "rx", "tx", "rx"; 632 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 633 resets = <&cpg 203>; 634 status = "disabled"; 635 }; 636 637 scifa2: serial@e6c60000 { 638 compatible = "renesas,scifa-r8a7794", 639 "renesas,rcar-gen2-scifa", "renesas,scifa"; 640 reg = <0 0xe6c60000 0 64>; 641 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 642 clocks = <&cpg CPG_MOD 202>; 643 clock-names = "fck"; 644 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 645 <&dmac1 0x27>, <&dmac1 0x28>; 646 dma-names = "tx", "rx", "tx", "rx"; 647 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 648 resets = <&cpg 202>; 649 status = "disabled"; 650 }; 651 652 scifa3: serial@e6c70000 { 653 compatible = "renesas,scifa-r8a7794", 654 "renesas,rcar-gen2-scifa", "renesas,scifa"; 655 reg = <0 0xe6c70000 0 64>; 656 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 657 clocks = <&cpg CPG_MOD 1106>; 658 clock-names = "fck"; 659 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 660 <&dmac1 0x1b>, <&dmac1 0x1c>; 661 dma-names = "tx", "rx", "tx", "rx"; 662 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 663 resets = <&cpg 1106>; 664 status = "disabled"; 665 }; 666 667 scifa4: serial@e6c78000 { 668 compatible = "renesas,scifa-r8a7794", 669 "renesas,rcar-gen2-scifa", "renesas,scifa"; 670 reg = <0 0xe6c78000 0 64>; 671 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 672 clocks = <&cpg CPG_MOD 1107>; 673 clock-names = "fck"; 674 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 675 <&dmac1 0x1f>, <&dmac1 0x20>; 676 dma-names = "tx", "rx", "tx", "rx"; 677 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 678 resets = <&cpg 1107>; 679 status = "disabled"; 680 }; 681 682 scifa5: serial@e6c80000 { 683 compatible = "renesas,scifa-r8a7794", 684 "renesas,rcar-gen2-scifa", "renesas,scifa"; 685 reg = <0 0xe6c80000 0 64>; 686 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 687 clocks = <&cpg CPG_MOD 1108>; 688 clock-names = "fck"; 689 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 690 <&dmac1 0x23>, <&dmac1 0x24>; 691 dma-names = "tx", "rx", "tx", "rx"; 692 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 693 resets = <&cpg 1108>; 694 status = "disabled"; 695 }; 696 697 scifb0: serial@e6c20000 { 698 compatible = "renesas,scifb-r8a7794", 699 "renesas,rcar-gen2-scifb", "renesas,scifb"; 700 reg = <0 0xe6c20000 0 0x100>; 701 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 702 clocks = <&cpg CPG_MOD 206>; 703 clock-names = "fck"; 704 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 705 <&dmac1 0x3d>, <&dmac1 0x3e>; 706 dma-names = "tx", "rx", "tx", "rx"; 707 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 708 resets = <&cpg 206>; 709 status = "disabled"; 710 }; 711 712 scifb1: serial@e6c30000 { 713 compatible = "renesas,scifb-r8a7794", 714 "renesas,rcar-gen2-scifb", "renesas,scifb"; 715 reg = <0 0xe6c30000 0 0x100>; 716 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 717 clocks = <&cpg CPG_MOD 207>; 718 clock-names = "fck"; 719 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 720 <&dmac1 0x19>, <&dmac1 0x1a>; 721 dma-names = "tx", "rx", "tx", "rx"; 722 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 723 resets = <&cpg 207>; 724 status = "disabled"; 725 }; 726 727 scifb2: serial@e6ce0000 { 728 compatible = "renesas,scifb-r8a7794", 729 "renesas,rcar-gen2-scifb", "renesas,scifb"; 730 reg = <0 0xe6ce0000 0 0x100>; 731 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 732 clocks = <&cpg CPG_MOD 216>; 733 clock-names = "fck"; 734 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 735 <&dmac1 0x1d>, <&dmac1 0x1e>; 736 dma-names = "tx", "rx", "tx", "rx"; 737 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 738 resets = <&cpg 216>; 739 status = "disabled"; 740 }; 741 742 scif0: serial@e6e60000 { 743 compatible = "renesas,scif-r8a7794", 744 "renesas,rcar-gen2-scif", 745 "renesas,scif"; 746 reg = <0 0xe6e60000 0 64>; 747 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 748 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 749 <&scif_clk>; 750 clock-names = "fck", "brg_int", "scif_clk"; 751 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 752 <&dmac1 0x29>, <&dmac1 0x2a>; 753 dma-names = "tx", "rx", "tx", "rx"; 754 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 755 resets = <&cpg 721>; 756 status = "disabled"; 757 }; 758 759 scif1: serial@e6e68000 { 760 compatible = "renesas,scif-r8a7794", 761 "renesas,rcar-gen2-scif", 762 "renesas,scif"; 763 reg = <0 0xe6e68000 0 64>; 764 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 765 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 766 <&scif_clk>; 767 clock-names = "fck", "brg_int", "scif_clk"; 768 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 769 <&dmac1 0x2d>, <&dmac1 0x2e>; 770 dma-names = "tx", "rx", "tx", "rx"; 771 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 772 resets = <&cpg 720>; 773 status = "disabled"; 774 }; 775 776 scif2: serial@e6e58000 { 777 compatible = "renesas,scif-r8a7794", 778 "renesas,rcar-gen2-scif", "renesas,scif"; 779 reg = <0 0xe6e58000 0 64>; 780 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 781 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 782 <&scif_clk>; 783 clock-names = "fck", "brg_int", "scif_clk"; 784 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 785 <&dmac1 0x2b>, <&dmac1 0x2c>; 786 dma-names = "tx", "rx", "tx", "rx"; 787 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 788 resets = <&cpg 719>; 789 status = "disabled"; 790 }; 791 792 scif3: serial@e6ea8000 { 793 compatible = "renesas,scif-r8a7794", 794 "renesas,rcar-gen2-scif", "renesas,scif"; 795 reg = <0 0xe6ea8000 0 64>; 796 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 797 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 798 <&scif_clk>; 799 clock-names = "fck", "brg_int", "scif_clk"; 800 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 801 <&dmac1 0x2f>, <&dmac1 0x30>; 802 dma-names = "tx", "rx", "tx", "rx"; 803 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 804 resets = <&cpg 718>; 805 status = "disabled"; 806 }; 807 808 scif4: serial@e6ee0000 { 809 compatible = "renesas,scif-r8a7794", 810 "renesas,rcar-gen2-scif", "renesas,scif"; 811 reg = <0 0xe6ee0000 0 64>; 812 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 814 <&scif_clk>; 815 clock-names = "fck", "brg_int", "scif_clk"; 816 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 817 <&dmac1 0xfb>, <&dmac1 0xfc>; 818 dma-names = "tx", "rx", "tx", "rx"; 819 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 820 resets = <&cpg 715>; 821 status = "disabled"; 822 }; 823 824 scif5: serial@e6ee8000 { 825 compatible = "renesas,scif-r8a7794", 826 "renesas,rcar-gen2-scif", "renesas,scif"; 827 reg = <0 0xe6ee8000 0 64>; 828 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 829 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 830 <&scif_clk>; 831 clock-names = "fck", "brg_int", "scif_clk"; 832 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 833 <&dmac1 0xfd>, <&dmac1 0xfe>; 834 dma-names = "tx", "rx", "tx", "rx"; 835 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 836 resets = <&cpg 714>; 837 status = "disabled"; 838 }; 839 840 hscif0: serial@e62c0000 { 841 compatible = "renesas,hscif-r8a7794", 842 "renesas,rcar-gen2-hscif", "renesas,hscif"; 843 reg = <0 0xe62c0000 0 96>; 844 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 845 clocks = <&cpg CPG_MOD 717>, 846 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 847 clock-names = "fck", "brg_int", "scif_clk"; 848 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 849 <&dmac1 0x39>, <&dmac1 0x3a>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 852 resets = <&cpg 717>; 853 status = "disabled"; 854 }; 855 856 hscif1: serial@e62c8000 { 857 compatible = "renesas,hscif-r8a7794", 858 "renesas,rcar-gen2-hscif", "renesas,hscif"; 859 reg = <0 0xe62c8000 0 96>; 860 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 861 clocks = <&cpg CPG_MOD 716>, 862 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; 863 clock-names = "fck", "brg_int", "scif_clk"; 864 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 865 <&dmac1 0x4d>, <&dmac1 0x4e>; 866 dma-names = "tx", "rx", "tx", "rx"; 867 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 868 resets = <&cpg 716>; 869 status = "disabled"; 870 }; 871 872 hscif2: serial@e62d0000 { 873 compatible = "renesas,hscif-r8a7794", 874 "renesas,rcar-gen2-hscif", "renesas,hscif"; 875 reg = <0 0xe62d0000 0 96>; 876 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 877 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, 878 <&scif_clk>; 879 clock-names = "fck", "brg_int", "scif_clk"; 880 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 881 <&dmac1 0x3b>, <&dmac1 0x3c>; 882 dma-names = "tx", "rx", "tx", "rx"; 883 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 884 resets = <&cpg 713>; 885 status = "disabled"; 886 }; 887 888 can0: can@e6e80000 { 889 compatible = "renesas,can-r8a7794", 890 "renesas,rcar-gen2-can"; 891 reg = <0 0xe6e80000 0 0x1000>; 892 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 894 <&can_clk>; 895 clock-names = "clkp1", "clkp2", "can_clk"; 896 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 897 resets = <&cpg 916>; 898 status = "disabled"; 899 }; 900 901 can1: can@e6e88000 { 902 compatible = "renesas,can-r8a7794", 903 "renesas,rcar-gen2-can"; 904 reg = <0 0xe6e88000 0 0x1000>; 905 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 906 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, 907 <&can_clk>; 908 clock-names = "clkp1", "clkp2", "can_clk"; 909 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 910 resets = <&cpg 915>; 911 status = "disabled"; 912 }; 913 914 vin0: video@e6ef0000 { 915 compatible = "renesas,vin-r8a7794", 916 "renesas,rcar-gen2-vin"; 917 reg = <0 0xe6ef0000 0 0x1000>; 918 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 919 clocks = <&cpg CPG_MOD 811>; 920 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 921 resets = <&cpg 811>; 922 status = "disabled"; 923 }; 924 925 vin1: video@e6ef1000 { 926 compatible = "renesas,vin-r8a7794", 927 "renesas,rcar-gen2-vin"; 928 reg = <0 0xe6ef1000 0 0x1000>; 929 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 930 clocks = <&cpg CPG_MOD 810>; 931 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 932 resets = <&cpg 810>; 933 status = "disabled"; 934 }; 935 936 rcar_sound: sound@ec500000 { 937 /* 938 * #sound-dai-cells is required 939 * 940 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 941 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 942 */ 943 compatible = "renesas,rcar_sound-r8a7794", 944 "renesas,rcar_sound-gen2"; 945 reg = <0 0xec500000 0 0x1000>, /* SCU */ 946 <0 0xec5a0000 0 0x100>, /* ADG */ 947 <0 0xec540000 0 0x1000>, /* SSIU */ 948 <0 0xec541000 0 0x280>, /* SSI */ 949 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 950 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 951 952 clocks = <&cpg CPG_MOD 1005>, 953 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 954 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 955 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 956 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 957 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 958 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 959 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 960 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 961 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 962 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 963 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 964 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 965 <&cpg CPG_CORE R8A7794_CLK_M2>; 966 clock-names = "ssi-all", 967 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 968 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 969 "ssi.1", "ssi.0", 970 "src.6", "src.5", "src.4", "src.3", 971 "src.2", "src.1", 972 "ctu.0", "ctu.1", 973 "mix.0", "mix.1", 974 "dvc.0", "dvc.1", 975 "clk_a", "clk_b", "clk_c", "clk_i"; 976 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 977 resets = <&cpg 1005>, 978 <&cpg 1006>, <&cpg 1007>, 979 <&cpg 1008>, <&cpg 1009>, 980 <&cpg 1010>, <&cpg 1011>, 981 <&cpg 1012>, <&cpg 1013>, 982 <&cpg 1014>, <&cpg 1015>; 983 reset-names = "ssi-all", 984 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 985 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 986 "ssi.1", "ssi.0"; 987 988 status = "disabled"; 989 990 rcar_sound,dvc { 991 dvc0: dvc-0 { 992 dmas = <&audma0 0xbc>; 993 dma-names = "tx"; 994 }; 995 dvc1: dvc-1 { 996 dmas = <&audma0 0xbe>; 997 dma-names = "tx"; 998 }; 999 }; 1000 1001 rcar_sound,mix { 1002 mix0: mix-0 { }; 1003 mix1: mix-1 { }; 1004 }; 1005 1006 rcar_sound,ctu { 1007 ctu00: ctu-0 { }; 1008 ctu01: ctu-1 { }; 1009 ctu02: ctu-2 { }; 1010 ctu03: ctu-3 { }; 1011 ctu10: ctu-4 { }; 1012 ctu11: ctu-5 { }; 1013 ctu12: ctu-6 { }; 1014 ctu13: ctu-7 { }; 1015 }; 1016 1017 rcar_sound,src { 1018 src-0 { 1019 status = "disabled"; 1020 }; 1021 src1: src-1 { 1022 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1023 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1024 dma-names = "rx", "tx"; 1025 }; 1026 src2: src-2 { 1027 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1028 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1029 dma-names = "rx", "tx"; 1030 }; 1031 src3: src-3 { 1032 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1033 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1034 dma-names = "rx", "tx"; 1035 }; 1036 src4: src-4 { 1037 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1038 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1039 dma-names = "rx", "tx"; 1040 }; 1041 src5: src-5 { 1042 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1043 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1044 dma-names = "rx", "tx"; 1045 }; 1046 src6: src-6 { 1047 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1048 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1049 dma-names = "rx", "tx"; 1050 }; 1051 }; 1052 1053 rcar_sound,ssi { 1054 ssi0: ssi-0 { 1055 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1056 dmas = <&audma0 0x01>, <&audma0 0x02>, 1057 <&audma0 0x15>, <&audma0 0x16>; 1058 dma-names = "rx", "tx", "rxu", "txu"; 1059 }; 1060 ssi1: ssi-1 { 1061 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1062 dmas = <&audma0 0x03>, <&audma0 0x04>, 1063 <&audma0 0x49>, <&audma0 0x4a>; 1064 dma-names = "rx", "tx", "rxu", "txu"; 1065 }; 1066 ssi2: ssi-2 { 1067 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1068 dmas = <&audma0 0x05>, <&audma0 0x06>, 1069 <&audma0 0x63>, <&audma0 0x64>; 1070 dma-names = "rx", "tx", "rxu", "txu"; 1071 }; 1072 ssi3: ssi-3 { 1073 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1074 dmas = <&audma0 0x07>, <&audma0 0x08>, 1075 <&audma0 0x6f>, <&audma0 0x70>; 1076 dma-names = "rx", "tx", "rxu", "txu"; 1077 }; 1078 ssi4: ssi-4 { 1079 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1080 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1081 <&audma0 0x71>, <&audma0 0x72>; 1082 dma-names = "rx", "tx", "rxu", "txu"; 1083 }; 1084 ssi5: ssi-5 { 1085 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1086 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1087 <&audma0 0x73>, <&audma0 0x74>; 1088 dma-names = "rx", "tx", "rxu", "txu"; 1089 }; 1090 ssi6: ssi-6 { 1091 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1092 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1093 <&audma0 0x75>, <&audma0 0x76>; 1094 dma-names = "rx", "tx", "rxu", "txu"; 1095 }; 1096 ssi7: ssi-7 { 1097 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1098 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1099 <&audma0 0x79>, <&audma0 0x7a>; 1100 dma-names = "rx", "tx", "rxu", "txu"; 1101 }; 1102 ssi8: ssi-8 { 1103 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1104 dmas = <&audma0 0x11>, <&audma0 0x12>, 1105 <&audma0 0x7b>, <&audma0 0x7c>; 1106 dma-names = "rx", "tx", "rxu", "txu"; 1107 }; 1108 ssi9: ssi-9 { 1109 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1110 dmas = <&audma0 0x13>, <&audma0 0x14>, 1111 <&audma0 0x7d>, <&audma0 0x7e>; 1112 dma-names = "rx", "tx", "rxu", "txu"; 1113 }; 1114 }; 1115 }; 1116 1117 audma0: dma-controller@ec700000 { 1118 compatible = "renesas,dmac-r8a7794", 1119 "renesas,rcar-dmac"; 1120 reg = <0 0xec700000 0 0x10000>; 1121 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1122 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1123 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1124 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1125 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1126 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1127 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1128 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1129 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1130 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1131 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1132 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1133 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1134 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1135 interrupt-names = "error", 1136 "ch0", "ch1", "ch2", "ch3", "ch4", 1137 "ch5", "ch6", "ch7", "ch8", "ch9", 1138 "ch10", "ch11", 1139 "ch12"; 1140 clocks = <&cpg CPG_MOD 502>; 1141 clock-names = "fck"; 1142 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1143 resets = <&cpg 502>; 1144 #dma-cells = <1>; 1145 dma-channels = <13>; 1146 }; 1147 1148 pci0: pci@ee090000 { 1149 compatible = "renesas,pci-r8a7794", 1150 "renesas,pci-rcar-gen2"; 1151 device_type = "pci"; 1152 reg = <0 0xee090000 0 0xc00>, 1153 <0 0xee080000 0 0x1100>; 1154 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1155 clocks = <&cpg CPG_MOD 703>; 1156 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1157 resets = <&cpg 703>; 1158 status = "disabled"; 1159 1160 bus-range = <0 0>; 1161 #address-cells = <3>; 1162 #size-cells = <2>; 1163 #interrupt-cells = <1>; 1164 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1165 interrupt-map-mask = <0xff00 0 0 0x7>; 1166 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1167 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1168 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1169 1170 usb@1,0 { 1171 reg = <0x800 0 0 0 0>; 1172 phys = <&usb0 0>; 1173 phy-names = "usb"; 1174 }; 1175 1176 usb@2,0 { 1177 reg = <0x1000 0 0 0 0>; 1178 phys = <&usb0 0>; 1179 phy-names = "usb"; 1180 }; 1181 }; 1182 1183 pci1: pci@ee0d0000 { 1184 compatible = "renesas,pci-r8a7794", 1185 "renesas,pci-rcar-gen2"; 1186 device_type = "pci"; 1187 reg = <0 0xee0d0000 0 0xc00>, 1188 <0 0xee0c0000 0 0x1100>; 1189 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1190 clocks = <&cpg CPG_MOD 703>; 1191 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1192 resets = <&cpg 703>; 1193 status = "disabled"; 1194 1195 bus-range = <1 1>; 1196 #address-cells = <3>; 1197 #size-cells = <2>; 1198 #interrupt-cells = <1>; 1199 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1200 interrupt-map-mask = <0xff00 0 0 0x7>; 1201 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1202 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1203 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1204 1205 usb@1,0 { 1206 reg = <0x10800 0 0 0 0>; 1207 phys = <&usb2 0>; 1208 phy-names = "usb"; 1209 }; 1210 1211 usb@2,0 { 1212 reg = <0x11000 0 0 0 0>; 1213 phys = <&usb2 0>; 1214 phy-names = "usb"; 1215 }; 1216 }; 1217 1218 sdhi0: sd@ee100000 { 1219 compatible = "renesas,sdhi-r8a7794", 1220 "renesas,rcar-gen2-sdhi"; 1221 reg = <0 0xee100000 0 0x328>; 1222 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1223 clocks = <&cpg CPG_MOD 314>; 1224 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1225 <&dmac1 0xcd>, <&dmac1 0xce>; 1226 dma-names = "tx", "rx", "tx", "rx"; 1227 max-frequency = <195000000>; 1228 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1229 resets = <&cpg 314>; 1230 status = "disabled"; 1231 }; 1232 1233 sdhi1: sd@ee140000 { 1234 compatible = "renesas,sdhi-r8a7794", 1235 "renesas,rcar-gen2-sdhi"; 1236 reg = <0 0xee140000 0 0x100>; 1237 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1238 clocks = <&cpg CPG_MOD 312>; 1239 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1240 <&dmac1 0xc1>, <&dmac1 0xc2>; 1241 dma-names = "tx", "rx", "tx", "rx"; 1242 max-frequency = <97500000>; 1243 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1244 resets = <&cpg 312>; 1245 status = "disabled"; 1246 }; 1247 1248 sdhi2: sd@ee160000 { 1249 compatible = "renesas,sdhi-r8a7794", 1250 "renesas,rcar-gen2-sdhi"; 1251 reg = <0 0xee160000 0 0x100>; 1252 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1253 clocks = <&cpg CPG_MOD 311>; 1254 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1255 <&dmac1 0xd3>, <&dmac1 0xd4>; 1256 dma-names = "tx", "rx", "tx", "rx"; 1257 max-frequency = <97500000>; 1258 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1259 resets = <&cpg 311>; 1260 status = "disabled"; 1261 }; 1262 1263 mmcif0: mmc@ee200000 { 1264 compatible = "renesas,mmcif-r8a7794", 1265 "renesas,sh-mmcif"; 1266 reg = <0 0xee200000 0 0x80>; 1267 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1268 clocks = <&cpg CPG_MOD 315>; 1269 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1270 <&dmac1 0xd1>, <&dmac1 0xd2>; 1271 dma-names = "tx", "rx", "tx", "rx"; 1272 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1273 resets = <&cpg 315>; 1274 reg-io-width = <4>; 1275 status = "disabled"; 1276 }; 1277 1278 ether: ethernet@ee700000 { 1279 compatible = "renesas,ether-r8a7794", 1280 "renesas,rcar-gen2-ether"; 1281 reg = <0 0xee700000 0 0x400>; 1282 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 813>; 1284 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1285 resets = <&cpg 813>; 1286 phy-mode = "rmii"; 1287 #address-cells = <1>; 1288 #size-cells = <0>; 1289 status = "disabled"; 1290 }; 1291 1292 gic: interrupt-controller@f1001000 { 1293 compatible = "arm,gic-400"; 1294 #interrupt-cells = <3>; 1295 #address-cells = <0>; 1296 interrupt-controller; 1297 reg = <0 0xf1001000 0 0x1000>, 1298 <0 0xf1002000 0 0x2000>, 1299 <0 0xf1004000 0 0x2000>, 1300 <0 0xf1006000 0 0x2000>; 1301 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1302 clocks = <&cpg CPG_MOD 408>; 1303 clock-names = "clk"; 1304 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1305 resets = <&cpg 408>; 1306 }; 1307 1308 vsp@fe928000 { 1309 compatible = "renesas,vsp1"; 1310 reg = <0 0xfe928000 0 0x8000>; 1311 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1312 clocks = <&cpg CPG_MOD 131>; 1313 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1314 resets = <&cpg 131>; 1315 }; 1316 1317 vsp@fe930000 { 1318 compatible = "renesas,vsp1"; 1319 reg = <0 0xfe930000 0 0x8000>; 1320 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 128>; 1322 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1323 resets = <&cpg 128>; 1324 }; 1325 1326 du: display@feb00000 { 1327 compatible = "renesas,du-r8a7794"; 1328 reg = <0 0xfeb00000 0 0x40000>; 1329 reg-names = "du"; 1330 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1331 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1332 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1333 clock-names = "du.0", "du.1"; 1334 status = "disabled"; 1335 1336 ports { 1337 #address-cells = <1>; 1338 #size-cells = <0>; 1339 1340 port@0 { 1341 reg = <0>; 1342 du_out_rgb0: endpoint { 1343 }; 1344 }; 1345 port@1 { 1346 reg = <1>; 1347 du_out_rgb1: endpoint { 1348 }; 1349 }; 1350 }; 1351 }; 1352 1353 prr: chipid@ff000044 { 1354 compatible = "renesas,prr"; 1355 reg = <0 0xff000044 0 4>; 1356 }; 1357 1358 cmt0: timer@ffca0000 { 1359 compatible = "renesas,r8a7794-cmt0", 1360 "renesas,rcar-gen2-cmt0"; 1361 reg = <0 0xffca0000 0 0x1004>; 1362 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1363 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1364 clocks = <&cpg CPG_MOD 124>; 1365 clock-names = "fck"; 1366 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1367 resets = <&cpg 124>; 1368 1369 status = "disabled"; 1370 }; 1371 1372 cmt1: timer@e6130000 { 1373 compatible = "renesas,r8a7794-cmt1", 1374 "renesas,rcar-gen2-cmt1"; 1375 reg = <0 0xe6130000 0 0x1004>; 1376 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1377 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1378 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1379 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1380 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1381 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1382 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1383 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1384 clocks = <&cpg CPG_MOD 329>; 1385 clock-names = "fck"; 1386 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; 1387 resets = <&cpg 329>; 1388 1389 status = "disabled"; 1390 }; 1391 }; 1392 1393 timer { 1394 compatible = "arm,armv7-timer"; 1395 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1396 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1397 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1398 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1399 }; 1400 1401 /* External USB clock - can be overridden by the board */ 1402 usb_extal_clk: usb_extal { 1403 compatible = "fixed-clock"; 1404 #clock-cells = <0>; 1405 clock-frequency = <48000000>; 1406 }; 1407 }; 1408
Indexes created Thu Oct 30 03:10:01 GMT 2025