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      1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2 /*
      3  * Device Tree file for Freescale LS2080A RDB Board.
      4  *
      5  * Copyright 2016 Freescale Semiconductor, Inc.
      6  * Copyright 2017-2020 NXP
      7  *
      8  * Abhimanyu Saini <abhimanyu.saini (a] nxp.com>
      9  *
     10  */
     11 
     12 &esdhc {
     13 	status = "okay";
     14 };
     15 
     16 &ifc {
     17 	status = "okay";
     18 	#address-cells = <2>;
     19 	#size-cells = <1>;
     20 	ranges = <0x0 0x0 0x5 0x80000000 0x08000000
     21 		  0x2 0x0 0x5 0x30000000 0x00010000
     22 		  0x3 0x0 0x5 0x20000000 0x00010000>;
     23 
     24 	nor@0,0 {
     25 		#address-cells = <1>;
     26 		#size-cells = <1>;
     27 		compatible = "cfi-flash";
     28 		reg = <0x0 0x0 0x8000000>;
     29 		bank-width = <2>;
     30 		device-width = <1>;
     31 	};
     32 
     33 	nand@2,0 {
     34 	     compatible = "fsl,ifc-nand";
     35 	     reg = <0x2 0x0 0x10000>;
     36 	};
     37 
     38 	cpld@3,0 {
     39 	     reg = <0x3 0x0 0x10000>;
     40 	     compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
     41 	};
     42 
     43 };
     44 
     45 &i2c0 {
     46 	status = "okay";
     47 	pca9547@75 {
     48 		compatible = "nxp,pca9547";
     49 		reg = <0x75>;
     50 		#address-cells = <1>;
     51 		#size-cells = <0>;
     52 		i2c@1 {
     53 			#address-cells = <1>;
     54 			#size-cells = <0>;
     55 			reg = <0x01>;
     56 			rtc@68 {
     57 				compatible = "dallas,ds3232";
     58 				reg = <0x68>;
     59 				/* IRQ_RTC_B -> IRQ06, active low */
     60 				interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
     61 			};
     62 		};
     63 
     64 		i2c@2 {
     65 			#address-cells = <1>;
     66 			#size-cells = <0>;
     67 			reg = <0x02>;
     68 
     69 			ina220@40 {
     70 				compatible = "ti,ina220";
     71 				reg = <0x40>;
     72 				shunt-resistor = <500>;
     73 			};
     74 		};
     75 
     76 		i2c@3 {
     77 			#address-cells = <1>;
     78 			#size-cells = <0>;
     79 			reg = <0x3>;
     80 
     81 			adt7481@4c {
     82 				compatible = "adi,adt7461";
     83 				reg = <0x4c>;
     84 			};
     85 		};
     86 	};
     87 };
     88 
     89 &i2c1 {
     90 	status = "disabled";
     91 };
     92 
     93 &i2c2 {
     94 	status = "disabled";
     95 };
     96 
     97 &i2c3 {
     98 	status = "disabled";
     99 };
    100 
    101 &dspi {
    102 	status = "okay";
    103 	dflash0: n25q512a@0 {
    104 		#address-cells = <1>;
    105 		#size-cells = <1>;
    106 		compatible = "st,m25p80";
    107 		spi-max-frequency = <3000000>;
    108 		reg = <0>;
    109 	};
    110 };
    111 
    112 &qspi {
    113 	status = "okay";
    114 
    115 	s25fs512s0: flash@0 {
    116 		#address-cells = <1>;
    117 		#size-cells = <1>;
    118 		compatible = "jedec,spi-nor";
    119 		spi-max-frequency = <50000000>;
    120 		reg = <0>;
    121 	};
    122 };
    123 
    124 &sata0 {
    125 	status = "okay";
    126 };
    127 
    128 &sata1 {
    129 	status = "okay";
    130 };
    131 
    132 &usb0 {
    133 	status = "okay";
    134 };
    135 
    136 &usb1 {
    137 	status = "okay";
    138 };
    139