Home | History | Annotate | Line # | Download | only in freescale 
      1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2 /*
      3  * Copyright (C) 2021 PHYTEC Messtechnik GmbH
      4  * Author: Jens Lang <j.lang (a] phytec.de>
      5  *
      6  * Tauri-L RS232 + RS485:
      7  *  - GPIO3_20 uart4_rs485_en needs to be driven high (active)
      8  *  - GPIO3_25 RS485_DE Driver enable
      9  */
     10 
     11 #include <dt-bindings/clock/imx8mm-clock.h>
     12 #include <dt-bindings/gpio/gpio.h>
     13 #include "imx8mm-pinfunc.h"
     14 
     15 /dts-v1/;
     16 /plugin/;
     17 
     18 &gpio3 {
     19 	pinctrl-names = "default";
     20 	pinctrl-0 = <&pinctrl_gpio3_hog>;
     21 
     22 	uart4-rs485-en-hog {
     23 		gpio-hog;
     24 		gpios = <20 GPIO_ACTIVE_HIGH>;
     25 		output-high;
     26 		line-name = "uart4_rs485_en";
     27 	};
     28 };
     29 
     30 /* UART2 - RS232  */
     31 &uart2 {
     32 	pinctrl-names = "default";
     33 	pinctrl-0 = <&pinctrl_uart2>;
     34 	assigned-clocks = <&clk IMX8MM_CLK_UART2>;
     35 	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
     36 	status = "okay";
     37 };
     38 
     39 /* UART4 - RS485  */
     40 &uart4 {
     41 	pinctrl-names = "default";
     42 	pinctrl-0 = <&pinctrl_uart4>;
     43 	assigned-clocks = <&clk IMX8MM_CLK_UART4>;
     44 	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
     45 	rts-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
     46 	linux,rs485-enabled-at-boot-time;
     47 	status = "okay";
     48 };
     49 
     50 &iomuxc {
     51 	pinctrl_gpio3_hog: gpio3hoggrp {
     52 		fsl,pins = <
     53 			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20	0x49
     54 		>;
     55 	};
     56 
     57 	pinctrl_uart2: uart2grp {
     58 		fsl,pins = <
     59 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x00
     60 			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX	0x00
     61 		>;
     62 	};
     63 
     64 	pinctrl_uart4: uart4grp {
     65 		fsl,pins = <
     66 			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX	0x49
     67 			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX	0x49
     68 			MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x49
     69 		>;
     70 	};
     71 };
     72