1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar (a] mentor.com> 4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel (a] mentor.com> 5 */ 6 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include "rk3399.dtsi" 11 #include "rk3399-opp.dtsi" 12 13 / { 14 aliases { 15 mmc0 = &sdmmc; 16 mmc1 = &sdhci; 17 }; 18 19 chosen { 20 stdout-path = "serial2:1500000n8"; 21 }; 22 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; 27 #clock-cells = <0>; 28 }; 29 30 sdio_pwrseq: sdio-pwrseq { 31 compatible = "mmc-pwrseq-simple"; 32 clocks = <&rk808 1>; 33 clock-names = "ext_clock"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&wifi_enable_h>; 36 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 37 }; 38 39 vcc12v_dcin: dc-12v { 40 compatible = "regulator-fixed"; 41 regulator-name = "vcc12v_dcin"; 42 regulator-always-on; 43 regulator-boot-on; 44 regulator-min-microvolt = <12000000>; 45 regulator-max-microvolt = <12000000>; 46 }; 47 48 vcc5v0_sys: vcc-sys { 49 compatible = "regulator-fixed"; 50 regulator-name = "vcc5v0_sys"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <5000000>; 54 regulator-max-microvolt = <5000000>; 55 vin-supply = <&vcc12v_dcin>; 56 }; 57 58 vcc_0v9: vcc-0v9 { 59 compatible = "regulator-fixed"; 60 regulator-name = "vcc_0v9"; 61 regulator-always-on; 62 regulator-boot-on; 63 regulator-min-microvolt = <900000>; 64 regulator-max-microvolt = <900000>; 65 vin-supply = <&vcc3v3_sys>; 66 }; 67 68 vcc3v3_pcie: vcc3v3-pcie-regulator { 69 compatible = "regulator-fixed"; 70 enable-active-high; 71 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 72 pinctrl-names = "default"; 73 pinctrl-0 = <&pcie_pwr_en>; 74 regulator-name = "vcc3v3_pcie"; 75 regulator-always-on; 76 regulator-boot-on; 77 vin-supply = <&vcc5v0_sys>; 78 }; 79 80 vcc3v3_sys: vcc3v3-sys { 81 compatible = "regulator-fixed"; 82 regulator-name = "vcc3v3_sys"; 83 regulator-always-on; 84 regulator-boot-on; 85 regulator-min-microvolt = <3300000>; 86 regulator-max-microvolt = <3300000>; 87 vin-supply = <&vcc5v0_sys>; 88 }; 89 90 vcc5v0_host: vcc5v0-host-regulator { 91 compatible = "regulator-fixed"; 92 enable-active-high; 93 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&vcc5v0_host_en>; 96 regulator-name = "vcc5v0_host"; 97 regulator-always-on; 98 vin-supply = <&vcc5v0_sys>; 99 }; 100 101 vcc5v0_typec: vcc5v0-typec-regulator { 102 compatible = "regulator-fixed"; 103 enable-active-high; 104 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&vcc5v0_typec_en>; 107 regulator-name = "vcc5v0_typec"; 108 regulator-always-on; 109 vin-supply = <&vcc5v0_sys>; 110 }; 111 112 vcc_lan: vcc3v3-phy-regulator { 113 compatible = "regulator-fixed"; 114 regulator-name = "vcc_lan"; 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <3300000>; 118 regulator-max-microvolt = <3300000>; 119 }; 120 121 vdd_log: vdd-log { 122 compatible = "pwm-regulator"; 123 pwms = <&pwm2 0 25000 1>; 124 regulator-name = "vdd_log"; 125 regulator-always-on; 126 regulator-boot-on; 127 regulator-min-microvolt = <800000>; 128 regulator-max-microvolt = <1400000>; 129 vin-supply = <&vcc5v0_sys>; 130 }; 131 }; 132 133 &cpu_l0 { 134 cpu-supply = <&vdd_cpu_l>; 135 }; 136 137 &cpu_l1 { 138 cpu-supply = <&vdd_cpu_l>; 139 }; 140 141 &cpu_l2 { 142 cpu-supply = <&vdd_cpu_l>; 143 }; 144 145 &cpu_l3 { 146 cpu-supply = <&vdd_cpu_l>; 147 }; 148 149 &cpu_b0 { 150 cpu-supply = <&vdd_cpu_b>; 151 }; 152 153 &cpu_b1 { 154 cpu-supply = <&vdd_cpu_b>; 155 }; 156 157 &emmc_phy { 158 status = "okay"; 159 }; 160 161 &gmac { 162 assigned-clocks = <&cru SCLK_RMII_SRC>; 163 assigned-clock-parents = <&clkin_gmac>; 164 clock_in_out = "input"; 165 phy-supply = <&vcc_lan>; 166 phy-mode = "rgmii"; 167 pinctrl-names = "default"; 168 pinctrl-0 = <&rgmii_pins>; 169 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 170 snps,reset-active-low; 171 snps,reset-delays-us = <0 10000 50000>; 172 tx_delay = <0x28>; 173 rx_delay = <0x11>; 174 status = "okay"; 175 }; 176 177 &gpu { 178 mali-supply = <&vdd_gpu>; 179 status = "okay"; 180 }; 181 182 &hdmi { 183 ddc-i2c-bus = <&i2c3>; 184 pinctrl-names = "default"; 185 pinctrl-0 = <&hdmi_cec>; 186 status = "okay"; 187 }; 188 189 &hdmi_sound { 190 status = "okay"; 191 }; 192 193 &i2c0 { 194 clock-frequency = <400000>; 195 i2c-scl-rising-time-ns = <168>; 196 i2c-scl-falling-time-ns = <4>; 197 status = "okay"; 198 199 rk808: pmic@1b { 200 compatible = "rockchip,rk808"; 201 reg = <0x1b>; 202 interrupt-parent = <&gpio1>; 203 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 204 #clock-cells = <1>; 205 clock-output-names = "xin32k", "rk808-clkout2"; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pmic_int_l>; 208 rockchip,system-power-controller; 209 wakeup-source; 210 211 vcc1-supply = <&vcc5v0_sys>; 212 vcc2-supply = <&vcc5v0_sys>; 213 vcc3-supply = <&vcc5v0_sys>; 214 vcc4-supply = <&vcc5v0_sys>; 215 vcc6-supply = <&vcc5v0_sys>; 216 vcc7-supply = <&vcc5v0_sys>; 217 vcc8-supply = <&vcc3v3_sys>; 218 vcc9-supply = <&vcc5v0_sys>; 219 vcc10-supply = <&vcc5v0_sys>; 220 vcc11-supply = <&vcc5v0_sys>; 221 vcc12-supply = <&vcc3v3_sys>; 222 vddio-supply = <&vcc_1v8>; 223 224 regulators { 225 vdd_center: DCDC_REG1 { 226 regulator-name = "vdd_center"; 227 regulator-always-on; 228 regulator-boot-on; 229 regulator-min-microvolt = <750000>; 230 regulator-max-microvolt = <1350000>; 231 regulator-ramp-delay = <6001>; 232 regulator-state-mem { 233 regulator-off-in-suspend; 234 }; 235 }; 236 237 vdd_cpu_l: DCDC_REG2 { 238 regulator-name = "vdd_cpu_l"; 239 regulator-always-on; 240 regulator-boot-on; 241 regulator-min-microvolt = <750000>; 242 regulator-max-microvolt = <1350000>; 243 regulator-ramp-delay = <6001>; 244 regulator-state-mem { 245 regulator-off-in-suspend; 246 }; 247 }; 248 249 vcc_ddr: DCDC_REG3 { 250 regulator-name = "vcc_ddr"; 251 regulator-always-on; 252 regulator-boot-on; 253 regulator-state-mem { 254 regulator-on-in-suspend; 255 }; 256 }; 257 258 vcc_1v8: DCDC_REG4 { 259 regulator-name = "vcc_1v8"; 260 regulator-always-on; 261 regulator-boot-on; 262 regulator-min-microvolt = <1800000>; 263 regulator-max-microvolt = <1800000>; 264 regulator-state-mem { 265 regulator-on-in-suspend; 266 regulator-suspend-microvolt = <1800000>; 267 }; 268 }; 269 270 vcc1v8_codec: LDO_REG1 { 271 regulator-name = "vcc1v8_codec"; 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-min-microvolt = <1800000>; 275 regulator-max-microvolt = <1800000>; 276 regulator-state-mem { 277 regulator-off-in-suspend; 278 }; 279 }; 280 281 vcc1v8_hdmi: LDO_REG2 { 282 regulator-name = "vcc1v8_hdmi"; 283 regulator-always-on; 284 regulator-boot-on; 285 regulator-min-microvolt = <1800000>; 286 regulator-max-microvolt = <1800000>; 287 regulator-state-mem { 288 regulator-off-in-suspend; 289 }; 290 }; 291 292 vcca_1v8: LDO_REG3 { 293 regulator-name = "vcca_1v8"; 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-min-microvolt = <1800000>; 297 regulator-max-microvolt = <1800000>; 298 regulator-state-mem { 299 regulator-on-in-suspend; 300 regulator-suspend-microvolt = <1800000>; 301 }; 302 }; 303 304 vcc_sdio: LDO_REG4 { 305 regulator-name = "vcc_sdio"; 306 regulator-always-on; 307 regulator-boot-on; 308 regulator-min-microvolt = <3000000>; 309 regulator-max-microvolt = <3000000>; 310 regulator-state-mem { 311 regulator-on-in-suspend; 312 regulator-suspend-microvolt = <3000000>; 313 }; 314 }; 315 316 vcca3v0_codec: LDO_REG5 { 317 regulator-name = "vcca3v0_codec"; 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-min-microvolt = <3000000>; 321 regulator-max-microvolt = <3000000>; 322 regulator-state-mem { 323 regulator-off-in-suspend; 324 }; 325 }; 326 327 vcc_1v5: LDO_REG6 { 328 regulator-name = "vcc_1v5"; 329 regulator-always-on; 330 regulator-boot-on; 331 regulator-min-microvolt = <1500000>; 332 regulator-max-microvolt = <1500000>; 333 regulator-state-mem { 334 regulator-on-in-suspend; 335 regulator-suspend-microvolt = <1500000>; 336 }; 337 }; 338 339 vcc0v9_hdmi: LDO_REG7 { 340 regulator-name = "vcc0v9_hdmi"; 341 regulator-always-on; 342 regulator-boot-on; 343 regulator-min-microvolt = <900000>; 344 regulator-max-microvolt = <900000>; 345 regulator-state-mem { 346 regulator-off-in-suspend; 347 }; 348 }; 349 350 vcc_3v0: LDO_REG8 { 351 regulator-name = "vcc_3v0"; 352 regulator-always-on; 353 regulator-boot-on; 354 regulator-min-microvolt = <3000000>; 355 regulator-max-microvolt = <3000000>; 356 regulator-state-mem { 357 regulator-on-in-suspend; 358 regulator-suspend-microvolt = <3000000>; 359 }; 360 }; 361 362 vcc_cam: SWITCH_REG1 { 363 regulator-name = "vcc_cam"; 364 regulator-always-on; 365 regulator-boot-on; 366 regulator-state-mem { 367 regulator-off-in-suspend; 368 }; 369 }; 370 371 vcc_mipi: SWITCH_REG2 { 372 regulator-name = "vcc_mipi"; 373 regulator-always-on; 374 regulator-boot-on; 375 regulator-state-mem { 376 regulator-off-in-suspend; 377 }; 378 }; 379 }; 380 }; 381 382 vdd_cpu_b: regulator@40 { 383 compatible = "silergy,syr827"; 384 reg = <0x40>; 385 fcs,suspend-voltage-selector = <1>; 386 pinctrl-names = "default"; 387 pinctrl-0 = <&vsel1_pin>; 388 regulator-name = "vdd_cpu_b"; 389 regulator-min-microvolt = <712500>; 390 regulator-max-microvolt = <1500000>; 391 regulator-ramp-delay = <1000>; 392 regulator-always-on; 393 regulator-boot-on; 394 vin-supply = <&vcc5v0_sys>; 395 396 regulator-state-mem { 397 regulator-off-in-suspend; 398 }; 399 }; 400 401 vdd_gpu: regulator@41 { 402 compatible = "silergy,syr828"; 403 reg = <0x41>; 404 fcs,suspend-voltage-selector = <1>; 405 pinctrl-names = "default"; 406 pinctrl-0 = <&vsel2_pin>; 407 regulator-name = "vdd_gpu"; 408 regulator-min-microvolt = <712500>; 409 regulator-max-microvolt = <1500000>; 410 regulator-ramp-delay = <1000>; 411 regulator-always-on; 412 regulator-boot-on; 413 vin-supply = <&vcc5v0_sys>; 414 415 regulator-state-mem { 416 regulator-off-in-suspend; 417 }; 418 }; 419 }; 420 421 &i2c1 { 422 i2c-scl-rising-time-ns = <300>; 423 i2c-scl-falling-time-ns = <15>; 424 status = "okay"; 425 }; 426 427 &i2c3 { 428 i2c-scl-rising-time-ns = <450>; 429 i2c-scl-falling-time-ns = <15>; 430 status = "okay"; 431 }; 432 433 &i2c4 { 434 i2c-scl-rising-time-ns = <600>; 435 i2c-scl-falling-time-ns = <20>; 436 status = "okay"; 437 }; 438 439 &i2s0 { 440 pinctrl-0 = <&i2s0_2ch_bus>; 441 rockchip,capture-channels = <2>; 442 rockchip,playback-channels = <2>; 443 status = "okay"; 444 }; 445 446 &i2s1 { 447 rockchip,playback-channels = <2>; 448 rockchip,capture-channels = <2>; 449 status = "okay"; 450 }; 451 452 &i2s2 { 453 status = "okay"; 454 }; 455 456 &io_domains { 457 status = "okay"; 458 459 bt656-supply = <&vcc_3v0>; 460 audio-supply = <&vcc_3v0>; 461 sdmmc-supply = <&vcc_sdio>; 462 gpio1830-supply = <&vcc_3v0>; 463 }; 464 465 &pmu_io_domains { 466 status = "okay"; 467 468 pmu1830-supply = <&vcc_3v0>; 469 }; 470 471 &pcie_phy { 472 status = "okay"; 473 }; 474 475 &pcie0 { 476 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; 477 num-lanes = <4>; 478 pinctrl-0 = <&pcie_clkreqnb_cpm>; 479 pinctrl-names = "default"; 480 vpcie0v9-supply = <&vcc_0v9>; 481 vpcie1v8-supply = <&vcc_1v8>; 482 vpcie3v3-supply = <&vcc3v3_pcie>; 483 status = "okay"; 484 }; 485 486 &pinctrl { 487 bt { 488 bt_enable_h: bt-enable-h { 489 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 490 }; 491 492 bt_host_wake_l: bt-host-wake-l { 493 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 494 }; 495 496 bt_wake_l: bt-wake-l { 497 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 498 }; 499 }; 500 501 pcie { 502 pcie_pwr_en: pcie-pwr-en { 503 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 504 }; 505 }; 506 507 sdio0 { 508 sdio0_bus4: sdio0-bus4 { 509 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>, 510 <2 RK_PC5 1 &pcfg_pull_up_20ma>, 511 <2 RK_PC6 1 &pcfg_pull_up_20ma>, 512 <2 RK_PC7 1 &pcfg_pull_up_20ma>; 513 }; 514 515 sdio0_cmd: sdio0-cmd { 516 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>; 517 }; 518 519 sdio0_clk: sdio0-clk { 520 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>; 521 }; 522 }; 523 524 pmic { 525 pmic_int_l: pmic-int-l { 526 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 527 }; 528 529 vsel1_pin: vsel1-pin { 530 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 531 }; 532 533 vsel2_pin: vsel2-pin { 534 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 535 }; 536 }; 537 538 usb-typec { 539 vcc5v0_typec_en: vcc5v0-typec-en { 540 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 541 }; 542 }; 543 544 usb2 { 545 vcc5v0_host_en: vcc5v0-host-en { 546 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 547 }; 548 }; 549 550 wifi { 551 wifi_enable_h: wifi-enable-h { 552 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 553 }; 554 555 wifi_host_wake_l: wifi-host-wake-l { 556 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 557 }; 558 }; 559 }; 560 561 &pwm2 { 562 status = "okay"; 563 }; 564 565 &saradc { 566 status = "okay"; 567 568 vref-supply = <&vcc_1v8>; 569 }; 570 571 &sdio0 { 572 #address-cells = <1>; 573 #size-cells = <0>; 574 bus-width = <4>; 575 clock-frequency = <50000000>; 576 cap-sdio-irq; 577 cap-sd-highspeed; 578 keep-power-in-suspend; 579 mmc-pwrseq = <&sdio_pwrseq>; 580 non-removable; 581 pinctrl-names = "default"; 582 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 583 sd-uhs-sdr104; 584 }; 585 586 &sdmmc { 587 bus-width = <4>; 588 cap-mmc-highspeed; 589 cap-sd-highspeed; 590 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 591 disable-wp; 592 max-frequency = <150000000>; 593 pinctrl-names = "default"; 594 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 595 status = "okay"; 596 }; 597 598 &sdhci { 599 bus-width = <8>; 600 mmc-hs400-1_8v; 601 mmc-hs400-enhanced-strobe; 602 non-removable; 603 status = "okay"; 604 }; 605 606 &tcphy0 { 607 status = "okay"; 608 }; 609 610 &tcphy1 { 611 status = "okay"; 612 }; 613 614 &tsadc { 615 status = "okay"; 616 617 /* tshut mode 0:CRU 1:GPIO */ 618 rockchip,hw-tshut-mode = <1>; 619 /* tshut polarity 0:LOW 1:HIGH */ 620 rockchip,hw-tshut-polarity = <1>; 621 }; 622 623 &u2phy0 { 624 status = "okay"; 625 626 u2phy0_otg: otg-port { 627 status = "okay"; 628 }; 629 630 u2phy0_host: host-port { 631 phy-supply = <&vcc5v0_host>; 632 status = "okay"; 633 }; 634 }; 635 636 &u2phy1 { 637 status = "okay"; 638 639 u2phy1_otg: otg-port { 640 status = "okay"; 641 }; 642 643 u2phy1_host: host-port { 644 phy-supply = <&vcc5v0_host>; 645 status = "okay"; 646 }; 647 }; 648 649 &uart0 { 650 pinctrl-names = "default"; 651 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 652 }; 653 654 &uart2 { 655 status = "okay"; 656 }; 657 658 &usb_host0_ehci { 659 status = "okay"; 660 }; 661 662 &usb_host0_ohci { 663 status = "okay"; 664 }; 665 666 &usb_host1_ehci { 667 status = "okay"; 668 }; 669 670 &usb_host1_ohci { 671 status = "okay"; 672 }; 673 674 &usbdrd3_0 { 675 status = "okay"; 676 }; 677 678 &usbdrd_dwc3_0 { 679 status = "okay"; 680 dr_mode = "host"; 681 }; 682 683 &usbdrd3_1 { 684 status = "okay"; 685 }; 686 687 &usbdrd_dwc3_1 { 688 status = "okay"; 689 dr_mode = "host"; 690 }; 691 692 &vopb { 693 status = "okay"; 694 }; 695 696 &vopb_mmu { 697 status = "okay"; 698 }; 699 700 &vopl { 701 status = "okay"; 702 }; 703 704 &vopl_mmu { 705 status = "okay"; 706 }; 707