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      1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2 
      3 /dts-v1/;
      4 #include "rk3568-radxa-cm3i.dtsi"
      5 
      6 / {
      7 	model = "Radxa E25 Carrier Board";
      8 	compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
      9 
     10 	aliases {
     11 		mmc1 = &sdmmc0;
     12 	};
     13 
     14 	pwm-leds {
     15 		compatible = "pwm-leds-multicolor";
     16 
     17 		multi-led {
     18 			color = <LED_COLOR_ID_RGB>;
     19 			max-brightness = <255>;
     20 
     21 			led-red {
     22 				color = <LED_COLOR_ID_RED>;
     23 				pwms = <&pwm1 0 1000000 0>;
     24 			};
     25 
     26 			led-green {
     27 				color = <LED_COLOR_ID_GREEN>;
     28 				pwms = <&pwm2 0 1000000 0>;
     29 			};
     30 
     31 			led-blue {
     32 				color = <LED_COLOR_ID_BLUE>;
     33 				pwms = <&pwm12 0 1000000 0>;
     34 			};
     35 		};
     36 	};
     37 
     38 	vbus_typec: vbus-typec-regulator {
     39 		compatible = "regulator-fixed";
     40 		enable-active-high;
     41 		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
     42 		pinctrl-names = "default";
     43 		pinctrl-0 = <&vbus_typec_en>;
     44 		regulator-name = "vbus_typec";
     45 		regulator-min-microvolt = <5000000>;
     46 		regulator-max-microvolt = <5000000>;
     47 		vin-supply = <&vcc5v0_sys>;
     48 	};
     49 
     50 	/* actually fed by vcc5v0_sys, dependent
     51 	 * on pi6c clock generator
     52 	 */
     53 	vcc3v3_minipcie: vcc3v3-minipcie-regulator {
     54 		compatible = "regulator-fixed";
     55 		enable-active-high;
     56 		gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
     57 		pinctrl-names = "default";
     58 		pinctrl-0 = <&minipcie_enable_h>;
     59 		regulator-name = "vcc3v3_minipcie";
     60 		regulator-min-microvolt = <3300000>;
     61 		regulator-max-microvolt = <3300000>;
     62 		vin-supply = <&vcc3v3_pi6c_05>;
     63 	};
     64 
     65 	vcc3v3_ngff: vcc3v3-ngff-regulator {
     66 		compatible = "regulator-fixed";
     67 		enable-active-high;
     68 		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
     69 		pinctrl-names = "default";
     70 		pinctrl-0 = <&ngffpcie_enable_h>;
     71 		regulator-name = "vcc3v3_ngff";
     72 		regulator-min-microvolt = <3300000>;
     73 		regulator-max-microvolt = <3300000>;
     74 		vin-supply = <&vcc5v0_sys>;
     75 	};
     76 
     77 	vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
     78 		compatible = "regulator-fixed";
     79 		enable-active-high;
     80 		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
     81 		pinctrl-names = "default";
     82 		pinctrl-0 = <&pcie30x1_enable_h>;
     83 		regulator-name = "vcc3v3_pcie30x1";
     84 		regulator-min-microvolt = <3300000>;
     85 		regulator-max-microvolt = <3300000>;
     86 		vin-supply = <&vcc5v0_sys>;
     87 	};
     88 
     89 	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
     90 		compatible = "regulator-fixed";
     91 		enable-active-high;
     92 		gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
     93 		pinctrl-names = "default";
     94 		pinctrl-0 = <&pcie_enable_h>;
     95 		regulator-name = "vcc3v3_pcie";
     96 		regulator-min-microvolt = <3300000>;
     97 		regulator-max-microvolt = <3300000>;
     98 		vin-supply = <&vcc5v0_sys>;
     99 	};
    100 };
    101 
    102 &combphy1 {
    103 	phy-supply = <&vcc3v3_pcie30x1>;
    104 };
    105 
    106 &display_subsystem {
    107 	status = "disabled";
    108 };
    109 
    110 &pcie2x1 {
    111 	pinctrl-names = "default";
    112 	pinctrl-0 = <&pcie20_reset_h>;
    113 	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
    114 	vpcie3v3-supply = <&vcc3v3_pi6c_05>;
    115 	status = "okay";
    116 };
    117 
    118 &pcie30phy {
    119 	data-lanes = <1 2>;
    120 	status = "okay";
    121 };
    122 
    123 &pcie3x1 {
    124 	num-lanes = <1>;
    125 	pinctrl-names = "default";
    126 	pinctrl-0 = <&pcie30x1m0_pins>;
    127 	reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
    128 	vpcie3v3-supply = <&vcc3v3_minipcie>;
    129 	status = "okay";
    130 };
    131 
    132 &pcie3x2 {
    133 	num-lanes = <1>;
    134 	pinctrl-names = "default";
    135 	pinctrl-0 = <&pcie30x2_reset_h>;
    136 	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
    137 	vpcie3v3-supply = <&vcc3v3_pi6c_05>;
    138 	status = "okay";
    139 };
    140 
    141 &pinctrl {
    142 	pcie {
    143 		pcie20_reset_h: pcie20-reset-h {
    144 			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
    145 		};
    146 
    147 		pcie30x1_enable_h: pcie30x1-enable-h {
    148 			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
    149 		};
    150 
    151 		pcie30x2_reset_h: pcie30x2-reset-h {
    152 			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
    153 		};
    154 
    155 		pcie_enable_h: pcie-enable-h {
    156 			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
    157 		};
    158 	};
    159 
    160 	usb {
    161 		minipcie_enable_h: minipcie-enable-h {
    162 			rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
    163 		};
    164 
    165 		ngffpcie_enable_h: ngffpcie-enable-h {
    166 			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
    167 		};
    168 
    169 		vbus_typec_en: vbus_typec_en {
    170 			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
    171 		};
    172 	};
    173 };
    174 
    175 &pwm1 {
    176 	status = "okay";
    177 };
    178 
    179 &pwm2 {
    180 	status = "okay";
    181 };
    182 
    183 &pwm12 {
    184 	pinctrl-names = "default";
    185 	pinctrl-0 = <&pwm12m1_pins>;
    186 	status = "okay";
    187 };
    188 
    189 &sata1 {
    190 	status = "okay";
    191 };
    192 
    193 &sdmmc0 {
    194 	bus-width = <4>;
    195 	cap-sd-highspeed;
    196 	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
    197 	/* Also used in pcie30x1_clkreqnm0 */
    198 	disable-wp;
    199 	pinctrl-names = "default";
    200 	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
    201 	sd-uhs-sdr104;
    202 	vmmc-supply = <&vcc3v3_sd>;
    203 	vqmmc-supply = <&vccio_sd>;
    204 	status = "okay";
    205 };
    206 
    207 &usb_host0_ehci {
    208 	status = "okay";
    209 };
    210 
    211 &usb_host0_ohci {
    212 	status = "okay";
    213 };
    214 
    215 &usb_host0_xhci {
    216 	status = "okay";
    217 };
    218 
    219 &usb_host1_ehci {
    220 	status = "okay";
    221 };
    222 
    223 &usb_host1_ohci {
    224 	status = "okay";
    225 };
    226 
    227 &usb2phy0_otg {
    228 	phy-supply = <&vbus_typec>;
    229 	status = "okay";
    230 };
    231 
    232 &usb2phy1_host {
    233 	phy-supply = <&vcc3v3_minipcie>;
    234 	status = "okay";
    235 };
    236 
    237 &usb2phy1_otg {
    238 	phy-supply = <&vcc3v3_ngff>;
    239 	status = "okay";
    240 };
    241