Home | History | Annotate | Line # | Download | only in ti 
      1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
      2 /**
      3  * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM
      4  *
      5  * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/
      6  */
      7 
      8 /dts-v1/;
      9 /plugin/;
     10 #include <dt-bindings/gpio/gpio.h>
     11 #include <dt-bindings/phy/phy.h>
     12 #include <dt-bindings/phy/phy-am654-serdes.h>
     13 
     14 #include "k3-pinctrl.h"
     15 
     16 &serdes1 {
     17 	status = "okay";
     18 };
     19 
     20 &pcie1_rc {
     21 	num-lanes = <1>;
     22 	phys = <&serdes1 PHY_TYPE_PCIE 0>;
     23 	phy-names = "pcie-phy0";
     24 	reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
     25 	status = "okay";
     26 };
     27 
     28 &main_pmx0 {
     29 	usb0_pins_default: usb0-default-pins {
     30 		pinctrl-single,pins = <
     31 			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
     32 		>;
     33 	};
     34 };
     35 
     36 &serdes0 {
     37 	status = "okay";
     38 	assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
     39 	assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
     40 };
     41 
     42 &dwc3_0 {
     43 	status = "okay";
     44 	assigned-clock-parents = <&k3_clks 151 4>,      /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
     45 	<&k3_clks 151 8>;      /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
     46 	phys = <&serdes0 PHY_TYPE_USB3 0>;
     47 	phy-names = "usb3-phy";
     48 };
     49 
     50 &usb0 {
     51 	pinctrl-names = "default";
     52 	pinctrl-0 = <&usb0_pins_default>;
     53 	dr_mode = "host";
     54 	maximum-speed = "super-speed";
     55 	snps,dis-u1-entry-quirk;
     56 	snps,dis-u2-entry-quirk;
     57 };
     58 
     59 &usb0_phy {
     60 	status = "okay";
     61 };
     62