1 1.1 jmcneill /* $NetBSD: histb-clock.h,v 1.1.1.5 2020/01/03 14:33:05 skrll Exp $ */ 2 1.1 jmcneill 3 1.1.1.5 skrll /* SPDX-License-Identifier: GPL-2.0-or-later */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright (c) 2016 HiSilicon Technologies Co., Ltd. 6 1.1 jmcneill */ 7 1.1 jmcneill 8 1.1 jmcneill #ifndef __DTS_HISTB_CLOCK_H 9 1.1 jmcneill #define __DTS_HISTB_CLOCK_H 10 1.1 jmcneill 11 1.1 jmcneill /* clocks provided by core CRG */ 12 1.1 jmcneill #define HISTB_OSC_CLK 0 13 1.1 jmcneill #define HISTB_APB_CLK 1 14 1.1 jmcneill #define HISTB_AHB_CLK 2 15 1.1.1.3 jmcneill #define HISTB_UART1_CLK 3 16 1.1.1.3 jmcneill #define HISTB_UART2_CLK 4 17 1.1.1.3 jmcneill #define HISTB_UART3_CLK 5 18 1.1.1.3 jmcneill #define HISTB_I2C0_CLK 6 19 1.1.1.3 jmcneill #define HISTB_I2C1_CLK 7 20 1.1.1.3 jmcneill #define HISTB_I2C2_CLK 8 21 1.1.1.3 jmcneill #define HISTB_I2C3_CLK 9 22 1.1.1.3 jmcneill #define HISTB_I2C4_CLK 10 23 1.1.1.3 jmcneill #define HISTB_I2C5_CLK 11 24 1.1.1.3 jmcneill #define HISTB_SPI0_CLK 12 25 1.1.1.3 jmcneill #define HISTB_SPI1_CLK 13 26 1.1.1.3 jmcneill #define HISTB_SPI2_CLK 14 27 1.1 jmcneill #define HISTB_SCI_CLK 15 28 1.1 jmcneill #define HISTB_FMC_CLK 16 29 1.1 jmcneill #define HISTB_MMC_BIU_CLK 17 30 1.1 jmcneill #define HISTB_MMC_CIU_CLK 18 31 1.1 jmcneill #define HISTB_MMC_DRV_CLK 19 32 1.1 jmcneill #define HISTB_MMC_SAMPLE_CLK 20 33 1.1 jmcneill #define HISTB_SDIO0_BIU_CLK 21 34 1.1 jmcneill #define HISTB_SDIO0_CIU_CLK 22 35 1.1 jmcneill #define HISTB_SDIO0_DRV_CLK 23 36 1.1.1.3 jmcneill #define HISTB_SDIO0_SAMPLE_CLK 24 37 1.1 jmcneill #define HISTB_PCIE_AUX_CLK 25 38 1.1 jmcneill #define HISTB_PCIE_PIPE_CLK 26 39 1.1 jmcneill #define HISTB_PCIE_SYS_CLK 27 40 1.1 jmcneill #define HISTB_PCIE_BUS_CLK 28 41 1.1 jmcneill #define HISTB_ETH0_MAC_CLK 29 42 1.1 jmcneill #define HISTB_ETH0_MACIF_CLK 30 43 1.1 jmcneill #define HISTB_ETH1_MAC_CLK 31 44 1.1 jmcneill #define HISTB_ETH1_MACIF_CLK 32 45 1.1 jmcneill #define HISTB_COMBPHY1_CLK 33 46 1.1.1.3 jmcneill #define HISTB_USB2_BUS_CLK 34 47 1.1.1.3 jmcneill #define HISTB_USB2_PHY_CLK 35 48 1.1.1.3 jmcneill #define HISTB_USB2_UTMI_CLK 36 49 1.1.1.3 jmcneill #define HISTB_USB2_12M_CLK 37 50 1.1.1.3 jmcneill #define HISTB_USB2_48M_CLK 38 51 1.1.1.3 jmcneill #define HISTB_USB2_OTG_UTMI_CLK 39 52 1.1.1.3 jmcneill #define HISTB_USB2_PHY1_REF_CLK 40 53 1.1.1.3 jmcneill #define HISTB_USB2_PHY2_REF_CLK 41 54 1.1.1.3 jmcneill #define HISTB_COMBPHY0_CLK 42 55 1.1.1.4 jmcneill #define HISTB_USB3_BUS_CLK 43 56 1.1.1.4 jmcneill #define HISTB_USB3_UTMI_CLK 44 57 1.1.1.4 jmcneill #define HISTB_USB3_PIPE_CLK 45 58 1.1.1.4 jmcneill #define HISTB_USB3_SUSPEND_CLK 46 59 1.1.1.4 jmcneill #define HISTB_USB3_BUS_CLK1 47 60 1.1.1.4 jmcneill #define HISTB_USB3_UTMI_CLK1 48 61 1.1.1.4 jmcneill #define HISTB_USB3_PIPE_CLK1 49 62 1.1.1.4 jmcneill #define HISTB_USB3_SUSPEND_CLK1 50 63 1.1 jmcneill 64 1.1 jmcneill /* clocks provided by mcu CRG */ 65 1.1.1.3 jmcneill #define HISTB_MCE_CLK 1 66 1.1.1.3 jmcneill #define HISTB_IR_CLK 2 67 1.1.1.3 jmcneill #define HISTB_TIMER01_CLK 3 68 1.1.1.3 jmcneill #define HISTB_LEDC_CLK 4 69 1.1.1.3 jmcneill #define HISTB_UART0_CLK 5 70 1.1.1.3 jmcneill #define HISTB_LSADC_CLK 6 71 1.1 jmcneill 72 1.1 jmcneill #endif /* __DTS_HISTB_CLOCK_H */ 73