1/* $NetBSD: qcom,sm4450-gpucc.h,v 1.1.1.1 2026/01/18 05:21:36 skrll Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4/* 5 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM4450_H 9#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM4450_H 10 11/* GPU_CC clocks */ 12#define GPU_CC_AHB_CLK 0 13#define GPU_CC_CB_CLK 1 14#define GPU_CC_CRC_AHB_CLK 2 15#define GPU_CC_CX_FF_CLK 3 16#define GPU_CC_CX_GFX3D_CLK 4 17#define GPU_CC_CX_GFX3D_SLV_CLK 5 18#define GPU_CC_CX_GMU_CLK 6 19#define GPU_CC_CX_SNOC_DVM_CLK 7 20#define GPU_CC_CXO_AON_CLK 8 21#define GPU_CC_CXO_CLK 9 22#define GPU_CC_DEMET_CLK 10 23#define GPU_CC_DEMET_DIV_CLK_SRC 11 24#define GPU_CC_FF_CLK_SRC 12 25#define GPU_CC_FREQ_MEASURE_CLK 13 26#define GPU_CC_GMU_CLK_SRC 14 27#define GPU_CC_GX_CXO_CLK 15 28#define GPU_CC_GX_FF_CLK 16 29#define GPU_CC_GX_GFX3D_CLK 17 30#define GPU_CC_GX_GFX3D_CLK_SRC 18 31#define GPU_CC_GX_GFX3D_RDVM_CLK 19 32#define GPU_CC_GX_GMU_CLK 20 33#define GPU_CC_GX_VSENSE_CLK 21 34#define GPU_CC_HUB_AHB_DIV_CLK_SRC 22 35#define GPU_CC_HUB_AON_CLK 23 36#define GPU_CC_HUB_CLK_SRC 24 37#define GPU_CC_HUB_CX_INT_CLK 25 38#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 26 39#define GPU_CC_MEMNOC_GFX_CLK 27 40#define GPU_CC_MND1X_0_GFX3D_CLK 28 41#define GPU_CC_PLL0 29 42#define GPU_CC_PLL1 30 43#define GPU_CC_SLEEP_CLK 31 44#define GPU_CC_XO_CLK_SRC 32 45#define GPU_CC_XO_DIV_CLK_SRC 33 46 47/* GPU_CC power domains */ 48#define GPU_CC_CX_GDSC 0 49#define GPU_CC_GX_GDSC 1 50 51/* GPU_CC resets */ 52#define GPU_CC_ACD_BCR 0 53#define GPU_CC_CB_BCR 1 54#define GPU_CC_CX_BCR 2 55#define GPU_CC_FAST_HUB_BCR 3 56#define GPU_CC_FF_BCR 4 57#define GPU_CC_GFX3D_AON_BCR 5 58#define GPU_CC_GMU_BCR 6 59#define GPU_CC_GX_BCR 7 60#define GPU_CC_XO_BCR 8 61#define GPU_CC_GX_ACD_IROOT_BCR 9 62#define GPU_CC_RBCPR_BCR 10 63 64#endif 65