1/* $NetBSD: qcom,sm8450-videocc.h,v 1.1.1.1 2026/01/18 05:21:37 skrll Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4/* 5 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8450_H 9#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8450_H 10 11/* VIDEO_CC clocks */ 12#define VIDEO_CC_MVS0_CLK 0 13#define VIDEO_CC_MVS0_CLK_SRC 1 14#define VIDEO_CC_MVS0_DIV_CLK_SRC 2 15#define VIDEO_CC_MVS0C_CLK 3 16#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 4 17#define VIDEO_CC_MVS1_CLK 5 18#define VIDEO_CC_MVS1_CLK_SRC 6 19#define VIDEO_CC_MVS1_DIV_CLK_SRC 7 20#define VIDEO_CC_MVS1C_CLK 8 21#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 9 22#define VIDEO_CC_PLL0 10 23#define VIDEO_CC_PLL1 11 24 25/* VIDEO_CC power domains */ 26#define VIDEO_CC_MVS0C_GDSC 0 27#define VIDEO_CC_MVS0_GDSC 1 28#define VIDEO_CC_MVS1C_GDSC 2 29#define VIDEO_CC_MVS1_GDSC 3 30 31/* VIDEO_CC resets */ 32#define CVP_VIDEO_CC_INTERFACE_BCR 0 33#define CVP_VIDEO_CC_MVS0_BCR 1 34#define CVP_VIDEO_CC_MVS0C_BCR 2 35#define CVP_VIDEO_CC_MVS1_BCR 3 36#define CVP_VIDEO_CC_MVS1C_BCR 4 37#define VIDEO_CC_MVS0C_CLK_ARES 5 38#define VIDEO_CC_MVS1C_CLK_ARES 6 39 40#endif 41