1/* $NetBSD: st,stm32mp25-rcc.h,v 1.1.1.1 2026/01/18 05:21:41 skrll Exp $ */ 2 3/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 4/* 5 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 6 * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> 7 */ 8 9#ifndef _DT_BINDINGS_STM32MP25_CLKS_H_ 10#define _DT_BINDINGS_STM32MP25_CLKS_H_ 11 12/* INTERNAL/EXTERNAL OSCILLATORS */ 13#define HSI_CK 0 14#define HSE_CK 1 15#define MSI_CK 2 16#define LSI_CK 3 17#define LSE_CK 4 18#define I2S_CK 5 19#define RTC_CK 6 20#define SPDIF_CK_SYMB 7 21 22/* PLL CLOCKS */ 23#define PLL1_CK 8 24#define PLL2_CK 9 25#define PLL3_CK 10 26#define PLL4_CK 11 27#define PLL5_CK 12 28#define PLL6_CK 13 29#define PLL7_CK 14 30#define PLL8_CK 15 31 32#define CK_CPU1 16 33 34/* APB DIV CLOCKS */ 35#define CK_ICN_APB1 17 36#define CK_ICN_APB2 18 37#define CK_ICN_APB3 19 38#define CK_ICN_APB4 20 39#define CK_ICN_APBDBG 21 40 41/* GLOBAL TIMER */ 42#define TIMG1_CK 22 43#define TIMG2_CK 23 44 45/* FLEXGEN CLOCKS */ 46#define CK_ICN_HS_MCU 24 47#define CK_ICN_SDMMC 25 48#define CK_ICN_DDR 26 49#define CK_ICN_DISPLAY 27 50#define CK_ICN_HSL 28 51#define CK_ICN_NIC 29 52#define CK_ICN_VID 30 53#define CK_FLEXGEN_07 31 54#define CK_FLEXGEN_08 32 55#define CK_FLEXGEN_09 33 56#define CK_FLEXGEN_10 34 57#define CK_FLEXGEN_11 35 58#define CK_FLEXGEN_12 36 59#define CK_FLEXGEN_13 37 60#define CK_FLEXGEN_14 38 61#define CK_FLEXGEN_15 39 62#define CK_FLEXGEN_16 40 63#define CK_FLEXGEN_17 41 64#define CK_FLEXGEN_18 42 65#define CK_FLEXGEN_19 43 66#define CK_FLEXGEN_20 44 67#define CK_FLEXGEN_21 45 68#define CK_FLEXGEN_22 46 69#define CK_FLEXGEN_23 47 70#define CK_FLEXGEN_24 48 71#define CK_FLEXGEN_25 49 72#define CK_FLEXGEN_26 50 73#define CK_FLEXGEN_27 51 74#define CK_FLEXGEN_28 52 75#define CK_FLEXGEN_29 53 76#define CK_FLEXGEN_30 54 77#define CK_FLEXGEN_31 55 78#define CK_FLEXGEN_32 56 79#define CK_FLEXGEN_33 57 80#define CK_FLEXGEN_34 58 81#define CK_FLEXGEN_35 59 82#define CK_FLEXGEN_36 60 83#define CK_FLEXGEN_37 61 84#define CK_FLEXGEN_38 62 85#define CK_FLEXGEN_39 63 86#define CK_FLEXGEN_40 64 87#define CK_FLEXGEN_41 65 88#define CK_FLEXGEN_42 66 89#define CK_FLEXGEN_43 67 90#define CK_FLEXGEN_44 68 91#define CK_FLEXGEN_45 69 92#define CK_FLEXGEN_46 70 93#define CK_FLEXGEN_47 71 94#define CK_FLEXGEN_48 72 95#define CK_FLEXGEN_49 73 96#define CK_FLEXGEN_50 74 97#define CK_FLEXGEN_51 75 98#define CK_FLEXGEN_52 76 99#define CK_FLEXGEN_53 77 100#define CK_FLEXGEN_54 78 101#define CK_FLEXGEN_55 79 102#define CK_FLEXGEN_56 80 103#define CK_FLEXGEN_57 81 104#define CK_FLEXGEN_58 82 105#define CK_FLEXGEN_59 83 106#define CK_FLEXGEN_60 84 107#define CK_FLEXGEN_61 85 108#define CK_FLEXGEN_62 86 109#define CK_FLEXGEN_63 87 110 111/* LOW SPEED MCU CLOCK */ 112#define CK_ICN_LS_MCU 88 113 114#define CK_BUS_STM500 89 115#define CK_BUS_FMC 90 116#define CK_BUS_GPU 91 117#define CK_BUS_ETH1 92 118#define CK_BUS_ETH2 93 119#define CK_BUS_PCIE 94 120#define CK_BUS_DDRPHYC 95 121#define CK_BUS_SYSCPU1 96 122#define CK_BUS_ETHSW 97 123#define CK_BUS_HPDMA1 98 124#define CK_BUS_HPDMA2 99 125#define CK_BUS_HPDMA3 100 126#define CK_BUS_ADC12 101 127#define CK_BUS_ADC3 102 128#define CK_BUS_IPCC1 103 129#define CK_BUS_CCI 104 130#define CK_BUS_CRC 105 131#define CK_BUS_MDF1 106 132#define CK_BUS_OSPIIOM 107 133#define CK_BUS_BKPSRAM 108 134#define CK_BUS_HASH 109 135#define CK_BUS_RNG 110 136#define CK_BUS_CRYP1 111 137#define CK_BUS_CRYP2 112 138#define CK_BUS_SAES 113 139#define CK_BUS_PKA 114 140#define CK_BUS_GPIOA 115 141#define CK_BUS_GPIOB 116 142#define CK_BUS_GPIOC 117 143#define CK_BUS_GPIOD 118 144#define CK_BUS_GPIOE 119 145#define CK_BUS_GPIOF 120 146#define CK_BUS_GPIOG 121 147#define CK_BUS_GPIOH 122 148#define CK_BUS_GPIOI 123 149#define CK_BUS_GPIOJ 124 150#define CK_BUS_GPIOK 125 151#define CK_BUS_LPSRAM1 126 152#define CK_BUS_LPSRAM2 127 153#define CK_BUS_LPSRAM3 128 154#define CK_BUS_GPIOZ 129 155#define CK_BUS_LPDMA 130 156#define CK_BUS_HSEM 131 157#define CK_BUS_IPCC2 132 158#define CK_BUS_RTC 133 159#define CK_BUS_SPI8 134 160#define CK_BUS_LPUART1 135 161#define CK_BUS_I2C8 136 162#define CK_BUS_LPTIM3 137 163#define CK_BUS_LPTIM4 138 164#define CK_BUS_LPTIM5 139 165#define CK_BUS_IWDG5 140 166#define CK_BUS_WWDG2 141 167#define CK_BUS_I3C4 142 168#define CK_BUS_TIM2 143 169#define CK_BUS_TIM3 144 170#define CK_BUS_TIM4 145 171#define CK_BUS_TIM5 146 172#define CK_BUS_TIM6 147 173#define CK_BUS_TIM7 148 174#define CK_BUS_TIM10 149 175#define CK_BUS_TIM11 150 176#define CK_BUS_TIM12 151 177#define CK_BUS_TIM13 152 178#define CK_BUS_TIM14 153 179#define CK_BUS_LPTIM1 154 180#define CK_BUS_LPTIM2 155 181#define CK_BUS_SPI2 156 182#define CK_BUS_SPI3 157 183#define CK_BUS_SPDIFRX 158 184#define CK_BUS_USART2 159 185#define CK_BUS_USART3 160 186#define CK_BUS_UART4 161 187#define CK_BUS_UART5 162 188#define CK_BUS_I2C1 163 189#define CK_BUS_I2C2 164 190#define CK_BUS_I2C3 165 191#define CK_BUS_I2C4 166 192#define CK_BUS_I2C5 167 193#define CK_BUS_I2C6 168 194#define CK_BUS_I2C7 169 195#define CK_BUS_I3C1 170 196#define CK_BUS_I3C2 171 197#define CK_BUS_I3C3 172 198#define CK_BUS_TIM1 173 199#define CK_BUS_TIM8 174 200#define CK_BUS_TIM15 175 201#define CK_BUS_TIM16 176 202#define CK_BUS_TIM17 177 203#define CK_BUS_TIM20 178 204#define CK_BUS_SAI1 179 205#define CK_BUS_SAI2 180 206#define CK_BUS_SAI3 181 207#define CK_BUS_SAI4 182 208#define CK_BUS_USART1 183 209#define CK_BUS_USART6 184 210#define CK_BUS_UART7 185 211#define CK_BUS_UART8 186 212#define CK_BUS_UART9 187 213#define CK_BUS_FDCAN 188 214#define CK_BUS_SPI1 189 215#define CK_BUS_SPI4 190 216#define CK_BUS_SPI5 191 217#define CK_BUS_SPI6 192 218#define CK_BUS_SPI7 193 219#define CK_BUS_BSEC 194 220#define CK_BUS_IWDG1 195 221#define CK_BUS_IWDG2 196 222#define CK_BUS_IWDG3 197 223#define CK_BUS_IWDG4 198 224#define CK_BUS_WWDG1 199 225#define CK_BUS_VREF 200 226#define CK_BUS_DTS 201 227#define CK_BUS_SERC 202 228#define CK_BUS_HDP 203 229#define CK_BUS_IS2M 204 230#define CK_BUS_DSI 205 231#define CK_BUS_LTDC 206 232#define CK_BUS_CSI 207 233#define CK_BUS_DCMIPP 208 234#define CK_BUS_DDRC 209 235#define CK_BUS_DDRCFG 210 236#define CK_BUS_GICV2M 211 237#define CK_BUS_USBTC 212 238#define CK_BUS_USB3PCIEPHY 214 239#define CK_BUS_STGEN 215 240#define CK_BUS_VDEC 216 241#define CK_BUS_VENC 217 242#define CK_SYSDBG 218 243#define CK_KER_TIM2 219 244#define CK_KER_TIM3 220 245#define CK_KER_TIM4 221 246#define CK_KER_TIM5 222 247#define CK_KER_TIM6 223 248#define CK_KER_TIM7 224 249#define CK_KER_TIM10 225 250#define CK_KER_TIM11 226 251#define CK_KER_TIM12 227 252#define CK_KER_TIM13 228 253#define CK_KER_TIM14 229 254#define CK_KER_TIM1 230 255#define CK_KER_TIM8 231 256#define CK_KER_TIM15 232 257#define CK_KER_TIM16 233 258#define CK_KER_TIM17 234 259#define CK_KER_TIM20 235 260#define CK_BUS_SYSRAM 236 261#define CK_BUS_VDERAM 237 262#define CK_BUS_RETRAM 238 263#define CK_BUS_OSPI1 239 264#define CK_BUS_OSPI2 240 265#define CK_BUS_OTFD1 241 266#define CK_BUS_OTFD2 242 267#define CK_BUS_SRAM1 243 268#define CK_BUS_SRAM2 244 269#define CK_BUS_SDMMC1 245 270#define CK_BUS_SDMMC2 246 271#define CK_BUS_SDMMC3 247 272#define CK_BUS_DDR 248 273#define CK_BUS_RISAF4 249 274#define CK_BUS_USB2OHCI 250 275#define CK_BUS_USB2EHCI 251 276#define CK_BUS_USB3DR 252 277#define CK_KER_LPTIM1 253 278#define CK_KER_LPTIM2 254 279#define CK_KER_USART2 255 280#define CK_KER_UART4 256 281#define CK_KER_USART3 257 282#define CK_KER_UART5 258 283#define CK_KER_SPI2 259 284#define CK_KER_SPI3 260 285#define CK_KER_SPDIFRX 261 286#define CK_KER_I2C1 262 287#define CK_KER_I2C2 263 288#define CK_KER_I3C1 264 289#define CK_KER_I3C2 265 290#define CK_KER_I2C3 266 291#define CK_KER_I2C5 267 292#define CK_KER_I3C3 268 293#define CK_KER_I2C4 269 294#define CK_KER_I2C6 270 295#define CK_KER_I2C7 271 296#define CK_KER_SPI1 272 297#define CK_KER_SPI4 273 298#define CK_KER_SPI5 274 299#define CK_KER_SPI6 275 300#define CK_KER_SPI7 276 301#define CK_KER_USART1 277 302#define CK_KER_USART6 278 303#define CK_KER_UART7 279 304#define CK_KER_UART8 280 305#define CK_KER_UART9 281 306#define CK_KER_MDF1 282 307#define CK_KER_SAI1 283 308#define CK_KER_SAI2 284 309#define CK_KER_SAI3 285 310#define CK_KER_SAI4 286 311#define CK_KER_FDCAN 287 312#define CK_KER_DSIBLANE 288 313#define CK_KER_DSIPHY 289 314#define CK_KER_CSI 290 315#define CK_KER_CSITXESC 291 316#define CK_KER_CSIPHY 292 317#define CK_KER_LVDSPHY 293 318#define CK_KER_STGEN 294 319#define CK_KER_USB3PCIEPHY 295 320#define CK_KER_USB2PHY2EN 296 321#define CK_KER_I3C4 297 322#define CK_KER_SPI8 298 323#define CK_KER_I2C8 299 324#define CK_KER_LPUART1 300 325#define CK_KER_LPTIM3 301 326#define CK_KER_LPTIM4 302 327#define CK_KER_LPTIM5 303 328#define CK_KER_TSDBG 304 329#define CK_KER_TPIU 305 330#define CK_BUS_ETR 306 331#define CK_BUS_SYSATB 307 332#define CK_KER_ADC12 308 333#define CK_KER_ADC3 309 334#define CK_KER_OSPI1 310 335#define CK_KER_OSPI2 311 336#define CK_KER_FMC 312 337#define CK_KER_SDMMC1 313 338#define CK_KER_SDMMC2 314 339#define CK_KER_SDMMC3 315 340#define CK_KER_ETH1 316 341#define CK_KER_ETH2 317 342#define CK_KER_ETH1PTP 318 343#define CK_KER_ETH2PTP 319 344#define CK_KER_USB2PHY1 320 345#define CK_KER_USB2PHY2 321 346#define CK_KER_ETHSW 322 347#define CK_KER_ETHSWREF 323 348#define CK_MCO1 324 349#define CK_MCO2 325 350#define CK_KER_DTS 326 351#define CK_ETH1_RX 327 352#define CK_ETH1_TX 328 353#define CK_ETH1_MAC 329 354#define CK_ETH2_RX 330 355#define CK_ETH2_TX 331 356#define CK_ETH2_MAC 332 357#define CK_ETH1_STP 333 358#define CK_ETH2_STP 334 359#define CK_KER_USBTC 335 360#define CK_BUS_ADF1 336 361#define CK_KER_ADF1 337 362#define CK_BUS_LVDS 338 363#define CK_KER_LTDC 339 364#define CK_KER_GPU 340 365#define CK_BUS_ETHSWACMCFG 341 366#define CK_BUS_ETHSWACMMSG 342 367#define HSE_DIV2_CK 343 368 369#define STM32MP25_LAST_CLK 344 370 371#define CK_SCMI_ICN_HS_MCU 0 372#define CK_SCMI_ICN_SDMMC 1 373#define CK_SCMI_ICN_DDR 2 374#define CK_SCMI_ICN_DISPLAY 3 375#define CK_SCMI_ICN_HSL 4 376#define CK_SCMI_ICN_NIC 5 377#define CK_SCMI_ICN_VID 6 378#define CK_SCMI_FLEXGEN_07 7 379#define CK_SCMI_FLEXGEN_08 8 380#define CK_SCMI_FLEXGEN_09 9 381#define CK_SCMI_FLEXGEN_10 10 382#define CK_SCMI_FLEXGEN_11 11 383#define CK_SCMI_FLEXGEN_12 12 384#define CK_SCMI_FLEXGEN_13 13 385#define CK_SCMI_FLEXGEN_14 14 386#define CK_SCMI_FLEXGEN_15 15 387#define CK_SCMI_FLEXGEN_16 16 388#define CK_SCMI_FLEXGEN_17 17 389#define CK_SCMI_FLEXGEN_18 18 390#define CK_SCMI_FLEXGEN_19 19 391#define CK_SCMI_FLEXGEN_20 20 392#define CK_SCMI_FLEXGEN_21 21 393#define CK_SCMI_FLEXGEN_22 22 394#define CK_SCMI_FLEXGEN_23 23 395#define CK_SCMI_FLEXGEN_24 24 396#define CK_SCMI_FLEXGEN_25 25 397#define CK_SCMI_FLEXGEN_26 26 398#define CK_SCMI_FLEXGEN_27 27 399#define CK_SCMI_FLEXGEN_28 28 400#define CK_SCMI_FLEXGEN_29 29 401#define CK_SCMI_FLEXGEN_30 30 402#define CK_SCMI_FLEXGEN_31 31 403#define CK_SCMI_FLEXGEN_32 32 404#define CK_SCMI_FLEXGEN_33 33 405#define CK_SCMI_FLEXGEN_34 34 406#define CK_SCMI_FLEXGEN_35 35 407#define CK_SCMI_FLEXGEN_36 36 408#define CK_SCMI_FLEXGEN_37 37 409#define CK_SCMI_FLEXGEN_38 38 410#define CK_SCMI_FLEXGEN_39 39 411#define CK_SCMI_FLEXGEN_40 40 412#define CK_SCMI_FLEXGEN_41 41 413#define CK_SCMI_FLEXGEN_42 42 414#define CK_SCMI_FLEXGEN_43 43 415#define CK_SCMI_FLEXGEN_44 44 416#define CK_SCMI_FLEXGEN_45 45 417#define CK_SCMI_FLEXGEN_46 46 418#define CK_SCMI_FLEXGEN_47 47 419#define CK_SCMI_FLEXGEN_48 48 420#define CK_SCMI_FLEXGEN_49 49 421#define CK_SCMI_FLEXGEN_50 50 422#define CK_SCMI_FLEXGEN_51 51 423#define CK_SCMI_FLEXGEN_52 52 424#define CK_SCMI_FLEXGEN_53 53 425#define CK_SCMI_FLEXGEN_54 54 426#define CK_SCMI_FLEXGEN_55 55 427#define CK_SCMI_FLEXGEN_56 56 428#define CK_SCMI_FLEXGEN_57 57 429#define CK_SCMI_FLEXGEN_58 58 430#define CK_SCMI_FLEXGEN_59 59 431#define CK_SCMI_FLEXGEN_60 60 432#define CK_SCMI_FLEXGEN_61 61 433#define CK_SCMI_FLEXGEN_62 62 434#define CK_SCMI_FLEXGEN_63 63 435#define CK_SCMI_ICN_LS_MCU 64 436#define CK_SCMI_HSE 65 437#define CK_SCMI_LSE 66 438#define CK_SCMI_HSI 67 439#define CK_SCMI_LSI 68 440#define CK_SCMI_MSI 69 441#define CK_SCMI_HSE_DIV2 70 442#define CK_SCMI_CPU1 71 443#define CK_SCMI_SYSCPU1 72 444#define CK_SCMI_PLL2 73 445#define CK_SCMI_PLL3 74 446#define CK_SCMI_RTC 75 447#define CK_SCMI_RTCCK 76 448#define CK_SCMI_ICN_APB1 77 449#define CK_SCMI_ICN_APB2 78 450#define CK_SCMI_ICN_APB3 79 451#define CK_SCMI_ICN_APB4 80 452#define CK_SCMI_ICN_APBDBG 81 453#define CK_SCMI_TIMG1 82 454#define CK_SCMI_TIMG2 83 455#define CK_SCMI_BKPSRAM 84 456#define CK_SCMI_BSEC 85 457#define CK_SCMI_ETR 87 458#define CK_SCMI_FMC 88 459#define CK_SCMI_GPIOA 89 460#define CK_SCMI_GPIOB 90 461#define CK_SCMI_GPIOC 91 462#define CK_SCMI_GPIOD 92 463#define CK_SCMI_GPIOE 93 464#define CK_SCMI_GPIOF 94 465#define CK_SCMI_GPIOG 95 466#define CK_SCMI_GPIOH 96 467#define CK_SCMI_GPIOI 97 468#define CK_SCMI_GPIOJ 98 469#define CK_SCMI_GPIOK 99 470#define CK_SCMI_GPIOZ 100 471#define CK_SCMI_HPDMA1 101 472#define CK_SCMI_HPDMA2 102 473#define CK_SCMI_HPDMA3 103 474#define CK_SCMI_HSEM 104 475#define CK_SCMI_IPCC1 105 476#define CK_SCMI_IPCC2 106 477#define CK_SCMI_LPDMA 107 478#define CK_SCMI_RETRAM 108 479#define CK_SCMI_SRAM1 109 480#define CK_SCMI_SRAM2 110 481#define CK_SCMI_LPSRAM1 111 482#define CK_SCMI_LPSRAM2 112 483#define CK_SCMI_LPSRAM3 113 484#define CK_SCMI_VDERAM 114 485#define CK_SCMI_SYSRAM 115 486#define CK_SCMI_OSPI1 116 487#define CK_SCMI_OSPI2 117 488#define CK_SCMI_TPIU 118 489#define CK_SCMI_SYSDBG 119 490#define CK_SCMI_SYSATB 120 491#define CK_SCMI_TSDBG 121 492#define CK_SCMI_STM500 122 493 494#endif /* _DT_BINDINGS_STM32MP25_CLKS_H_ */ 495