1 /* $NetBSD: sun4i-a10-ccu.h,v 1.1.1.2 2017/11/30 19:40:51 jmcneill Exp $ */ 2 3 /* 4 * Copyright (C) 2017 Priit Laes <plaes (at) plaes.org> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of the 14 * License, or (at your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43 44 #ifndef _DT_BINDINGS_CLK_SUN4I_A10_H_ 45 #define _DT_BINDINGS_CLK_SUN4I_A10_H_ 46 47 #define CLK_HOSC 1 48 #define CLK_PLL_VIDEO0_2X 9 49 #define CLK_PLL_VIDEO1_2X 18 50 #define CLK_CPU 20 51 52 /* AHB Gates */ 53 #define CLK_AHB_OTG 26 54 #define CLK_AHB_EHCI0 27 55 #define CLK_AHB_OHCI0 28 56 #define CLK_AHB_EHCI1 29 57 #define CLK_AHB_OHCI1 30 58 #define CLK_AHB_SS 31 59 #define CLK_AHB_DMA 32 60 #define CLK_AHB_BIST 33 61 #define CLK_AHB_MMC0 34 62 #define CLK_AHB_MMC1 35 63 #define CLK_AHB_MMC2 36 64 #define CLK_AHB_MMC3 37 65 #define CLK_AHB_MS 38 66 #define CLK_AHB_NAND 39 67 #define CLK_AHB_SDRAM 40 68 #define CLK_AHB_ACE 41 69 #define CLK_AHB_EMAC 42 70 #define CLK_AHB_TS 43 71 #define CLK_AHB_SPI0 44 72 #define CLK_AHB_SPI1 45 73 #define CLK_AHB_SPI2 46 74 #define CLK_AHB_SPI3 47 75 #define CLK_AHB_PATA 48 76 #define CLK_AHB_SATA 49 77 #define CLK_AHB_GPS 50 78 #define CLK_AHB_HSTIMER 51 79 #define CLK_AHB_VE 52 80 #define CLK_AHB_TVD 53 81 #define CLK_AHB_TVE0 54 82 #define CLK_AHB_TVE1 55 83 #define CLK_AHB_LCD0 56 84 #define CLK_AHB_LCD1 57 85 #define CLK_AHB_CSI0 58 86 #define CLK_AHB_CSI1 59 87 #define CLK_AHB_HDMI0 60 88 #define CLK_AHB_HDMI1 61 89 #define CLK_AHB_DE_BE0 62 90 #define CLK_AHB_DE_BE1 63 91 #define CLK_AHB_DE_FE0 64 92 #define CLK_AHB_DE_FE1 65 93 #define CLK_AHB_GMAC 66 94 #define CLK_AHB_MP 67 95 #define CLK_AHB_GPU 68 96 97 /* APB0 Gates */ 98 #define CLK_APB0_CODEC 69 99 #define CLK_APB0_SPDIF 70 100 #define CLK_APB0_I2S0 71 101 #define CLK_APB0_AC97 72 102 #define CLK_APB0_I2S1 73 103 #define CLK_APB0_PIO 74 104 #define CLK_APB0_IR0 75 105 #define CLK_APB0_IR1 76 106 #define CLK_APB0_I2S2 77 107 #define CLK_APB0_KEYPAD 78 108 109 /* APB1 Gates */ 110 #define CLK_APB1_I2C0 79 111 #define CLK_APB1_I2C1 80 112 #define CLK_APB1_I2C2 81 113 #define CLK_APB1_I2C3 82 114 #define CLK_APB1_CAN 83 115 #define CLK_APB1_SCR 84 116 #define CLK_APB1_PS20 85 117 #define CLK_APB1_PS21 86 118 #define CLK_APB1_I2C4 87 119 #define CLK_APB1_UART0 88 120 #define CLK_APB1_UART1 89 121 #define CLK_APB1_UART2 90 122 #define CLK_APB1_UART3 91 123 #define CLK_APB1_UART4 92 124 #define CLK_APB1_UART5 93 125 #define CLK_APB1_UART6 94 126 #define CLK_APB1_UART7 95 127 128 /* IP clocks */ 129 #define CLK_NAND 96 130 #define CLK_MS 97 131 #define CLK_MMC0 98 132 #define CLK_MMC0_OUTPUT 99 133 #define CLK_MMC0_SAMPLE 100 134 #define CLK_MMC1 101 135 #define CLK_MMC1_OUTPUT 102 136 #define CLK_MMC1_SAMPLE 103 137 #define CLK_MMC2 104 138 #define CLK_MMC2_OUTPUT 105 139 #define CLK_MMC2_SAMPLE 106 140 #define CLK_MMC3 107 141 #define CLK_MMC3_OUTPUT 108 142 #define CLK_MMC3_SAMPLE 109 143 #define CLK_TS 110 144 #define CLK_SS 111 145 #define CLK_SPI0 112 146 #define CLK_SPI1 113 147 #define CLK_SPI2 114 148 #define CLK_PATA 115 149 #define CLK_IR0 116 150 #define CLK_IR1 117 151 #define CLK_I2S0 118 152 #define CLK_AC97 119 153 #define CLK_SPDIF 120 154 #define CLK_KEYPAD 121 155 #define CLK_SATA 122 156 #define CLK_USB_OHCI0 123 157 #define CLK_USB_OHCI1 124 158 #define CLK_USB_PHY 125 159 #define CLK_GPS 126 160 #define CLK_SPI3 127 161 #define CLK_I2S1 128 162 #define CLK_I2S2 129 163 164 /* DRAM Gates */ 165 #define CLK_DRAM_VE 130 166 #define CLK_DRAM_CSI0 131 167 #define CLK_DRAM_CSI1 132 168 #define CLK_DRAM_TS 133 169 #define CLK_DRAM_TVD 134 170 #define CLK_DRAM_TVE0 135 171 #define CLK_DRAM_TVE1 136 172 #define CLK_DRAM_OUT 137 173 #define CLK_DRAM_DE_FE1 138 174 #define CLK_DRAM_DE_FE0 139 175 #define CLK_DRAM_DE_BE0 140 176 #define CLK_DRAM_DE_BE1 141 177 #define CLK_DRAM_MP 142 178 #define CLK_DRAM_ACE 143 179 180 /* Display Engine Clocks */ 181 #define CLK_DE_BE0 144 182 #define CLK_DE_BE1 145 183 #define CLK_DE_FE0 146 184 #define CLK_DE_FE1 147 185 #define CLK_DE_MP 148 186 #define CLK_TCON0_CH0 149 187 #define CLK_TCON1_CH0 150 188 #define CLK_CSI_SCLK 151 189 #define CLK_TVD_SCLK2 152 190 #define CLK_TVD 153 191 #define CLK_TCON0_CH1_SCLK2 154 192 #define CLK_TCON0_CH1 155 193 #define CLK_TCON1_CH1_SCLK2 156 194 #define CLK_TCON1_CH1 157 195 #define CLK_CSI0 158 196 #define CLK_CSI1 159 197 #define CLK_CODEC 160 198 #define CLK_VE 161 199 #define CLK_AVS 162 200 #define CLK_ACE 163 201 #define CLK_HDMI 164 202 #define CLK_GPU 165 203 204 #endif /* _DT_BINDINGS_CLK_SUN4I_A10_H_ */ 205
Indexes created Fri Sep 26 08:10:20 GMT 2025