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      1  1.1  jmcneill /*	$NetBSD: sun50i-h616-ccu.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
      2  1.1  jmcneill 
      3  1.1  jmcneill /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
      4  1.1  jmcneill /*
      5  1.1  jmcneill  * Copyright (C) 2020 Arm Ltd.
      6  1.1  jmcneill  */
      7  1.1  jmcneill 
      8  1.1  jmcneill #ifndef _DT_BINDINGS_CLK_SUN50I_H616_H_
      9  1.1  jmcneill #define _DT_BINDINGS_CLK_SUN50I_H616_H_
     10  1.1  jmcneill 
     11  1.1  jmcneill #define CLK_PLL_PERIPH0		4
     12  1.1  jmcneill 
     13  1.1  jmcneill #define CLK_CPUX		21
     14  1.1  jmcneill 
     15  1.1  jmcneill #define CLK_APB1		26
     16  1.1  jmcneill 
     17  1.1  jmcneill #define CLK_DE			29
     18  1.1  jmcneill #define CLK_BUS_DE		30
     19  1.1  jmcneill #define CLK_DEINTERLACE		31
     20  1.1  jmcneill #define CLK_BUS_DEINTERLACE	32
     21  1.1  jmcneill #define CLK_G2D			33
     22  1.1  jmcneill #define CLK_BUS_G2D		34
     23  1.1  jmcneill #define CLK_GPU0		35
     24  1.1  jmcneill #define CLK_BUS_GPU		36
     25  1.1  jmcneill #define CLK_GPU1		37
     26  1.1  jmcneill #define CLK_CE			38
     27  1.1  jmcneill #define CLK_BUS_CE		39
     28  1.1  jmcneill #define CLK_VE			40
     29  1.1  jmcneill #define CLK_BUS_VE		41
     30  1.1  jmcneill #define CLK_BUS_DMA		42
     31  1.1  jmcneill #define CLK_BUS_HSTIMER		43
     32  1.1  jmcneill #define CLK_AVS			44
     33  1.1  jmcneill #define CLK_BUS_DBG		45
     34  1.1  jmcneill #define CLK_BUS_PSI		46
     35  1.1  jmcneill #define CLK_BUS_PWM		47
     36  1.1  jmcneill #define CLK_BUS_IOMMU		48
     37  1.1  jmcneill 
     38  1.1  jmcneill #define CLK_MBUS_DMA		50
     39  1.1  jmcneill #define CLK_MBUS_VE		51
     40  1.1  jmcneill #define CLK_MBUS_CE		52
     41  1.1  jmcneill #define CLK_MBUS_TS		53
     42  1.1  jmcneill #define CLK_MBUS_NAND		54
     43  1.1  jmcneill #define CLK_MBUS_G2D		55
     44  1.1  jmcneill 
     45  1.1  jmcneill #define CLK_NAND0		57
     46  1.1  jmcneill #define CLK_NAND1		58
     47  1.1  jmcneill #define CLK_BUS_NAND		59
     48  1.1  jmcneill #define CLK_MMC0		60
     49  1.1  jmcneill #define CLK_MMC1		61
     50  1.1  jmcneill #define CLK_MMC2		62
     51  1.1  jmcneill #define CLK_BUS_MMC0		63
     52  1.1  jmcneill #define CLK_BUS_MMC1		64
     53  1.1  jmcneill #define CLK_BUS_MMC2		65
     54  1.1  jmcneill #define CLK_BUS_UART0		66
     55  1.1  jmcneill #define CLK_BUS_UART1		67
     56  1.1  jmcneill #define CLK_BUS_UART2		68
     57  1.1  jmcneill #define CLK_BUS_UART3		69
     58  1.1  jmcneill #define CLK_BUS_UART4		70
     59  1.1  jmcneill #define CLK_BUS_UART5		71
     60  1.1  jmcneill #define CLK_BUS_I2C0		72
     61  1.1  jmcneill #define CLK_BUS_I2C1		73
     62  1.1  jmcneill #define CLK_BUS_I2C2		74
     63  1.1  jmcneill #define CLK_BUS_I2C3		75
     64  1.1  jmcneill #define CLK_BUS_I2C4		76
     65  1.1  jmcneill #define CLK_SPI0		77
     66  1.1  jmcneill #define CLK_SPI1		78
     67  1.1  jmcneill #define CLK_BUS_SPI0		79
     68  1.1  jmcneill #define CLK_BUS_SPI1		80
     69  1.1  jmcneill #define CLK_EMAC_25M		81
     70  1.1  jmcneill #define CLK_BUS_EMAC0		82
     71  1.1  jmcneill #define CLK_BUS_EMAC1		83
     72  1.1  jmcneill #define CLK_TS			84
     73  1.1  jmcneill #define CLK_BUS_TS		85
     74  1.1  jmcneill #define CLK_BUS_THS		86
     75  1.1  jmcneill #define CLK_SPDIF		87
     76  1.1  jmcneill #define CLK_BUS_SPDIF		88
     77  1.1  jmcneill #define CLK_DMIC		89
     78  1.1  jmcneill #define CLK_BUS_DMIC		90
     79  1.1  jmcneill #define CLK_AUDIO_CODEC_1X	91
     80  1.1  jmcneill #define CLK_AUDIO_CODEC_4X	92
     81  1.1  jmcneill #define CLK_BUS_AUDIO_CODEC	93
     82  1.1  jmcneill #define CLK_AUDIO_HUB		94
     83  1.1  jmcneill #define CLK_BUS_AUDIO_HUB	95
     84  1.1  jmcneill #define CLK_USB_OHCI0		96
     85  1.1  jmcneill #define CLK_USB_PHY0		97
     86  1.1  jmcneill #define CLK_USB_OHCI1		98
     87  1.1  jmcneill #define CLK_USB_PHY1		99
     88  1.1  jmcneill #define CLK_USB_OHCI2		100
     89  1.1  jmcneill #define CLK_USB_PHY2		101
     90  1.1  jmcneill #define CLK_USB_OHCI3		102
     91  1.1  jmcneill #define CLK_USB_PHY3		103
     92  1.1  jmcneill #define CLK_BUS_OHCI0		104
     93  1.1  jmcneill #define CLK_BUS_OHCI1		105
     94  1.1  jmcneill #define CLK_BUS_OHCI2		106
     95  1.1  jmcneill #define CLK_BUS_OHCI3		107
     96  1.1  jmcneill #define CLK_BUS_EHCI0		108
     97  1.1  jmcneill #define CLK_BUS_EHCI1		109
     98  1.1  jmcneill #define CLK_BUS_EHCI2		110
     99  1.1  jmcneill #define CLK_BUS_EHCI3		111
    100  1.1  jmcneill #define CLK_BUS_OTG		112
    101  1.1  jmcneill #define CLK_BUS_KEYADC		113
    102  1.1  jmcneill #define CLK_HDMI		114
    103  1.1  jmcneill #define CLK_HDMI_SLOW		115
    104  1.1  jmcneill #define CLK_HDMI_CEC		116
    105  1.1  jmcneill #define CLK_BUS_HDMI		117
    106  1.1  jmcneill #define CLK_BUS_TCON_TOP	118
    107  1.1  jmcneill #define CLK_TCON_TV0		119
    108  1.1  jmcneill #define CLK_TCON_TV1		120
    109  1.1  jmcneill #define CLK_BUS_TCON_TV0	121
    110  1.1  jmcneill #define CLK_BUS_TCON_TV1	122
    111  1.1  jmcneill #define CLK_TVE0		123
    112  1.1  jmcneill #define CLK_BUS_TVE_TOP		124
    113  1.1  jmcneill #define CLK_BUS_TVE0		125
    114  1.1  jmcneill #define CLK_HDCP		126
    115  1.1  jmcneill #define CLK_BUS_HDCP		127
    116  1.1  jmcneill 
    117  1.1  jmcneill #endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
    118