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      1 /*	$NetBSD: sun50i-h616-ccu.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
      2 
      3 /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
      4 /*
      5  * Copyright (C) 2020 Arm Ltd.
      6  */
      7 
      8 #ifndef _DT_BINDINGS_CLK_SUN50I_H616_H_
      9 #define _DT_BINDINGS_CLK_SUN50I_H616_H_
     10 
     11 #define CLK_PLL_PERIPH0		4
     12 
     13 #define CLK_CPUX		21
     14 
     15 #define CLK_APB1		26
     16 
     17 #define CLK_DE			29
     18 #define CLK_BUS_DE		30
     19 #define CLK_DEINTERLACE		31
     20 #define CLK_BUS_DEINTERLACE	32
     21 #define CLK_G2D			33
     22 #define CLK_BUS_G2D		34
     23 #define CLK_GPU0		35
     24 #define CLK_BUS_GPU		36
     25 #define CLK_GPU1		37
     26 #define CLK_CE			38
     27 #define CLK_BUS_CE		39
     28 #define CLK_VE			40
     29 #define CLK_BUS_VE		41
     30 #define CLK_BUS_DMA		42
     31 #define CLK_BUS_HSTIMER		43
     32 #define CLK_AVS			44
     33 #define CLK_BUS_DBG		45
     34 #define CLK_BUS_PSI		46
     35 #define CLK_BUS_PWM		47
     36 #define CLK_BUS_IOMMU		48
     37 
     38 #define CLK_MBUS_DMA		50
     39 #define CLK_MBUS_VE		51
     40 #define CLK_MBUS_CE		52
     41 #define CLK_MBUS_TS		53
     42 #define CLK_MBUS_NAND		54
     43 #define CLK_MBUS_G2D		55
     44 
     45 #define CLK_NAND0		57
     46 #define CLK_NAND1		58
     47 #define CLK_BUS_NAND		59
     48 #define CLK_MMC0		60
     49 #define CLK_MMC1		61
     50 #define CLK_MMC2		62
     51 #define CLK_BUS_MMC0		63
     52 #define CLK_BUS_MMC1		64
     53 #define CLK_BUS_MMC2		65
     54 #define CLK_BUS_UART0		66
     55 #define CLK_BUS_UART1		67
     56 #define CLK_BUS_UART2		68
     57 #define CLK_BUS_UART3		69
     58 #define CLK_BUS_UART4		70
     59 #define CLK_BUS_UART5		71
     60 #define CLK_BUS_I2C0		72
     61 #define CLK_BUS_I2C1		73
     62 #define CLK_BUS_I2C2		74
     63 #define CLK_BUS_I2C3		75
     64 #define CLK_BUS_I2C4		76
     65 #define CLK_SPI0		77
     66 #define CLK_SPI1		78
     67 #define CLK_BUS_SPI0		79
     68 #define CLK_BUS_SPI1		80
     69 #define CLK_EMAC_25M		81
     70 #define CLK_BUS_EMAC0		82
     71 #define CLK_BUS_EMAC1		83
     72 #define CLK_TS			84
     73 #define CLK_BUS_TS		85
     74 #define CLK_BUS_THS		86
     75 #define CLK_SPDIF		87
     76 #define CLK_BUS_SPDIF		88
     77 #define CLK_DMIC		89
     78 #define CLK_BUS_DMIC		90
     79 #define CLK_AUDIO_CODEC_1X	91
     80 #define CLK_AUDIO_CODEC_4X	92
     81 #define CLK_BUS_AUDIO_CODEC	93
     82 #define CLK_AUDIO_HUB		94
     83 #define CLK_BUS_AUDIO_HUB	95
     84 #define CLK_USB_OHCI0		96
     85 #define CLK_USB_PHY0		97
     86 #define CLK_USB_OHCI1		98
     87 #define CLK_USB_PHY1		99
     88 #define CLK_USB_OHCI2		100
     89 #define CLK_USB_PHY2		101
     90 #define CLK_USB_OHCI3		102
     91 #define CLK_USB_PHY3		103
     92 #define CLK_BUS_OHCI0		104
     93 #define CLK_BUS_OHCI1		105
     94 #define CLK_BUS_OHCI2		106
     95 #define CLK_BUS_OHCI3		107
     96 #define CLK_BUS_EHCI0		108
     97 #define CLK_BUS_EHCI1		109
     98 #define CLK_BUS_EHCI2		110
     99 #define CLK_BUS_EHCI3		111
    100 #define CLK_BUS_OTG		112
    101 #define CLK_BUS_KEYADC		113
    102 #define CLK_HDMI		114
    103 #define CLK_HDMI_SLOW		115
    104 #define CLK_HDMI_CEC		116
    105 #define CLK_BUS_HDMI		117
    106 #define CLK_BUS_TCON_TOP	118
    107 #define CLK_TCON_TV0		119
    108 #define CLK_TCON_TV1		120
    109 #define CLK_BUS_TCON_TV0	121
    110 #define CLK_BUS_TCON_TV1	122
    111 #define CLK_TVE0		123
    112 #define CLK_BUS_TVE_TOP		124
    113 #define CLK_BUS_TVE0		125
    114 #define CLK_HDCP		126
    115 #define CLK_BUS_HDCP		127
    116 
    117 #endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
    118