1/* $NetBSD: toshiba,tmpv770x.h,v 1.1.1.1 2026/01/18 05:21:43 skrll Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4 5#ifndef _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ 6#define _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ 7 8/* PLL */ 9#define TMPV770X_PLL_PIPLL0 0 10#define TMPV770X_PLL_PIPLL1 1 11#define TMPV770X_PLL_PIDNNPLL 2 12#define TMPV770X_PLL_PIETHERPLL 3 13#define TMPV770X_PLL_PIDDRCPLL 4 14#define TMPV770X_PLL_PIVOIFPLL 5 15#define TMPV770X_PLL_PIIMGERPLL 6 16#define TMPV770X_NR_PLL 7 17 18/* Clocks */ 19#define TMPV770X_CLK_PIPLL1_DIV1 0 20#define TMPV770X_CLK_PIPLL1_DIV2 1 21#define TMPV770X_CLK_PIPLL1_DIV4 2 22#define TMPV770X_CLK_PIDNNPLL_DIV1 3 23#define TMPV770X_CLK_DDRC_PHY_PLL0 4 24#define TMPV770X_CLK_DDRC_PHY_PLL1 5 25#define TMPV770X_CLK_D_PHYPLL 6 26#define TMPV770X_CLK_PHY_PCIEPLL 7 27#define TMPV770X_CLK_CA53CL0 8 28#define TMPV770X_CLK_CA53CL1 9 29#define TMPV770X_CLK_PISDMAC 10 30#define TMPV770X_CLK_PIPDMAC0 11 31#define TMPV770X_CLK_PIPDMAC1 12 32#define TMPV770X_CLK_PIWRAM 13 33#define TMPV770X_CLK_DDRC0 14 34#define TMPV770X_CLK_DDRC0_SCLK 15 35#define TMPV770X_CLK_DDRC0_NCLK 16 36#define TMPV770X_CLK_DDRC0_MCLK 17 37#define TMPV770X_CLK_DDRC0_APBCLK 18 38#define TMPV770X_CLK_DDRC1 19 39#define TMPV770X_CLK_DDRC1_SCLK 20 40#define TMPV770X_CLK_DDRC1_NCLK 21 41#define TMPV770X_CLK_DDRC1_MCLK 22 42#define TMPV770X_CLK_DDRC1_APBCLK 23 43#define TMPV770X_CLK_HOX 24 44#define TMPV770X_CLK_PCIE_MSTR 25 45#define TMPV770X_CLK_PCIE_AUX 26 46#define TMPV770X_CLK_PIINTC 27 47#define TMPV770X_CLK_PIETHER_BUS 28 48#define TMPV770X_CLK_PISPI0 29 49#define TMPV770X_CLK_PISPI1 30 50#define TMPV770X_CLK_PISPI2 31 51#define TMPV770X_CLK_PISPI3 32 52#define TMPV770X_CLK_PISPI4 33 53#define TMPV770X_CLK_PISPI5 34 54#define TMPV770X_CLK_PISPI6 35 55#define TMPV770X_CLK_PIUART0 36 56#define TMPV770X_CLK_PIUART1 37 57#define TMPV770X_CLK_PIUART2 38 58#define TMPV770X_CLK_PIUART3 39 59#define TMPV770X_CLK_PII2C0 40 60#define TMPV770X_CLK_PII2C1 41 61#define TMPV770X_CLK_PII2C2 42 62#define TMPV770X_CLK_PII2C3 43 63#define TMPV770X_CLK_PII2C4 44 64#define TMPV770X_CLK_PII2C5 45 65#define TMPV770X_CLK_PII2C6 46 66#define TMPV770X_CLK_PII2C7 47 67#define TMPV770X_CLK_PII2C8 48 68#define TMPV770X_CLK_PIGPIO 49 69#define TMPV770X_CLK_PIPGM 50 70#define TMPV770X_CLK_PIPCMIF 51 71#define TMPV770X_CLK_PIPCMIF_AUDIO_O 52 72#define TMPV770X_CLK_PIPCMIF_AUDIO_I 53 73#define TMPV770X_CLK_PICMPT0 54 74#define TMPV770X_CLK_PICMPT1 55 75#define TMPV770X_CLK_PITSC 56 76#define TMPV770X_CLK_PIUWDT 57 77#define TMPV770X_CLK_PISWDT 58 78#define TMPV770X_CLK_WDTCLK 59 79#define TMPV770X_CLK_PISUBUS_150M 60 80#define TMPV770X_CLK_PISUBUS_300M 61 81#define TMPV770X_CLK_PIPMU 62 82#define TMPV770X_CLK_PIGPMU 63 83#define TMPV770X_CLK_PITMU 64 84#define TMPV770X_CLK_WRCK 65 85#define TMPV770X_CLK_PIEMM 66 86#define TMPV770X_CLK_PIMISC 67 87#define TMPV770X_CLK_PIGCOMM 68 88#define TMPV770X_CLK_PIDCOMM 69 89#define TMPV770X_CLK_PICKMON 70 90#define TMPV770X_CLK_PIMBUS 71 91#define TMPV770X_CLK_SBUSCLK 72 92#define TMPV770X_CLK_DDR0_APBCLKCLK 73 93#define TMPV770X_CLK_DDR1_APBCLKCLK 74 94#define TMPV770X_CLK_DSP0_PBCLK 75 95#define TMPV770X_CLK_DSP1_PBCLK 76 96#define TMPV770X_CLK_DSP2_PBCLK 77 97#define TMPV770X_CLK_DSP3_PBCLK 78 98#define TMPV770X_CLK_DSVIIF0_APBCLK 79 99#define TMPV770X_CLK_VIIF0_APBCLK 80 100#define TMPV770X_CLK_VIIF0_CFGCLK 81 101#define TMPV770X_CLK_VIIF1_APBCLK 82 102#define TMPV770X_CLK_VIIF1_CFGCLK 83 103#define TMPV770X_CLK_VIIF2_APBCLK 84 104#define TMPV770X_CLK_VIIF2_CFGCLK 85 105#define TMPV770X_CLK_VIIF3_APBCLK 86 106#define TMPV770X_CLK_VIIF3_CFGCLK 87 107#define TMPV770X_CLK_VIIF4_APBCLK 88 108#define TMPV770X_CLK_VIIF4_CFGCLK 89 109#define TMPV770X_CLK_VIIF5_APBCLK 90 110#define TMPV770X_CLK_VIIF5_CFGCLK 91 111#define TMPV770X_CLK_VOIF_SBUSCLK 92 112#define TMPV770X_CLK_VOIF_PROCCLK 93 113#define TMPV770X_CLK_VOIF_DPHYCFGCLK 94 114#define TMPV770X_CLK_DNN0 95 115#define TMPV770X_CLK_STMAT 96 116#define TMPV770X_CLK_HWA0 97 117#define TMPV770X_CLK_AFFINE0 98 118#define TMPV770X_CLK_HAMAT 99 119#define TMPV770X_CLK_SMLDB 100 120#define TMPV770X_CLK_HWA0_ASYNC 101 121#define TMPV770X_CLK_HWA2 102 122#define TMPV770X_CLK_FLMAT 103 123#define TMPV770X_CLK_PYRAMID 104 124#define TMPV770X_CLK_HWA2_ASYNC 105 125#define TMPV770X_CLK_DSP0 106 126#define TMPV770X_CLK_VIIFBS0 107 127#define TMPV770X_CLK_VIIFBS0_L2ISP 108 128#define TMPV770X_CLK_VIIFBS0_L1ISP 109 129#define TMPV770X_CLK_VIIFBS0_PROC 110 130#define TMPV770X_CLK_VIIFBS1 111 131#define TMPV770X_CLK_VIIFBS2 112 132#define TMPV770X_CLK_VIIFOP_MBUS 113 133#define TMPV770X_CLK_VIIFOP0_PROC 114 134#define TMPV770X_CLK_PIETHER_2P5M 115 135#define TMPV770X_CLK_PIETHER_25M 116 136#define TMPV770X_CLK_PIETHER_50M 117 137#define TMPV770X_CLK_PIETHER_125M 118 138#define TMPV770X_CLK_VOIF0_DPHYCFG 119 139#define TMPV770X_CLK_VOIF0_PROC 120 140#define TMPV770X_CLK_VOIF0_SBUS 121 141#define TMPV770X_CLK_VOIF0_DSIREF 122 142#define TMPV770X_CLK_VOIF0_PIXEL 123 143#define TMPV770X_CLK_PIREFCLK 124 144#define TMPV770X_CLK_SBUS 125 145#define TMPV770X_CLK_BUSLCK 126 146#define TMPV770X_NR_CLK 127 147 148/* Reset */ 149#define TMPV770X_RESET_PIETHER_2P5M 0 150#define TMPV770X_RESET_PIETHER_25M 1 151#define TMPV770X_RESET_PIETHER_50M 2 152#define TMPV770X_RESET_PIETHER_125M 3 153#define TMPV770X_RESET_HOX 4 154#define TMPV770X_RESET_PCIE_MSTR 5 155#define TMPV770X_RESET_PCIE_AUX 6 156#define TMPV770X_RESET_PIINTC 7 157#define TMPV770X_RESET_PIETHER_BUS 8 158#define TMPV770X_RESET_PISPI0 9 159#define TMPV770X_RESET_PISPI1 10 160#define TMPV770X_RESET_PISPI2 11 161#define TMPV770X_RESET_PISPI3 12 162#define TMPV770X_RESET_PISPI4 13 163#define TMPV770X_RESET_PISPI5 14 164#define TMPV770X_RESET_PISPI6 15 165#define TMPV770X_RESET_PIUART0 16 166#define TMPV770X_RESET_PIUART1 17 167#define TMPV770X_RESET_PIUART2 18 168#define TMPV770X_RESET_PIUART3 19 169#define TMPV770X_RESET_PII2C0 20 170#define TMPV770X_RESET_PII2C1 21 171#define TMPV770X_RESET_PII2C2 22 172#define TMPV770X_RESET_PII2C3 23 173#define TMPV770X_RESET_PII2C4 24 174#define TMPV770X_RESET_PII2C5 25 175#define TMPV770X_RESET_PII2C6 26 176#define TMPV770X_RESET_PII2C7 27 177#define TMPV770X_RESET_PII2C8 28 178#define TMPV770X_RESET_PIPCMIF 29 179#define TMPV770X_RESET_PICKMON 30 180#define TMPV770X_RESET_SBUSCLK 31 181#define TMPV770X_NR_RESET 32 182 183#endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */ 184