11.1Sskrll/* $NetBSD: toshiba,tmpv770x.h,v 1.1.1.1 2026/01/18 05:21:43 skrll Exp $ */ 21.1Sskrll 31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 41.1Sskrll 51.1Sskrll#ifndef _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ 61.1Sskrll#define _DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ 71.1Sskrll 81.1Sskrll/* PLL */ 91.1Sskrll#define TMPV770X_PLL_PIPLL0 0 101.1Sskrll#define TMPV770X_PLL_PIPLL1 1 111.1Sskrll#define TMPV770X_PLL_PIDNNPLL 2 121.1Sskrll#define TMPV770X_PLL_PIETHERPLL 3 131.1Sskrll#define TMPV770X_PLL_PIDDRCPLL 4 141.1Sskrll#define TMPV770X_PLL_PIVOIFPLL 5 151.1Sskrll#define TMPV770X_PLL_PIIMGERPLL 6 161.1Sskrll#define TMPV770X_NR_PLL 7 171.1Sskrll 181.1Sskrll/* Clocks */ 191.1Sskrll#define TMPV770X_CLK_PIPLL1_DIV1 0 201.1Sskrll#define TMPV770X_CLK_PIPLL1_DIV2 1 211.1Sskrll#define TMPV770X_CLK_PIPLL1_DIV4 2 221.1Sskrll#define TMPV770X_CLK_PIDNNPLL_DIV1 3 231.1Sskrll#define TMPV770X_CLK_DDRC_PHY_PLL0 4 241.1Sskrll#define TMPV770X_CLK_DDRC_PHY_PLL1 5 251.1Sskrll#define TMPV770X_CLK_D_PHYPLL 6 261.1Sskrll#define TMPV770X_CLK_PHY_PCIEPLL 7 271.1Sskrll#define TMPV770X_CLK_CA53CL0 8 281.1Sskrll#define TMPV770X_CLK_CA53CL1 9 291.1Sskrll#define TMPV770X_CLK_PISDMAC 10 301.1Sskrll#define TMPV770X_CLK_PIPDMAC0 11 311.1Sskrll#define TMPV770X_CLK_PIPDMAC1 12 321.1Sskrll#define TMPV770X_CLK_PIWRAM 13 331.1Sskrll#define TMPV770X_CLK_DDRC0 14 341.1Sskrll#define TMPV770X_CLK_DDRC0_SCLK 15 351.1Sskrll#define TMPV770X_CLK_DDRC0_NCLK 16 361.1Sskrll#define TMPV770X_CLK_DDRC0_MCLK 17 371.1Sskrll#define TMPV770X_CLK_DDRC0_APBCLK 18 381.1Sskrll#define TMPV770X_CLK_DDRC1 19 391.1Sskrll#define TMPV770X_CLK_DDRC1_SCLK 20 401.1Sskrll#define TMPV770X_CLK_DDRC1_NCLK 21 411.1Sskrll#define TMPV770X_CLK_DDRC1_MCLK 22 421.1Sskrll#define TMPV770X_CLK_DDRC1_APBCLK 23 431.1Sskrll#define TMPV770X_CLK_HOX 24 441.1Sskrll#define TMPV770X_CLK_PCIE_MSTR 25 451.1Sskrll#define TMPV770X_CLK_PCIE_AUX 26 461.1Sskrll#define TMPV770X_CLK_PIINTC 27 471.1Sskrll#define TMPV770X_CLK_PIETHER_BUS 28 481.1Sskrll#define TMPV770X_CLK_PISPI0 29 491.1Sskrll#define TMPV770X_CLK_PISPI1 30 501.1Sskrll#define TMPV770X_CLK_PISPI2 31 511.1Sskrll#define TMPV770X_CLK_PISPI3 32 521.1Sskrll#define TMPV770X_CLK_PISPI4 33 531.1Sskrll#define TMPV770X_CLK_PISPI5 34 541.1Sskrll#define TMPV770X_CLK_PISPI6 35 551.1Sskrll#define TMPV770X_CLK_PIUART0 36 561.1Sskrll#define TMPV770X_CLK_PIUART1 37 571.1Sskrll#define TMPV770X_CLK_PIUART2 38 581.1Sskrll#define TMPV770X_CLK_PIUART3 39 591.1Sskrll#define TMPV770X_CLK_PII2C0 40 601.1Sskrll#define TMPV770X_CLK_PII2C1 41 611.1Sskrll#define TMPV770X_CLK_PII2C2 42 621.1Sskrll#define TMPV770X_CLK_PII2C3 43 631.1Sskrll#define TMPV770X_CLK_PII2C4 44 641.1Sskrll#define TMPV770X_CLK_PII2C5 45 651.1Sskrll#define TMPV770X_CLK_PII2C6 46 661.1Sskrll#define TMPV770X_CLK_PII2C7 47 671.1Sskrll#define TMPV770X_CLK_PII2C8 48 681.1Sskrll#define TMPV770X_CLK_PIGPIO 49 691.1Sskrll#define TMPV770X_CLK_PIPGM 50 701.1Sskrll#define TMPV770X_CLK_PIPCMIF 51 711.1Sskrll#define TMPV770X_CLK_PIPCMIF_AUDIO_O 52 721.1Sskrll#define TMPV770X_CLK_PIPCMIF_AUDIO_I 53 731.1Sskrll#define TMPV770X_CLK_PICMPT0 54 741.1Sskrll#define TMPV770X_CLK_PICMPT1 55 751.1Sskrll#define TMPV770X_CLK_PITSC 56 761.1Sskrll#define TMPV770X_CLK_PIUWDT 57 771.1Sskrll#define TMPV770X_CLK_PISWDT 58 781.1Sskrll#define TMPV770X_CLK_WDTCLK 59 791.1Sskrll#define TMPV770X_CLK_PISUBUS_150M 60 801.1Sskrll#define TMPV770X_CLK_PISUBUS_300M 61 811.1Sskrll#define TMPV770X_CLK_PIPMU 62 821.1Sskrll#define TMPV770X_CLK_PIGPMU 63 831.1Sskrll#define TMPV770X_CLK_PITMU 64 841.1Sskrll#define TMPV770X_CLK_WRCK 65 851.1Sskrll#define TMPV770X_CLK_PIEMM 66 861.1Sskrll#define TMPV770X_CLK_PIMISC 67 871.1Sskrll#define TMPV770X_CLK_PIGCOMM 68 881.1Sskrll#define TMPV770X_CLK_PIDCOMM 69 891.1Sskrll#define TMPV770X_CLK_PICKMON 70 901.1Sskrll#define TMPV770X_CLK_PIMBUS 71 911.1Sskrll#define TMPV770X_CLK_SBUSCLK 72 921.1Sskrll#define TMPV770X_CLK_DDR0_APBCLKCLK 73 931.1Sskrll#define TMPV770X_CLK_DDR1_APBCLKCLK 74 941.1Sskrll#define TMPV770X_CLK_DSP0_PBCLK 75 951.1Sskrll#define TMPV770X_CLK_DSP1_PBCLK 76 961.1Sskrll#define TMPV770X_CLK_DSP2_PBCLK 77 971.1Sskrll#define TMPV770X_CLK_DSP3_PBCLK 78 981.1Sskrll#define TMPV770X_CLK_DSVIIF0_APBCLK 79 991.1Sskrll#define TMPV770X_CLK_VIIF0_APBCLK 80 1001.1Sskrll#define TMPV770X_CLK_VIIF0_CFGCLK 81 1011.1Sskrll#define TMPV770X_CLK_VIIF1_APBCLK 82 1021.1Sskrll#define TMPV770X_CLK_VIIF1_CFGCLK 83 1031.1Sskrll#define TMPV770X_CLK_VIIF2_APBCLK 84 1041.1Sskrll#define TMPV770X_CLK_VIIF2_CFGCLK 85 1051.1Sskrll#define TMPV770X_CLK_VIIF3_APBCLK 86 1061.1Sskrll#define TMPV770X_CLK_VIIF3_CFGCLK 87 1071.1Sskrll#define TMPV770X_CLK_VIIF4_APBCLK 88 1081.1Sskrll#define TMPV770X_CLK_VIIF4_CFGCLK 89 1091.1Sskrll#define TMPV770X_CLK_VIIF5_APBCLK 90 1101.1Sskrll#define TMPV770X_CLK_VIIF5_CFGCLK 91 1111.1Sskrll#define TMPV770X_CLK_VOIF_SBUSCLK 92 1121.1Sskrll#define TMPV770X_CLK_VOIF_PROCCLK 93 1131.1Sskrll#define TMPV770X_CLK_VOIF_DPHYCFGCLK 94 1141.1Sskrll#define TMPV770X_CLK_DNN0 95 1151.1Sskrll#define TMPV770X_CLK_STMAT 96 1161.1Sskrll#define TMPV770X_CLK_HWA0 97 1171.1Sskrll#define TMPV770X_CLK_AFFINE0 98 1181.1Sskrll#define TMPV770X_CLK_HAMAT 99 1191.1Sskrll#define TMPV770X_CLK_SMLDB 100 1201.1Sskrll#define TMPV770X_CLK_HWA0_ASYNC 101 1211.1Sskrll#define TMPV770X_CLK_HWA2 102 1221.1Sskrll#define TMPV770X_CLK_FLMAT 103 1231.1Sskrll#define TMPV770X_CLK_PYRAMID 104 1241.1Sskrll#define TMPV770X_CLK_HWA2_ASYNC 105 1251.1Sskrll#define TMPV770X_CLK_DSP0 106 1261.1Sskrll#define TMPV770X_CLK_VIIFBS0 107 1271.1Sskrll#define TMPV770X_CLK_VIIFBS0_L2ISP 108 1281.1Sskrll#define TMPV770X_CLK_VIIFBS0_L1ISP 109 1291.1Sskrll#define TMPV770X_CLK_VIIFBS0_PROC 110 1301.1Sskrll#define TMPV770X_CLK_VIIFBS1 111 1311.1Sskrll#define TMPV770X_CLK_VIIFBS2 112 1321.1Sskrll#define TMPV770X_CLK_VIIFOP_MBUS 113 1331.1Sskrll#define TMPV770X_CLK_VIIFOP0_PROC 114 1341.1Sskrll#define TMPV770X_CLK_PIETHER_2P5M 115 1351.1Sskrll#define TMPV770X_CLK_PIETHER_25M 116 1361.1Sskrll#define TMPV770X_CLK_PIETHER_50M 117 1371.1Sskrll#define TMPV770X_CLK_PIETHER_125M 118 1381.1Sskrll#define TMPV770X_CLK_VOIF0_DPHYCFG 119 1391.1Sskrll#define TMPV770X_CLK_VOIF0_PROC 120 1401.1Sskrll#define TMPV770X_CLK_VOIF0_SBUS 121 1411.1Sskrll#define TMPV770X_CLK_VOIF0_DSIREF 122 1421.1Sskrll#define TMPV770X_CLK_VOIF0_PIXEL 123 1431.1Sskrll#define TMPV770X_CLK_PIREFCLK 124 1441.1Sskrll#define TMPV770X_CLK_SBUS 125 1451.1Sskrll#define TMPV770X_CLK_BUSLCK 126 1461.1Sskrll#define TMPV770X_NR_CLK 127 1471.1Sskrll 1481.1Sskrll/* Reset */ 1491.1Sskrll#define TMPV770X_RESET_PIETHER_2P5M 0 1501.1Sskrll#define TMPV770X_RESET_PIETHER_25M 1 1511.1Sskrll#define TMPV770X_RESET_PIETHER_50M 2 1521.1Sskrll#define TMPV770X_RESET_PIETHER_125M 3 1531.1Sskrll#define TMPV770X_RESET_HOX 4 1541.1Sskrll#define TMPV770X_RESET_PCIE_MSTR 5 1551.1Sskrll#define TMPV770X_RESET_PCIE_AUX 6 1561.1Sskrll#define TMPV770X_RESET_PIINTC 7 1571.1Sskrll#define TMPV770X_RESET_PIETHER_BUS 8 1581.1Sskrll#define TMPV770X_RESET_PISPI0 9 1591.1Sskrll#define TMPV770X_RESET_PISPI1 10 1601.1Sskrll#define TMPV770X_RESET_PISPI2 11 1611.1Sskrll#define TMPV770X_RESET_PISPI3 12 1621.1Sskrll#define TMPV770X_RESET_PISPI4 13 1631.1Sskrll#define TMPV770X_RESET_PISPI5 14 1641.1Sskrll#define TMPV770X_RESET_PISPI6 15 1651.1Sskrll#define TMPV770X_RESET_PIUART0 16 1661.1Sskrll#define TMPV770X_RESET_PIUART1 17 1671.1Sskrll#define TMPV770X_RESET_PIUART2 18 1681.1Sskrll#define TMPV770X_RESET_PIUART3 19 1691.1Sskrll#define TMPV770X_RESET_PII2C0 20 1701.1Sskrll#define TMPV770X_RESET_PII2C1 21 1711.1Sskrll#define TMPV770X_RESET_PII2C2 22 1721.1Sskrll#define TMPV770X_RESET_PII2C3 23 1731.1Sskrll#define TMPV770X_RESET_PII2C4 24 1741.1Sskrll#define TMPV770X_RESET_PII2C5 25 1751.1Sskrll#define TMPV770X_RESET_PII2C6 26 1761.1Sskrll#define TMPV770X_RESET_PII2C7 27 1771.1Sskrll#define TMPV770X_RESET_PII2C8 28 1781.1Sskrll#define TMPV770X_RESET_PIPCMIF 29 1791.1Sskrll#define TMPV770X_RESET_PICKMON 30 1801.1Sskrll#define TMPV770X_RESET_SBUSCLK 31 1811.1Sskrll#define TMPV770X_NR_RESET 32 1821.1Sskrll 1831.1Sskrll#endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */ 184