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      1  1.1  jmcneill /*	$NetBSD: jz4780-dma.h,v 1.1.1.1 2018/06/27 16:27:08 jmcneill Exp $	*/
      2  1.1  jmcneill 
      3  1.1  jmcneill #ifndef __DT_BINDINGS_DMA_JZ4780_DMA_H__
      4  1.1  jmcneill #define __DT_BINDINGS_DMA_JZ4780_DMA_H__
      5  1.1  jmcneill 
      6  1.1  jmcneill /*
      7  1.1  jmcneill  * Request type numbers for the JZ4780 DMA controller (written to the DRTn
      8  1.1  jmcneill  * register for the channel).
      9  1.1  jmcneill  */
     10  1.1  jmcneill #define JZ4780_DMA_I2S1_TX	0x4
     11  1.1  jmcneill #define JZ4780_DMA_I2S1_RX	0x5
     12  1.1  jmcneill #define JZ4780_DMA_I2S0_TX	0x6
     13  1.1  jmcneill #define JZ4780_DMA_I2S0_RX	0x7
     14  1.1  jmcneill #define JZ4780_DMA_AUTO		0x8
     15  1.1  jmcneill #define JZ4780_DMA_SADC_RX	0x9
     16  1.1  jmcneill #define JZ4780_DMA_UART4_TX	0xc
     17  1.1  jmcneill #define JZ4780_DMA_UART4_RX	0xd
     18  1.1  jmcneill #define JZ4780_DMA_UART3_TX	0xe
     19  1.1  jmcneill #define JZ4780_DMA_UART3_RX	0xf
     20  1.1  jmcneill #define JZ4780_DMA_UART2_TX	0x10
     21  1.1  jmcneill #define JZ4780_DMA_UART2_RX	0x11
     22  1.1  jmcneill #define JZ4780_DMA_UART1_TX	0x12
     23  1.1  jmcneill #define JZ4780_DMA_UART1_RX	0x13
     24  1.1  jmcneill #define JZ4780_DMA_UART0_TX	0x14
     25  1.1  jmcneill #define JZ4780_DMA_UART0_RX	0x15
     26  1.1  jmcneill #define JZ4780_DMA_SSI0_TX	0x16
     27  1.1  jmcneill #define JZ4780_DMA_SSI0_RX	0x17
     28  1.1  jmcneill #define JZ4780_DMA_SSI1_TX	0x18
     29  1.1  jmcneill #define JZ4780_DMA_SSI1_RX	0x19
     30  1.1  jmcneill #define JZ4780_DMA_MSC0_TX	0x1a
     31  1.1  jmcneill #define JZ4780_DMA_MSC0_RX	0x1b
     32  1.1  jmcneill #define JZ4780_DMA_MSC1_TX	0x1c
     33  1.1  jmcneill #define JZ4780_DMA_MSC1_RX	0x1d
     34  1.1  jmcneill #define JZ4780_DMA_MSC2_TX	0x1e
     35  1.1  jmcneill #define JZ4780_DMA_MSC2_RX	0x1f
     36  1.1  jmcneill #define JZ4780_DMA_PCM0_TX	0x20
     37  1.1  jmcneill #define JZ4780_DMA_PCM0_RX	0x21
     38  1.1  jmcneill #define JZ4780_DMA_SMB0_TX	0x24
     39  1.1  jmcneill #define JZ4780_DMA_SMB0_RX	0x25
     40  1.1  jmcneill #define JZ4780_DMA_SMB1_TX	0x26
     41  1.1  jmcneill #define JZ4780_DMA_SMB1_RX	0x27
     42  1.1  jmcneill #define JZ4780_DMA_SMB2_TX	0x28
     43  1.1  jmcneill #define JZ4780_DMA_SMB2_RX	0x29
     44  1.1  jmcneill #define JZ4780_DMA_SMB3_TX	0x2a
     45  1.1  jmcneill #define JZ4780_DMA_SMB3_RX	0x2b
     46  1.1  jmcneill #define JZ4780_DMA_SMB4_TX	0x2c
     47  1.1  jmcneill #define JZ4780_DMA_SMB4_RX	0x2d
     48  1.1  jmcneill #define JZ4780_DMA_DES_TX	0x2e
     49  1.1  jmcneill #define JZ4780_DMA_DES_RX	0x2f
     50  1.1  jmcneill 
     51  1.1  jmcneill #endif /* __DT_BINDINGS_DMA_JZ4780_DMA_H__ */
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