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      1  1.1  jmcneill /*	$NetBSD: mt8173-gce.h,v 1.1.1.1 2019/01/22 14:57:01 jmcneill Exp $	*/
      2  1.1  jmcneill 
      3  1.1  jmcneill /* SPDX-License-Identifier: GPL-2.0 */
      4  1.1  jmcneill /*
      5  1.1  jmcneill  * Copyright (c) 2018 MediaTek Inc.
      6  1.1  jmcneill  * Author: Houlong Wei <houlong.wei (at) mediatek.com>
      7  1.1  jmcneill  *
      8  1.1  jmcneill  */
      9  1.1  jmcneill 
     10  1.1  jmcneill #ifndef _DT_BINDINGS_GCE_MT8173_H
     11  1.1  jmcneill #define _DT_BINDINGS_GCE_MT8173_H
     12  1.1  jmcneill 
     13  1.1  jmcneill /* GCE HW thread priority */
     14  1.1  jmcneill #define CMDQ_THR_PRIO_LOWEST	0
     15  1.1  jmcneill #define CMDQ_THR_PRIO_HIGHEST	1
     16  1.1  jmcneill 
     17  1.1  jmcneill /* GCE SUBSYS */
     18  1.1  jmcneill #define SUBSYS_1400XXXX		1
     19  1.1  jmcneill #define SUBSYS_1401XXXX		2
     20  1.1  jmcneill #define SUBSYS_1402XXXX		3
     21  1.1  jmcneill 
     22  1.1  jmcneill /* GCE HW EVENT */
     23  1.1  jmcneill #define CMDQ_EVENT_DISP_OVL0_SOF		11
     24  1.1  jmcneill #define CMDQ_EVENT_DISP_OVL1_SOF		12
     25  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA0_SOF		13
     26  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA1_SOF		14
     27  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA2_SOF		15
     28  1.1  jmcneill #define CMDQ_EVENT_DISP_WDMA0_SOF		16
     29  1.1  jmcneill #define CMDQ_EVENT_DISP_WDMA1_SOF		17
     30  1.1  jmcneill #define CMDQ_EVENT_DISP_OVL0_EOF		39
     31  1.1  jmcneill #define CMDQ_EVENT_DISP_OVL1_EOF		40
     32  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA0_EOF		41
     33  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA1_EOF		42
     34  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA2_EOF		43
     35  1.1  jmcneill #define CMDQ_EVENT_DISP_WDMA0_EOF		44
     36  1.1  jmcneill #define CMDQ_EVENT_DISP_WDMA1_EOF		45
     37  1.1  jmcneill #define CMDQ_EVENT_MUTEX0_STREAM_EOF		53
     38  1.1  jmcneill #define CMDQ_EVENT_MUTEX1_STREAM_EOF		54
     39  1.1  jmcneill #define CMDQ_EVENT_MUTEX2_STREAM_EOF		55
     40  1.1  jmcneill #define CMDQ_EVENT_MUTEX3_STREAM_EOF		56
     41  1.1  jmcneill #define CMDQ_EVENT_MUTEX4_STREAM_EOF		57
     42  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA0_UNDERRUN		63
     43  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA1_UNDERRUN		64
     44  1.1  jmcneill #define CMDQ_EVENT_DISP_RDMA2_UNDERRUN		65
     45  1.1  jmcneill 
     46  1.1  jmcneill #endif
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