1/* $NetBSD: qcom,sdx65.h,v 1.1.1.1 2026/01/18 05:21:46 skrll Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 4/* 5 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H 9#define __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H 10 11#define MASTER_LLCC 0 12#define SLAVE_EBI1 1 13 14#define MASTER_TCU_0 0 15#define MASTER_SNOC_GC_MEM_NOC 1 16#define MASTER_APPSS_PROC 2 17#define SLAVE_LLCC 3 18#define SLAVE_MEM_NOC_SNOC 4 19#define SLAVE_MEM_NOC_PCIE_SNOC 5 20 21#define MASTER_AUDIO 0 22#define MASTER_BLSP_1 1 23#define MASTER_QDSS_BAM 2 24#define MASTER_QPIC 3 25#define MASTER_SNOC_CFG 4 26#define MASTER_SPMI_FETCHER 5 27#define MASTER_ANOC_SNOC 6 28#define MASTER_IPA 7 29#define MASTER_MEM_NOC_SNOC 8 30#define MASTER_MEM_NOC_PCIE_SNOC 9 31#define MASTER_CRYPTO 10 32#define MASTER_IPA_PCIE 11 33#define MASTER_PCIE_0 12 34#define MASTER_QDSS_ETR 13 35#define MASTER_SDCC_1 14 36#define MASTER_USB3 15 37#define SLAVE_AOSS 16 38#define SLAVE_APPSS 17 39#define SLAVE_AUDIO 18 40#define SLAVE_BLSP_1 19 41#define SLAVE_CLK_CTL 20 42#define SLAVE_CRYPTO_0_CFG 21 43#define SLAVE_CNOC_DDRSS 22 44#define SLAVE_ECC_CFG 23 45#define SLAVE_IMEM_CFG 24 46#define SLAVE_IPA_CFG 25 47#define SLAVE_CNOC_MSS 26 48#define SLAVE_PCIE_PARF 27 49#define SLAVE_PDM 28 50#define SLAVE_PRNG 29 51#define SLAVE_QDSS_CFG 30 52#define SLAVE_QPIC 31 53#define SLAVE_SDCC_1 32 54#define SLAVE_SNOC_CFG 33 55#define SLAVE_SPMI_FETCHER 34 56#define SLAVE_SPMI_VGI_COEX 35 57#define SLAVE_TCSR 36 58#define SLAVE_TLMM 37 59#define SLAVE_USB3 38 60#define SLAVE_USB3_PHY_CFG 39 61#define SLAVE_ANOC_SNOC 40 62#define SLAVE_SNOC_MEM_NOC_GC 41 63#define SLAVE_IMEM 42 64#define SLAVE_SERVICE_SNOC 43 65#define SLAVE_PCIE_0 44 66#define SLAVE_QDSS_STM 45 67#define SLAVE_TCU 46 68 69#endif 70