1 /* $NetBSD: qcom,qdu1000-rpmh.h,v 1.1.1.1 2026/01/18 05:21:45 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 4 /* 5 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QDU1000_H 9 #define __DT_BINDINGS_INTERCONNECT_QCOM_QDU1000_H 10 11 #define MASTER_QUP_CORE_0 0 12 #define MASTER_QUP_CORE_1 1 13 #define SLAVE_QUP_CORE_0 2 14 #define SLAVE_QUP_CORE_1 3 15 16 #define MASTER_SYS_TCU 0 17 #define MASTER_APPSS_PROC 1 18 #define MASTER_GEMNOC_ECPRI_DMA 2 19 #define MASTER_FEC_2_GEMNOC 3 20 #define MASTER_ANOC_PCIE_GEM_NOC 4 21 #define MASTER_SNOC_GC_MEM_NOC 5 22 #define MASTER_SNOC_SF_MEM_NOC 6 23 #define MASTER_MSS_PROC 7 24 #define SLAVE_GEM_NOC_CNOC 8 25 #define SLAVE_LLCC 9 26 #define SLAVE_GEMNOC_MODEM_CNOC 10 27 #define SLAVE_MEM_NOC_PCIE_SNOC 11 28 29 #define MASTER_LLCC 0 30 #define SLAVE_EBI1 1 31 32 #define MASTER_GIC_AHB 0 33 #define MASTER_QDSS_BAM 1 34 #define MASTER_QPIC 2 35 #define MASTER_QSPI_0 3 36 #define MASTER_QUP_0 4 37 #define MASTER_QUP_1 5 38 #define MASTER_SNOC_CFG 6 39 #define MASTER_ANOC_SNOC 7 40 #define MASTER_ANOC_GSI 8 41 #define MASTER_GEM_NOC_CNOC 9 42 #define MASTER_GEMNOC_MODEM_CNOC 10 43 #define MASTER_GEM_NOC_PCIE_SNOC 11 44 #define MASTER_CRYPTO 12 45 #define MASTER_ECPRI_GSI 13 46 #define MASTER_PIMEM 14 47 #define MASTER_SNOC_ECPRI_DMA 15 48 #define MASTER_GIC 16 49 #define MASTER_PCIE 17 50 #define MASTER_QDSS_ETR 18 51 #define MASTER_QDSS_ETR_1 19 52 #define MASTER_SDCC_1 20 53 #define MASTER_USB3 21 54 #define SLAVE_AHB2PHY_SOUTH 22 55 #define SLAVE_AHB2PHY_NORTH 23 56 #define SLAVE_AHB2PHY_EAST 24 57 #define SLAVE_AOSS 25 58 #define SLAVE_CLK_CTL 26 59 #define SLAVE_RBCPR_CX_CFG 27 60 #define SLAVE_RBCPR_MX_CFG 28 61 #define SLAVE_CRYPTO_0_CFG 29 62 #define SLAVE_ECPRI_CFG 30 63 #define SLAVE_IMEM_CFG 31 64 #define SLAVE_IPC_ROUTER_CFG 32 65 #define SLAVE_CNOC_MSS 33 66 #define SLAVE_PCIE_CFG 34 67 #define SLAVE_PDM 35 68 #define SLAVE_PIMEM_CFG 36 69 #define SLAVE_PRNG 37 70 #define SLAVE_QDSS_CFG 38 71 #define SLAVE_QPIC 40 72 #define SLAVE_QSPI_0 41 73 #define SLAVE_QUP_0 42 74 #define SLAVE_QUP_1 43 75 #define SLAVE_SDCC_2 44 76 #define SLAVE_SMBUS_CFG 45 77 #define SLAVE_SNOC_CFG 46 78 #define SLAVE_TCSR 47 79 #define SLAVE_TLMM 48 80 #define SLAVE_TME_CFG 49 81 #define SLAVE_TSC_CFG 50 82 #define SLAVE_USB3_0 51 83 #define SLAVE_VSENSE_CTRL_CFG 52 84 #define SLAVE_A1NOC_SNOC 53 85 #define SLAVE_ANOC_SNOC_GSI 54 86 #define SLAVE_DDRSS_CFG 55 87 #define SLAVE_ECPRI_GEMNOC 56 88 #define SLAVE_SNOC_GEM_NOC_GC 57 89 #define SLAVE_SNOC_GEM_NOC_SF 58 90 #define SLAVE_MODEM_OFFLINE 59 91 #define SLAVE_ANOC_PCIE_GEM_NOC 60 92 #define SLAVE_IMEM 61 93 #define SLAVE_PIMEM 62 94 #define SLAVE_SERVICE_SNOC 63 95 #define SLAVE_ETHERNET_SS 64 96 #define SLAVE_PCIE_0 65 97 #define SLAVE_QDSS_STM 66 98 #define SLAVE_TCU 67 99 100 #endif 101