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      1 /*	$NetBSD: qcom,sm8650-rpmh.h,v 1.1.1.1 2026/01/18 05:21:46 skrll Exp $	*/
      2 
      3 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
      4 /*
      5  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
      6  * Copyright (c) 2023, Linaro Limited
      7  */
      8 
      9 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8650_H
     10 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8650_H
     11 
     12 #define MASTER_QSPI_0				0
     13 #define MASTER_QUP_1				1
     14 #define MASTER_QUP_3				2
     15 #define MASTER_SDCC_4				3
     16 #define MASTER_UFS_MEM				4
     17 #define MASTER_USB3_0				5
     18 #define SLAVE_A1NOC_SNOC			6
     19 
     20 #define MASTER_QDSS_BAM				0
     21 #define MASTER_QUP_2				1
     22 #define MASTER_CRYPTO				2
     23 #define MASTER_IPA				3
     24 #define MASTER_SP				4
     25 #define MASTER_QDSS_ETR				5
     26 #define MASTER_QDSS_ETR_1			6
     27 #define MASTER_SDCC_2				7
     28 #define SLAVE_A2NOC_SNOC			8
     29 
     30 #define MASTER_QUP_CORE_0			0
     31 #define MASTER_QUP_CORE_1			1
     32 #define MASTER_QUP_CORE_2			2
     33 #define SLAVE_QUP_CORE_0			3
     34 #define SLAVE_QUP_CORE_1			4
     35 #define SLAVE_QUP_CORE_2			5
     36 
     37 #define MASTER_CNOC_CFG				0
     38 #define SLAVE_AHB2PHY_SOUTH			1
     39 #define SLAVE_AHB2PHY_NORTH			2
     40 #define SLAVE_CAMERA_CFG			3
     41 #define SLAVE_CLK_CTL				4
     42 #define SLAVE_RBCPR_CX_CFG			5
     43 #define SLAVE_CPR_HMX				6
     44 #define SLAVE_RBCPR_MMCX_CFG			7
     45 #define SLAVE_RBCPR_MXA_CFG			8
     46 #define SLAVE_RBCPR_MXC_CFG			9
     47 #define SLAVE_CPR_NSPCX				10
     48 #define SLAVE_CRYPTO_0_CFG			11
     49 #define SLAVE_CX_RDPM				12
     50 #define SLAVE_DISPLAY_CFG			13
     51 #define SLAVE_GFX3D_CFG				14
     52 #define SLAVE_I2C				15
     53 #define SLAVE_I3C_IBI0_CFG			16
     54 #define SLAVE_I3C_IBI1_CFG			17
     55 #define SLAVE_IMEM_CFG				18
     56 #define SLAVE_CNOC_MSS				19
     57 #define SLAVE_MX_2_RDPM				20
     58 #define SLAVE_MX_RDPM				21
     59 #define SLAVE_PCIE_0_CFG			22
     60 #define SLAVE_PCIE_1_CFG			23
     61 #define SLAVE_PCIE_RSCC				24
     62 #define SLAVE_PDM				25
     63 #define SLAVE_PRNG				26
     64 #define SLAVE_QDSS_CFG				27
     65 #define SLAVE_QSPI_0				28
     66 #define SLAVE_QUP_3				29
     67 #define SLAVE_QUP_1				30
     68 #define SLAVE_QUP_2				31
     69 #define SLAVE_SDCC_2				32
     70 #define SLAVE_SDCC_4				33
     71 #define SLAVE_SPSS_CFG				34
     72 #define SLAVE_TCSR				35
     73 #define SLAVE_TLMM				36
     74 #define SLAVE_UFS_MEM_CFG			37
     75 #define SLAVE_USB3_0				38
     76 #define SLAVE_VENUS_CFG				39
     77 #define SLAVE_VSENSE_CTRL_CFG			40
     78 #define SLAVE_CNOC_MNOC_CFG			41
     79 #define SLAVE_NSP_QTB_CFG			42
     80 #define SLAVE_PCIE_ANOC_CFG			43
     81 #define SLAVE_SERVICE_CNOC_CFG			44
     82 #define SLAVE_QDSS_STM				45
     83 #define SLAVE_TCU				46
     84 
     85 #define MASTER_GEM_NOC_CNOC			0
     86 #define MASTER_GEM_NOC_PCIE_SNOC		1
     87 #define SLAVE_AOSS				2
     88 #define SLAVE_IPA_CFG				3
     89 #define SLAVE_IPC_ROUTER_CFG			4
     90 #define SLAVE_TME_CFG				5
     91 #define SLAVE_APPSS				6
     92 #define SLAVE_CNOC_CFG				7
     93 #define SLAVE_DDRSS_CFG				8
     94 #define SLAVE_IMEM				9
     95 #define SLAVE_SERVICE_CNOC			10
     96 #define SLAVE_PCIE_0				11
     97 #define SLAVE_PCIE_1				12
     98 
     99 #define MASTER_GPU_TCU				0
    100 #define MASTER_SYS_TCU				1
    101 #define MASTER_UBWC_P_TCU			2
    102 #define MASTER_APPSS_PROC			3
    103 #define MASTER_GFX3D				4
    104 #define MASTER_LPASS_GEM_NOC			5
    105 #define MASTER_MSS_PROC				6
    106 #define MASTER_MNOC_HF_MEM_NOC			7
    107 #define MASTER_MNOC_SF_MEM_NOC			8
    108 #define MASTER_COMPUTE_NOC			9
    109 #define MASTER_ANOC_PCIE_GEM_NOC		10
    110 #define MASTER_SNOC_SF_MEM_NOC			11
    111 #define MASTER_UBWC_P				12
    112 #define MASTER_GIC				13
    113 #define SLAVE_GEM_NOC_CNOC			14
    114 #define SLAVE_LLCC				15
    115 #define SLAVE_MEM_NOC_PCIE_SNOC			16
    116 
    117 #define MASTER_LPIAON_NOC			0
    118 #define SLAVE_LPASS_GEM_NOC			1
    119 
    120 #define MASTER_LPASS_LPINOC			0
    121 #define SLAVE_LPIAON_NOC_LPASS_AG_NOC		1
    122 
    123 #define MASTER_LPASS_PROC			0
    124 #define SLAVE_LPICX_NOC_LPIAON_NOC		1
    125 
    126 #define MASTER_LLCC				0
    127 #define SLAVE_EBI1				1
    128 
    129 #define MASTER_CAMNOC_HF			0
    130 #define MASTER_CAMNOC_ICP			1
    131 #define MASTER_CAMNOC_SF			2
    132 #define MASTER_MDP				3
    133 #define MASTER_CDSP_HCP				4
    134 #define MASTER_VIDEO				5
    135 #define MASTER_VIDEO_CV_PROC			6
    136 #define MASTER_VIDEO_PROC			7
    137 #define MASTER_VIDEO_V_PROC			8
    138 #define MASTER_CNOC_MNOC_CFG			9
    139 #define SLAVE_MNOC_HF_MEM_NOC			10
    140 #define SLAVE_MNOC_SF_MEM_NOC			11
    141 #define SLAVE_SERVICE_MNOC			12
    142 
    143 #define MASTER_CDSP_PROC			0
    144 #define SLAVE_CDSP_MEM_NOC			1
    145 
    146 #define MASTER_PCIE_ANOC_CFG			0
    147 #define MASTER_PCIE_0				1
    148 #define MASTER_PCIE_1				2
    149 #define SLAVE_ANOC_PCIE_GEM_NOC			3
    150 #define SLAVE_SERVICE_PCIE_ANOC			4
    151 
    152 #define MASTER_A1NOC_SNOC			0
    153 #define MASTER_A2NOC_SNOC			1
    154 #define SLAVE_SNOC_GEM_NOC_SF			2
    155 
    156 #endif
    157