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      1      1.1  jmcneill /*	$NetBSD: as3722.h,v 1.1.1.2 2017/11/30 19:40:51 jmcneill Exp $	*/
      2      1.1  jmcneill 
      3  1.1.1.2  jmcneill /* SPDX-License-Identifier: GPL-2.0 */
      4      1.1  jmcneill /*
      5      1.1  jmcneill  * This header provides macros for ams AS3722 device bindings.
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * Copyright (c) 2013, NVIDIA Corporation.
      8      1.1  jmcneill  *
      9      1.1  jmcneill  * Author: Laxman Dewangan <ldewangan (at) nvidia.com>
     10      1.1  jmcneill  *
     11      1.1  jmcneill  */
     12      1.1  jmcneill 
     13      1.1  jmcneill #ifndef __DT_BINDINGS_AS3722_H__
     14      1.1  jmcneill #define __DT_BINDINGS_AS3722_H__
     15      1.1  jmcneill 
     16      1.1  jmcneill /* External control pins */
     17      1.1  jmcneill #define AS3722_EXT_CONTROL_PIN_ENABLE1 1
     18      1.1  jmcneill #define AS3722_EXT_CONTROL_PIN_ENABLE2 2
     19      1.1  jmcneill #define AS3722_EXT_CONTROL_PIN_ENABLE3 3
     20      1.1  jmcneill 
     21      1.1  jmcneill /* Interrupt numbers for AS3722 */
     22      1.1  jmcneill #define AS3722_IRQ_LID			0
     23      1.1  jmcneill #define AS3722_IRQ_ACOK			1
     24      1.1  jmcneill #define AS3722_IRQ_ENABLE1		2
     25      1.1  jmcneill #define AS3722_IRQ_OCCUR_ALARM_SD0	3
     26      1.1  jmcneill #define AS3722_IRQ_ONKEY_LONG_PRESS	4
     27      1.1  jmcneill #define AS3722_IRQ_ONKEY		5
     28      1.1  jmcneill #define AS3722_IRQ_OVTMP		6
     29      1.1  jmcneill #define AS3722_IRQ_LOWBAT		7
     30      1.1  jmcneill #define AS3722_IRQ_SD0_LV		8
     31      1.1  jmcneill #define AS3722_IRQ_SD1_LV		9
     32      1.1  jmcneill #define AS3722_IRQ_SD2_LV		10
     33      1.1  jmcneill #define AS3722_IRQ_PWM1_OV_PROT		11
     34      1.1  jmcneill #define AS3722_IRQ_PWM2_OV_PROT		12
     35      1.1  jmcneill #define AS3722_IRQ_ENABLE2		13
     36      1.1  jmcneill #define AS3722_IRQ_SD6_LV		14
     37      1.1  jmcneill #define AS3722_IRQ_RTC_REP		15
     38      1.1  jmcneill #define AS3722_IRQ_RTC_ALARM		16
     39      1.1  jmcneill #define AS3722_IRQ_GPIO1		17
     40      1.1  jmcneill #define AS3722_IRQ_GPIO2		18
     41      1.1  jmcneill #define AS3722_IRQ_GPIO3		19
     42      1.1  jmcneill #define AS3722_IRQ_GPIO4		20
     43      1.1  jmcneill #define AS3722_IRQ_GPIO5		21
     44      1.1  jmcneill #define AS3722_IRQ_WATCHDOG		22
     45      1.1  jmcneill #define AS3722_IRQ_ENABLE3		23
     46      1.1  jmcneill #define AS3722_IRQ_TEMP_SD0_SHUTDOWN	24
     47      1.1  jmcneill #define AS3722_IRQ_TEMP_SD1_SHUTDOWN	25
     48      1.1  jmcneill #define AS3722_IRQ_TEMP_SD2_SHUTDOWN	26
     49      1.1  jmcneill #define AS3722_IRQ_TEMP_SD0_ALARM	27
     50      1.1  jmcneill #define AS3722_IRQ_TEMP_SD1_ALARM	28
     51      1.1  jmcneill #define AS3722_IRQ_TEMP_SD6_ALARM	29
     52      1.1  jmcneill #define AS3722_IRQ_OCCUR_ALARM_SD6	30
     53      1.1  jmcneill #define AS3722_IRQ_ADC			31
     54      1.1  jmcneill 
     55      1.1  jmcneill #endif /* __DT_BINDINGS_AS3722_H__ */
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