1 1.1 jmcneill /* $NetBSD: dra.h,v 1.1.1.3 2020/01/03 14:33:03 skrll Exp $ */ 2 1.1 jmcneill 3 1.1.1.3 skrll /* SPDX-License-Identifier: GPL-2.0-only */ 4 1.1 jmcneill /* 5 1.1 jmcneill * This header provides constants for DRA pinctrl bindings. 6 1.1 jmcneill * 7 1.1 jmcneill * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 8 1.1 jmcneill * Author: Rajendra Nayak <rnayak (at) ti.com> 9 1.1 jmcneill */ 10 1.1 jmcneill 11 1.1 jmcneill #ifndef _DT_BINDINGS_PINCTRL_DRA_H 12 1.1 jmcneill #define _DT_BINDINGS_PINCTRL_DRA_H 13 1.1 jmcneill 14 1.1 jmcneill /* DRA7 mux mode options for each pin. See TRM for options */ 15 1.1 jmcneill #define MUX_MODE0 0x0 16 1.1 jmcneill #define MUX_MODE1 0x1 17 1.1 jmcneill #define MUX_MODE2 0x2 18 1.1 jmcneill #define MUX_MODE3 0x3 19 1.1 jmcneill #define MUX_MODE4 0x4 20 1.1 jmcneill #define MUX_MODE5 0x5 21 1.1 jmcneill #define MUX_MODE6 0x6 22 1.1 jmcneill #define MUX_MODE7 0x7 23 1.1 jmcneill #define MUX_MODE8 0x8 24 1.1 jmcneill #define MUX_MODE9 0x9 25 1.1 jmcneill #define MUX_MODE10 0xa 26 1.1 jmcneill #define MUX_MODE11 0xb 27 1.1 jmcneill #define MUX_MODE12 0xc 28 1.1 jmcneill #define MUX_MODE13 0xd 29 1.1 jmcneill #define MUX_MODE14 0xe 30 1.1 jmcneill #define MUX_MODE15 0xf 31 1.1 jmcneill 32 1.1 jmcneill /* Certain pins need virtual mode, but note: they may glitch */ 33 1.1 jmcneill #define MUX_VIRTUAL_MODE0 (MODE_SELECT | (0x0 << 4)) 34 1.1 jmcneill #define MUX_VIRTUAL_MODE1 (MODE_SELECT | (0x1 << 4)) 35 1.1 jmcneill #define MUX_VIRTUAL_MODE2 (MODE_SELECT | (0x2 << 4)) 36 1.1 jmcneill #define MUX_VIRTUAL_MODE3 (MODE_SELECT | (0x3 << 4)) 37 1.1 jmcneill #define MUX_VIRTUAL_MODE4 (MODE_SELECT | (0x4 << 4)) 38 1.1 jmcneill #define MUX_VIRTUAL_MODE5 (MODE_SELECT | (0x5 << 4)) 39 1.1 jmcneill #define MUX_VIRTUAL_MODE6 (MODE_SELECT | (0x6 << 4)) 40 1.1 jmcneill #define MUX_VIRTUAL_MODE7 (MODE_SELECT | (0x7 << 4)) 41 1.1 jmcneill #define MUX_VIRTUAL_MODE8 (MODE_SELECT | (0x8 << 4)) 42 1.1 jmcneill #define MUX_VIRTUAL_MODE9 (MODE_SELECT | (0x9 << 4)) 43 1.1 jmcneill #define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4)) 44 1.1 jmcneill #define MUX_VIRTUAL_MODE11 (MODE_SELECT | (0xb << 4)) 45 1.1 jmcneill #define MUX_VIRTUAL_MODE12 (MODE_SELECT | (0xc << 4)) 46 1.1 jmcneill #define MUX_VIRTUAL_MODE13 (MODE_SELECT | (0xd << 4)) 47 1.1 jmcneill #define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4)) 48 1.1 jmcneill #define MUX_VIRTUAL_MODE15 (MODE_SELECT | (0xf << 4)) 49 1.1 jmcneill 50 1.1 jmcneill #define MODE_SELECT (1 << 8) 51 1.1 jmcneill 52 1.1 jmcneill #define PULL_ENA (0 << 16) 53 1.1 jmcneill #define PULL_DIS (1 << 16) 54 1.1 jmcneill #define PULL_UP (1 << 17) 55 1.1 jmcneill #define INPUT_EN (1 << 18) 56 1.1 jmcneill #define SLEWCONTROL (1 << 19) 57 1.1 jmcneill #define WAKEUP_EN (1 << 24) 58 1.1 jmcneill #define WAKEUP_EVENT (1 << 25) 59 1.1 jmcneill 60 1.1 jmcneill /* Active pin states */ 61 1.1 jmcneill #define PIN_OUTPUT (0 | PULL_DIS) 62 1.1 jmcneill #define PIN_OUTPUT_PULLUP (PULL_UP) 63 1.1 jmcneill #define PIN_OUTPUT_PULLDOWN (0) 64 1.1 jmcneill #define PIN_INPUT (INPUT_EN | PULL_DIS) 65 1.1 jmcneill #define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) 66 1.1 jmcneill #define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 67 1.1 jmcneill #define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 68 1.1 jmcneill 69 1.1 jmcneill /* 70 1.1 jmcneill * Macro to allow using the absolute physical address instead of the 71 1.1 jmcneill * padconf registers instead of the offset from padconf base. 72 1.1 jmcneill */ 73 1.1 jmcneill #define DRA7XX_CORE_IOPAD(pa, val) (((pa) & 0xffff) - 0x3400) (val) 74 1.1 jmcneill 75 1.1.1.2 jmcneill /* DRA7 IODELAY configuration parameters */ 76 1.1.1.2 jmcneill #define A_DELAY_PS(val) ((val) & 0xffff) 77 1.1.1.2 jmcneill #define G_DELAY_PS(val) ((val) & 0xffff) 78 1.1 jmcneill #endif 79 1.1 jmcneill 80