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      1 /*	$NetBSD: dra.h,v 1.1.1.3 2020/01/03 14:33:03 skrll Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0-only */
      4 /*
      5  * This header provides constants for DRA pinctrl bindings.
      6  *
      7  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
      8  * Author: Rajendra Nayak <rnayak (at) ti.com>
      9  */
     10 
     11 #ifndef _DT_BINDINGS_PINCTRL_DRA_H
     12 #define _DT_BINDINGS_PINCTRL_DRA_H
     13 
     14 /* DRA7 mux mode options for each pin. See TRM for options */
     15 #define MUX_MODE0	0x0
     16 #define MUX_MODE1	0x1
     17 #define MUX_MODE2	0x2
     18 #define MUX_MODE3	0x3
     19 #define MUX_MODE4	0x4
     20 #define MUX_MODE5	0x5
     21 #define MUX_MODE6	0x6
     22 #define MUX_MODE7	0x7
     23 #define MUX_MODE8	0x8
     24 #define MUX_MODE9	0x9
     25 #define MUX_MODE10	0xa
     26 #define MUX_MODE11	0xb
     27 #define MUX_MODE12	0xc
     28 #define MUX_MODE13	0xd
     29 #define MUX_MODE14	0xe
     30 #define MUX_MODE15	0xf
     31 
     32 /* Certain pins need virtual mode, but note: they may glitch */
     33 #define MUX_VIRTUAL_MODE0	(MODE_SELECT | (0x0 << 4))
     34 #define MUX_VIRTUAL_MODE1	(MODE_SELECT | (0x1 << 4))
     35 #define MUX_VIRTUAL_MODE2	(MODE_SELECT | (0x2 << 4))
     36 #define MUX_VIRTUAL_MODE3	(MODE_SELECT | (0x3 << 4))
     37 #define MUX_VIRTUAL_MODE4	(MODE_SELECT | (0x4 << 4))
     38 #define MUX_VIRTUAL_MODE5	(MODE_SELECT | (0x5 << 4))
     39 #define MUX_VIRTUAL_MODE6	(MODE_SELECT | (0x6 << 4))
     40 #define MUX_VIRTUAL_MODE7	(MODE_SELECT | (0x7 << 4))
     41 #define MUX_VIRTUAL_MODE8	(MODE_SELECT | (0x8 << 4))
     42 #define MUX_VIRTUAL_MODE9	(MODE_SELECT | (0x9 << 4))
     43 #define MUX_VIRTUAL_MODE10	(MODE_SELECT | (0xa << 4))
     44 #define MUX_VIRTUAL_MODE11	(MODE_SELECT | (0xb << 4))
     45 #define MUX_VIRTUAL_MODE12	(MODE_SELECT | (0xc << 4))
     46 #define MUX_VIRTUAL_MODE13	(MODE_SELECT | (0xd << 4))
     47 #define MUX_VIRTUAL_MODE14	(MODE_SELECT | (0xe << 4))
     48 #define MUX_VIRTUAL_MODE15	(MODE_SELECT | (0xf << 4))
     49 
     50 #define MODE_SELECT		(1 << 8)
     51 
     52 #define PULL_ENA		(0 << 16)
     53 #define PULL_DIS		(1 << 16)
     54 #define PULL_UP			(1 << 17)
     55 #define INPUT_EN		(1 << 18)
     56 #define SLEWCONTROL		(1 << 19)
     57 #define WAKEUP_EN		(1 << 24)
     58 #define WAKEUP_EVENT		(1 << 25)
     59 
     60 /* Active pin states */
     61 #define PIN_OUTPUT		(0 | PULL_DIS)
     62 #define PIN_OUTPUT_PULLUP	(PULL_UP)
     63 #define PIN_OUTPUT_PULLDOWN	(0)
     64 #define PIN_INPUT		(INPUT_EN | PULL_DIS)
     65 #define PIN_INPUT_SLEW		(INPUT_EN | SLEWCONTROL)
     66 #define PIN_INPUT_PULLUP	(PULL_ENA | INPUT_EN | PULL_UP)
     67 #define PIN_INPUT_PULLDOWN	(PULL_ENA | INPUT_EN)
     68 
     69 /*
     70  * Macro to allow using the absolute physical address instead of the
     71  * padconf registers instead of the offset from padconf base.
     72  */
     73 #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
     74 
     75 /* DRA7 IODELAY configuration parameters */
     76 #define A_DELAY_PS(val)			((val) & 0xffff)
     77 #define G_DELAY_PS(val)			((val) & 0xffff)
     78 #endif
     79 
     80