1 /* $NetBSD: qcom,rpmhpd.h,v 1.1.1.2 2026/09/23 05:22:42 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 4 /* 5 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8 #ifndef _DT_BINDINGS_POWER_QCOM_RPMHPD_H 9 #define _DT_BINDINGS_POWER_QCOM_RPMHPD_H 10 11 /* Generic RPMH Power Domain Indexes */ 12 #define RPMHPD_CX 0 13 #define RPMHPD_CX_AO 1 14 #define RPMHPD_EBI 2 15 #define RPMHPD_GFX 3 16 #define RPMHPD_LCX 4 17 #define RPMHPD_LMX 5 18 #define RPMHPD_MMCX 6 19 #define RPMHPD_MMCX_AO 7 20 #define RPMHPD_MX 8 21 #define RPMHPD_MX_AO 9 22 #define RPMHPD_MXC 10 23 #define RPMHPD_MXC_AO 11 24 #define RPMHPD_MSS 12 25 #define RPMHPD_NSP 13 26 #define RPMHPD_NSP0 14 27 #define RPMHPD_NSP1 15 28 #define RPMHPD_QPHY 16 29 #define RPMHPD_DDR 17 30 #define RPMHPD_XO 18 31 #define RPMHPD_NSP2 19 32 #define RPMHPD_GMXC 20 33 34 /* RPMh Power Domain performance levels */ 35 #define RPMH_REGULATOR_LEVEL_RETENTION 16 36 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 37 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D3 50 38 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2 52 39 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1 56 40 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0 60 41 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 42 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1 72 43 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L1 80 44 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L2 96 45 #define RPMH_REGULATOR_LEVEL_SVS 128 46 #define RPMH_REGULATOR_LEVEL_SVS_L0 144 47 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 48 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 49 #define RPMH_REGULATOR_LEVEL_NOM 256 50 #define RPMH_REGULATOR_LEVEL_NOM_L0 288 51 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 52 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 53 #define RPMH_REGULATOR_LEVEL_TURBO 384 54 #define RPMH_REGULATOR_LEVEL_TURBO_L0 400 55 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 56 #define RPMH_REGULATOR_LEVEL_TURBO_L2 432 57 #define RPMH_REGULATOR_LEVEL_TURBO_L3 448 58 #define RPMH_REGULATOR_LEVEL_TURBO_L4 452 59 #define RPMH_REGULATOR_LEVEL_TURBO_L5 456 60 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO 464 61 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR 480 62 63 /* 64 * Platform-specific power domain bindings. Don't add new entries here, use 65 * RPMHPD_* above. 66 */ 67 68 /* SA8775P Power Domain Indexes */ 69 #define SA8775P_CX 0 70 #define SA8775P_CX_AO 1 71 #define SA8775P_DDR 2 72 #define SA8775P_EBI 3 73 #define SA8775P_GFX 4 74 #define SA8775P_LCX 5 75 #define SA8775P_LMX 6 76 #define SA8775P_MMCX 7 77 #define SA8775P_MMCX_AO 8 78 #define SA8775P_MSS 9 79 #define SA8775P_MX 10 80 #define SA8775P_MX_AO 11 81 #define SA8775P_MXC 12 82 #define SA8775P_MXC_AO 13 83 #define SA8775P_NSP0 14 84 #define SA8775P_NSP1 15 85 #define SA8775P_XO 16 86 87 /* SDM670 Power Domain Indexes */ 88 #define SDM670_MX 0 89 #define SDM670_MX_AO 1 90 #define SDM670_CX 2 91 #define SDM670_CX_AO 3 92 #define SDM670_LMX 4 93 #define SDM670_LCX 5 94 #define SDM670_GFX 6 95 #define SDM670_MSS 7 96 97 /* SDM845 Power Domain Indexes */ 98 #define SDM845_EBI 0 99 #define SDM845_MX 1 100 #define SDM845_MX_AO 2 101 #define SDM845_CX 3 102 #define SDM845_CX_AO 4 103 #define SDM845_LMX 5 104 #define SDM845_LCX 6 105 #define SDM845_GFX 7 106 #define SDM845_MSS 8 107 108 /* SDX55 Power Domain Indexes */ 109 #define SDX55_MSS 0 110 #define SDX55_MX 1 111 #define SDX55_CX 2 112 113 /* SDX65 Power Domain Indexes */ 114 #define SDX65_MSS 0 115 #define SDX65_MX 1 116 #define SDX65_MX_AO 2 117 #define SDX65_CX 3 118 #define SDX65_CX_AO 4 119 #define SDX65_MXC 5 120 121 /* SM6350 Power Domain Indexes */ 122 #define SM6350_CX 0 123 #define SM6350_GFX 1 124 #define SM6350_LCX 2 125 #define SM6350_LMX 3 126 #define SM6350_MSS 4 127 #define SM6350_MX 5 128 129 /* SM8150 Power Domain Indexes */ 130 #define SM8150_MSS 0 131 #define SM8150_EBI 1 132 #define SM8150_LMX 2 133 #define SM8150_LCX 3 134 #define SM8150_GFX 4 135 #define SM8150_MX 5 136 #define SM8150_MX_AO 6 137 #define SM8150_CX 7 138 #define SM8150_CX_AO 8 139 #define SM8150_MMCX 9 140 #define SM8150_MMCX_AO 10 141 142 /* SA8155P is a special case, kept for backwards compatibility */ 143 #define SA8155P_CX SM8150_CX 144 #define SA8155P_CX_AO SM8150_CX_AO 145 #define SA8155P_EBI SM8150_EBI 146 #define SA8155P_GFX SM8150_GFX 147 #define SA8155P_MSS SM8150_MSS 148 #define SA8155P_MX SM8150_MX 149 #define SA8155P_MX_AO SM8150_MX_AO 150 151 /* SM8250 Power Domain Indexes */ 152 #define SM8250_CX 0 153 #define SM8250_CX_AO 1 154 #define SM8250_EBI 2 155 #define SM8250_GFX 3 156 #define SM8250_LCX 4 157 #define SM8250_LMX 5 158 #define SM8250_MMCX 6 159 #define SM8250_MMCX_AO 7 160 #define SM8250_MX 8 161 #define SM8250_MX_AO 9 162 163 /* SM8350 Power Domain Indexes */ 164 #define SM8350_CX 0 165 #define SM8350_CX_AO 1 166 #define SM8350_EBI 2 167 #define SM8350_GFX 3 168 #define SM8350_LCX 4 169 #define SM8350_LMX 5 170 #define SM8350_MMCX 6 171 #define SM8350_MMCX_AO 7 172 #define SM8350_MX 8 173 #define SM8350_MX_AO 9 174 #define SM8350_MXC 10 175 #define SM8350_MXC_AO 11 176 #define SM8350_MSS 12 177 178 /* SM8450 Power Domain Indexes */ 179 #define SM8450_CX 0 180 #define SM8450_CX_AO 1 181 #define SM8450_EBI 2 182 #define SM8450_GFX 3 183 #define SM8450_LCX 4 184 #define SM8450_LMX 5 185 #define SM8450_MMCX 6 186 #define SM8450_MMCX_AO 7 187 #define SM8450_MX 8 188 #define SM8450_MX_AO 9 189 #define SM8450_MXC 10 190 #define SM8450_MXC_AO 11 191 #define SM8450_MSS 12 192 193 /* SM8550 Power Domain Indexes */ 194 #define SM8550_CX 0 195 #define SM8550_CX_AO 1 196 #define SM8550_EBI 2 197 #define SM8550_GFX 3 198 #define SM8550_LCX 4 199 #define SM8550_LMX 5 200 #define SM8550_MMCX 6 201 #define SM8550_MMCX_AO 7 202 #define SM8550_MX 8 203 #define SM8550_MX_AO 9 204 #define SM8550_MXC 10 205 #define SM8550_MXC_AO 11 206 #define SM8550_MSS 12 207 #define SM8550_NSP 13 208 209 /* QDU1000/QRU1000 Power Domain Indexes */ 210 #define QDU1000_EBI 0 211 #define QDU1000_MSS 1 212 #define QDU1000_CX 2 213 #define QDU1000_MX 3 214 215 /* SC7180 Power Domain Indexes */ 216 #define SC7180_CX 0 217 #define SC7180_CX_AO 1 218 #define SC7180_GFX 2 219 #define SC7180_MX 3 220 #define SC7180_MX_AO 4 221 #define SC7180_LMX 5 222 #define SC7180_LCX 6 223 #define SC7180_MSS 7 224 225 /* SC7280 Power Domain Indexes */ 226 #define SC7280_CX 0 227 #define SC7280_CX_AO 1 228 #define SC7280_EBI 2 229 #define SC7280_GFX 3 230 #define SC7280_MX 4 231 #define SC7280_MX_AO 5 232 #define SC7280_LMX 6 233 #define SC7280_LCX 7 234 #define SC7280_MSS 8 235 236 /* SC8180X Power Domain Indexes */ 237 #define SC8180X_CX 0 238 #define SC8180X_CX_AO 1 239 #define SC8180X_EBI 2 240 #define SC8180X_GFX 3 241 #define SC8180X_LCX 4 242 #define SC8180X_LMX 5 243 #define SC8180X_MMCX 6 244 #define SC8180X_MMCX_AO 7 245 #define SC8180X_MSS 8 246 #define SC8180X_MX 9 247 #define SC8180X_MX_AO 10 248 249 /* SC8280XP Power Domain Indexes */ 250 #define SC8280XP_CX 0 251 #define SC8280XP_CX_AO 1 252 #define SC8280XP_DDR 2 253 #define SC8280XP_EBI 3 254 #define SC8280XP_GFX 4 255 #define SC8280XP_LCX 5 256 #define SC8280XP_LMX 6 257 #define SC8280XP_MMCX 7 258 #define SC8280XP_MMCX_AO 8 259 #define SC8280XP_MSS 9 260 #define SC8280XP_MX 10 261 #define SC8280XP_MXC 12 262 #define SC8280XP_MX_AO 11 263 #define SC8280XP_NSP 13 264 #define SC8280XP_QPHY 14 265 #define SC8280XP_XO 15 266 #define SC8280XP_MXC_AO 16 267 268 #endif 269