1/*	$NetBSD: actions,s500-reset.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0+ */
4/*
5 * Device Tree binding constants for Actions Semi S500 Reset Management Unit
6 *
7 * Copyright (c) 2014 Actions Semi Inc.
8 * Copyright (c) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
9 */
10
11#ifndef __DT_BINDINGS_ACTIONS_S500_RESET_H
12#define __DT_BINDINGS_ACTIONS_S500_RESET_H
13
14#define RESET_DMAC				0
15#define RESET_NORIF				1
16#define RESET_DDR				2
17#define RESET_NANDC				3
18#define RESET_SD0				4
19#define RESET_SD1				5
20#define RESET_PCM1				6
21#define RESET_DE				7
22#define RESET_LCD				8
23#define RESET_SD2				9
24#define RESET_DSI				10
25#define RESET_CSI				11
26#define RESET_BISP				12
27#define RESET_KEY				13
28#define RESET_GPIO				14
29#define RESET_AUDIO				15
30#define RESET_PCM0				16
31#define RESET_VDE				17
32#define RESET_VCE				18
33#define RESET_GPU3D				19
34#define RESET_NIC301				20
35#define RESET_LENS				21
36#define RESET_PERIPHRESET			22
37#define RESET_USB2_0				23
38#define RESET_TVOUT				24
39#define RESET_HDMI				25
40#define RESET_HDCP2TX				26
41#define RESET_UART6				27
42#define RESET_UART0				28
43#define RESET_UART1				29
44#define RESET_UART2				30
45#define RESET_SPI0				31
46#define RESET_SPI1				32
47#define RESET_SPI2				33
48#define RESET_SPI3				34
49#define RESET_I2C0				35
50#define RESET_I2C1				36
51#define RESET_USB3				37
52#define RESET_UART3				38
53#define RESET_UART4				39
54#define RESET_UART5				40
55#define RESET_I2C2				41
56#define RESET_I2C3				42
57#define RESET_ETHERNET				43
58#define RESET_CHIPID				44
59#define RESET_USB2_1				45
60#define RESET_WD0RESET				46
61#define RESET_WD1RESET				47
62#define RESET_WD2RESET				48
63#define RESET_WD3RESET				49
64#define RESET_DBG0RESET				50
65#define RESET_DBG1RESET				51
66#define RESET_DBG2RESET				52
67#define RESET_DBG3RESET				53
68
69#endif /* __DT_BINDINGS_ACTIONS_S500_RESET_H */
70