1/*	$NetBSD: airoha,en7581-reset.h,v 1.1.1.1 2026/01/18 05:21:54 skrll Exp $	*/
2
3// SPDX-License-Identifier: GPL-2.0-only
4/*
5 * Copyright (c) 2024 AIROHA Inc
6 * Author: Lorenzo Bianconi <lorenzo@kernel.org>
7 */
8
9#ifndef __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7581_H_
10#define __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7581_H_
11
12/* RST_CTRL2 */
13#define EN7581_XPON_PHY_RST		 0
14#define EN7581_CPU_TIMER2_RST		 1
15#define EN7581_HSUART_RST		 2
16#define EN7581_UART4_RST		 3
17#define EN7581_UART5_RST		 4
18#define EN7581_I2C2_RST			 5
19#define EN7581_XSI_MAC_RST		 6
20#define EN7581_XSI_PHY_RST		 7
21#define EN7581_NPU_RST			 8
22#define EN7581_I2S_RST			 9
23#define EN7581_TRNG_RST			10
24#define EN7581_TRNG_MSTART_RST		11
25#define EN7581_DUAL_HSI0_RST		12
26#define EN7581_DUAL_HSI1_RST		13
27#define EN7581_HSI_RST			14
28#define EN7581_DUAL_HSI0_MAC_RST	15
29#define EN7581_DUAL_HSI1_MAC_RST	16
30#define EN7581_HSI_MAC_RST		17
31#define EN7581_WDMA_RST			18
32#define EN7581_WOE0_RST			19
33#define EN7581_WOE1_RST			20
34#define EN7581_HSDMA_RST		21
35#define EN7581_TDMA_RST			22
36#define EN7581_EMMC_RST			23
37#define EN7581_SOE_RST			24
38#define EN7581_PCIE2_RST		25
39#define EN7581_XFP_MAC_RST		26
40#define EN7581_USB_HOST_P1_RST		27
41#define EN7581_USB_HOST_P1_U3_PHY_RST	28
42/* RST_CTRL1 */
43#define EN7581_PCM1_ZSI_ISI_RST		29
44#define EN7581_FE_PDMA_RST		30
45#define EN7581_FE_QDMA_RST		31
46#define EN7581_PCM_SPIWP_RST		32
47#define EN7581_CRYPTO_RST		33
48#define EN7581_TIMER_RST		34
49#define EN7581_PCM1_RST			35
50#define EN7581_UART_RST			36
51#define EN7581_GPIO_RST			37
52#define EN7581_GDMA_RST			38
53#define EN7581_I2C_MASTER_RST		39
54#define EN7581_PCM2_ZSI_ISI_RST		40
55#define EN7581_SFC_RST			41
56#define EN7581_UART2_RST		42
57#define EN7581_GDMP_RST			43
58#define EN7581_FE_RST			44
59#define EN7581_USB_HOST_P0_RST		45
60#define EN7581_GSW_RST			46
61#define EN7581_SFC2_PCM_RST		47
62#define EN7581_PCIE0_RST		48
63#define EN7581_PCIE1_RST		49
64#define EN7581_CPU_TIMER_RST		50
65#define EN7581_PCIE_HB_RST		51
66#define EN7581_XPON_MAC_RST		52
67
68#endif /* __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7581_H_ */
69