Home | History | Annotate | Line # | Download | only in reset 
      1 /*	$NetBSD: nuvoton,npcm7xx-reset.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0 */
      4 // Copyright (c) 2019 Nuvoton Technology corporation.
      5 
      6 #ifndef _DT_BINDINGS_NPCM7XX_RESET_H
      7 #define _DT_BINDINGS_NPCM7XX_RESET_H
      8 
      9 #define NPCM7XX_RESET_IPSRST1		0x20
     10 #define NPCM7XX_RESET_IPSRST2		0x24
     11 #define NPCM7XX_RESET_IPSRST3		0x34
     12 
     13 /* Reset lines on IP1 reset module (NPCM7XX_RESET_IPSRST1) */
     14 #define NPCM7XX_RESET_FIU3		1
     15 #define NPCM7XX_RESET_UDC1		5
     16 #define NPCM7XX_RESET_EMC1		6
     17 #define NPCM7XX_RESET_UART_2_3		7
     18 #define NPCM7XX_RESET_UDC2		8
     19 #define NPCM7XX_RESET_PECI		9
     20 #define NPCM7XX_RESET_AES		10
     21 #define NPCM7XX_RESET_UART_0_1		11
     22 #define NPCM7XX_RESET_MC		12
     23 #define NPCM7XX_RESET_SMB2		13
     24 #define NPCM7XX_RESET_SMB3		14
     25 #define NPCM7XX_RESET_SMB4		15
     26 #define NPCM7XX_RESET_SMB5		16
     27 #define NPCM7XX_RESET_PWM_M0		18
     28 #define NPCM7XX_RESET_TIMER_0_4		19
     29 #define NPCM7XX_RESET_TIMER_5_9		20
     30 #define NPCM7XX_RESET_EMC2		21
     31 #define NPCM7XX_RESET_UDC4		22
     32 #define NPCM7XX_RESET_UDC5		23
     33 #define NPCM7XX_RESET_UDC6		24
     34 #define NPCM7XX_RESET_UDC3		25
     35 #define NPCM7XX_RESET_ADC		27
     36 #define NPCM7XX_RESET_SMB6		28
     37 #define NPCM7XX_RESET_SMB7		29
     38 #define NPCM7XX_RESET_SMB0		30
     39 #define NPCM7XX_RESET_SMB1		31
     40 
     41 /* Reset lines on IP2 reset module (NPCM7XX_RESET_IPSRST2) */
     42 #define NPCM7XX_RESET_MFT0		0
     43 #define NPCM7XX_RESET_MFT1		1
     44 #define NPCM7XX_RESET_MFT2		2
     45 #define NPCM7XX_RESET_MFT3		3
     46 #define NPCM7XX_RESET_MFT4		4
     47 #define NPCM7XX_RESET_MFT5		5
     48 #define NPCM7XX_RESET_MFT6		6
     49 #define NPCM7XX_RESET_MFT7		7
     50 #define NPCM7XX_RESET_MMC		8
     51 #define NPCM7XX_RESET_SDHC		9
     52 #define NPCM7XX_RESET_GFX_SYS		10
     53 #define NPCM7XX_RESET_AHB_PCIBRG	11
     54 #define NPCM7XX_RESET_VDMA		12
     55 #define NPCM7XX_RESET_ECE		13
     56 #define NPCM7XX_RESET_VCD		14
     57 #define NPCM7XX_RESET_OTP		16
     58 #define NPCM7XX_RESET_SIOX1		18
     59 #define NPCM7XX_RESET_SIOX2		19
     60 #define NPCM7XX_RESET_3DES		21
     61 #define NPCM7XX_RESET_PSPI1		22
     62 #define NPCM7XX_RESET_PSPI2		23
     63 #define NPCM7XX_RESET_GMAC2		25
     64 #define NPCM7XX_RESET_USB_HOST		26
     65 #define NPCM7XX_RESET_GMAC1		28
     66 #define NPCM7XX_RESET_CP		31
     67 
     68 /* Reset lines on IP3 reset module (NPCM7XX_RESET_IPSRST3) */
     69 #define NPCM7XX_RESET_PWM_M1		0
     70 #define NPCM7XX_RESET_SMB12		1
     71 #define NPCM7XX_RESET_SPIX		2
     72 #define NPCM7XX_RESET_SMB13		3
     73 #define NPCM7XX_RESET_UDC0		4
     74 #define NPCM7XX_RESET_UDC7		5
     75 #define NPCM7XX_RESET_UDC8		6
     76 #define NPCM7XX_RESET_UDC9		7
     77 #define NPCM7XX_RESET_PCI_MAILBOX	9
     78 #define NPCM7XX_RESET_SMB14		12
     79 #define NPCM7XX_RESET_SHA		13
     80 #define NPCM7XX_RESET_SEC_ECC		14
     81 #define NPCM7XX_RESET_PCIE_RC		15
     82 #define NPCM7XX_RESET_TIMER_10_14	16
     83 #define NPCM7XX_RESET_RNG		17
     84 #define NPCM7XX_RESET_SMB15		18
     85 #define NPCM7XX_RESET_SMB8		19
     86 #define NPCM7XX_RESET_SMB9		20
     87 #define NPCM7XX_RESET_SMB10		21
     88 #define NPCM7XX_RESET_SMB11		22
     89 #define NPCM7XX_RESET_ESPI		23
     90 #define NPCM7XX_RESET_USB_PHY_1		24
     91 #define NPCM7XX_RESET_USB_PHY_2		25
     92 
     93 #endif
     94