1/*	$NetBSD: qcom,gcc-msm8660.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $	*/
2
3/* SPDX-License-Identifier: GPL-2.0-only */
4/*
5 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
6 */
7
8#ifndef _DT_BINDINGS_RESET_MSM_GCC_8660_H
9#define _DT_BINDINGS_RESET_MSM_GCC_8660_H
10
11#define AFAB_CORE_RESET					0
12#define SCSS_SYS_RESET					1
13#define SCSS_SYS_POR_RESET				2
14#define AFAB_SMPSS_S_RESET				3
15#define AFAB_SMPSS_M1_RESET				4
16#define AFAB_SMPSS_M0_RESET				5
17#define AFAB_EBI1_S_RESET				6
18#define SFAB_CORE_RESET					7
19#define SFAB_ADM0_M0_RESET				8
20#define SFAB_ADM0_M1_RESET				9
21#define SFAB_ADM0_M2_RESET				10
22#define ADM0_C2_RESET					11
23#define ADM0_C1_RESET					12
24#define ADM0_C0_RESET					13
25#define ADM0_PBUS_RESET					14
26#define ADM0_RESET					15
27#define SFAB_ADM1_M0_RESET				16
28#define SFAB_ADM1_M1_RESET				17
29#define SFAB_ADM1_M2_RESET				18
30#define MMFAB_ADM1_M3_RESET				19
31#define ADM1_C3_RESET					20
32#define ADM1_C2_RESET					21
33#define ADM1_C1_RESET					22
34#define ADM1_C0_RESET					23
35#define ADM1_PBUS_RESET					24
36#define ADM1_RESET					25
37#define IMEM0_RESET					26
38#define SFAB_LPASS_Q6_RESET				27
39#define SFAB_AFAB_M_RESET				28
40#define AFAB_SFAB_M0_RESET				29
41#define AFAB_SFAB_M1_RESET				30
42#define DFAB_CORE_RESET					31
43#define SFAB_DFAB_M_RESET				32
44#define DFAB_SFAB_M_RESET				33
45#define DFAB_SWAY0_RESET				34
46#define DFAB_SWAY1_RESET				35
47#define DFAB_ARB0_RESET					36
48#define DFAB_ARB1_RESET					37
49#define PPSS_PROC_RESET					38
50#define PPSS_RESET					39
51#define PMEM_RESET					40
52#define DMA_BAM_RESET					41
53#define SIC_RESET					42
54#define SPS_TIC_RESET					43
55#define CFBP0_RESET					44
56#define CFBP1_RESET					45
57#define CFBP2_RESET					46
58#define EBI2_RESET					47
59#define SFAB_CFPB_M_RESET				48
60#define CFPB_MASTER_RESET				49
61#define SFAB_CFPB_S_RESET				50
62#define CFPB_SPLITTER_RESET				51
63#define TSIF_RESET					52
64#define CE1_RESET					53
65#define CE2_RESET					54
66#define SFAB_SFPB_M_RESET				55
67#define SFAB_SFPB_S_RESET				56
68#define RPM_PROC_RESET					57
69#define RPM_BUS_RESET					58
70#define RPM_MSG_RAM_RESET				59
71#define PMIC_ARB0_RESET					60
72#define PMIC_ARB1_RESET					61
73#define PMIC_SSBI2_RESET				62
74#define SDC1_RESET					63
75#define SDC2_RESET					64
76#define SDC3_RESET					65
77#define SDC4_RESET					66
78#define SDC5_RESET					67
79#define USB_HS1_RESET					68
80#define USB_HS2_XCVR_RESET				69
81#define USB_HS2_RESET					70
82#define USB_FS1_XCVR_RESET				71
83#define USB_FS1_RESET					72
84#define USB_FS2_XCVR_RESET				73
85#define USB_FS2_RESET					74
86#define GSBI1_RESET					75
87#define GSBI2_RESET					76
88#define GSBI3_RESET					77
89#define GSBI4_RESET					78
90#define GSBI5_RESET					79
91#define GSBI6_RESET					80
92#define GSBI7_RESET					81
93#define GSBI8_RESET					82
94#define GSBI9_RESET					83
95#define GSBI10_RESET					84
96#define GSBI11_RESET					85
97#define GSBI12_RESET					86
98#define SPDM_RESET					87
99#define SEC_CTRL_RESET					88
100#define TLMM_H_RESET					89
101#define TLMM_RESET					90
102#define MARRM_PWRON_RESET				91
103#define MARM_RESET					92
104#define MAHB1_RESET					93
105#define SFAB_MSS_S_RESET				94
106#define MAHB2_RESET					95
107#define MODEM_SW_AHB_RESET				96
108#define MODEM_RESET					97
109#define SFAB_MSS_MDM1_RESET				98
110#define SFAB_MSS_MDM0_RESET				99
111#define MSS_SLP_RESET					100
112#define MSS_MARM_SAW_RESET				101
113#define MSS_WDOG_RESET					102
114#define TSSC_RESET					103
115#define PDM_RESET					104
116#define SCSS_CORE0_RESET				105
117#define SCSS_CORE0_POR_RESET				106
118#define SCSS_CORE1_RESET				107
119#define SCSS_CORE1_POR_RESET				108
120#define MPM_RESET					109
121#define EBI1_1X_DIV_RESET				110
122#define EBI1_RESET					111
123#define SFAB_SMPSS_S_RESET				112
124#define USB_PHY0_RESET					113
125#define USB_PHY1_RESET					114
126#define PRNG_RESET					115
127
128#endif
129