1 1.1 jmcneill /* $NetBSD: stm32mp1-resets.h,v 1.1.1.2 2021/11/07 16:49:57 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */ 4 1.1 jmcneill /* 5 1.1 jmcneill * Copyright (C) STMicroelectronics 2018 - All Rights Reserved 6 1.1 jmcneill * Author: Gabriel Fernandez <gabriel.fernandez (at) st.com> for STMicroelectronics. 7 1.1 jmcneill */ 8 1.1 jmcneill 9 1.1 jmcneill #ifndef _DT_BINDINGS_STM32MP1_RESET_H_ 10 1.1 jmcneill #define _DT_BINDINGS_STM32MP1_RESET_H_ 11 1.1 jmcneill 12 1.1.1.2 jmcneill #define MCU_HOLD_BOOT_R 2144 13 1.1 jmcneill #define LTDC_R 3072 14 1.1 jmcneill #define DSI_R 3076 15 1.1 jmcneill #define DDRPERFM_R 3080 16 1.1 jmcneill #define USBPHY_R 3088 17 1.1 jmcneill #define SPI6_R 3136 18 1.1 jmcneill #define I2C4_R 3138 19 1.1 jmcneill #define I2C6_R 3139 20 1.1 jmcneill #define USART1_R 3140 21 1.1 jmcneill #define STGEN_R 3156 22 1.1 jmcneill #define GPIOZ_R 3200 23 1.1 jmcneill #define CRYP1_R 3204 24 1.1 jmcneill #define HASH1_R 3205 25 1.1 jmcneill #define RNG1_R 3206 26 1.1 jmcneill #define AXIM_R 3216 27 1.1 jmcneill #define GPU_R 3269 28 1.1 jmcneill #define ETHMAC_R 3274 29 1.1 jmcneill #define FMC_R 3276 30 1.1 jmcneill #define QSPI_R 3278 31 1.1 jmcneill #define SDMMC1_R 3280 32 1.1 jmcneill #define SDMMC2_R 3281 33 1.1 jmcneill #define CRC1_R 3284 34 1.1 jmcneill #define USBH_R 3288 35 1.1 jmcneill #define MDMA_R 3328 36 1.1 jmcneill #define MCU_R 8225 37 1.1 jmcneill #define TIM2_R 19456 38 1.1 jmcneill #define TIM3_R 19457 39 1.1 jmcneill #define TIM4_R 19458 40 1.1 jmcneill #define TIM5_R 19459 41 1.1 jmcneill #define TIM6_R 19460 42 1.1 jmcneill #define TIM7_R 19461 43 1.1 jmcneill #define TIM12_R 16462 44 1.1 jmcneill #define TIM13_R 16463 45 1.1 jmcneill #define TIM14_R 16464 46 1.1 jmcneill #define LPTIM1_R 19465 47 1.1 jmcneill #define SPI2_R 19467 48 1.1 jmcneill #define SPI3_R 19468 49 1.1 jmcneill #define USART2_R 19470 50 1.1 jmcneill #define USART3_R 19471 51 1.1 jmcneill #define UART4_R 19472 52 1.1 jmcneill #define UART5_R 19473 53 1.1 jmcneill #define UART7_R 19474 54 1.1 jmcneill #define UART8_R 19475 55 1.1 jmcneill #define I2C1_R 19477 56 1.1 jmcneill #define I2C2_R 19478 57 1.1 jmcneill #define I2C3_R 19479 58 1.1 jmcneill #define I2C5_R 19480 59 1.1 jmcneill #define SPDIF_R 19482 60 1.1 jmcneill #define CEC_R 19483 61 1.1 jmcneill #define DAC12_R 19485 62 1.1 jmcneill #define MDIO_R 19847 63 1.1 jmcneill #define TIM1_R 19520 64 1.1 jmcneill #define TIM8_R 19521 65 1.1 jmcneill #define TIM15_R 19522 66 1.1 jmcneill #define TIM16_R 19523 67 1.1 jmcneill #define TIM17_R 19524 68 1.1 jmcneill #define SPI1_R 19528 69 1.1 jmcneill #define SPI4_R 19529 70 1.1 jmcneill #define SPI5_R 19530 71 1.1 jmcneill #define USART6_R 19533 72 1.1 jmcneill #define SAI1_R 19536 73 1.1 jmcneill #define SAI2_R 19537 74 1.1 jmcneill #define SAI3_R 19538 75 1.1 jmcneill #define DFSDM_R 19540 76 1.1 jmcneill #define FDCAN_R 19544 77 1.1 jmcneill #define LPTIM2_R 19584 78 1.1 jmcneill #define LPTIM3_R 19585 79 1.1 jmcneill #define LPTIM4_R 19586 80 1.1 jmcneill #define LPTIM5_R 19587 81 1.1 jmcneill #define SAI4_R 19592 82 1.1 jmcneill #define SYSCFG_R 19595 83 1.1 jmcneill #define VREF_R 19597 84 1.1 jmcneill #define TMPSENS_R 19600 85 1.1 jmcneill #define PMBCTRL_R 19601 86 1.1 jmcneill #define DMA1_R 19648 87 1.1 jmcneill #define DMA2_R 19649 88 1.1 jmcneill #define DMAMUX_R 19650 89 1.1 jmcneill #define ADC12_R 19653 90 1.1 jmcneill #define USBO_R 19656 91 1.1 jmcneill #define SDMMC3_R 19664 92 1.1 jmcneill #define CAMITF_R 19712 93 1.1 jmcneill #define CRYP2_R 19716 94 1.1 jmcneill #define HASH2_R 19717 95 1.1 jmcneill #define RNG2_R 19718 96 1.1 jmcneill #define CRC2_R 19719 97 1.1 jmcneill #define HSEM_R 19723 98 1.1 jmcneill #define MBOX_R 19724 99 1.1 jmcneill #define GPIOA_R 19776 100 1.1 jmcneill #define GPIOB_R 19777 101 1.1 jmcneill #define GPIOC_R 19778 102 1.1 jmcneill #define GPIOD_R 19779 103 1.1 jmcneill #define GPIOE_R 19780 104 1.1 jmcneill #define GPIOF_R 19781 105 1.1 jmcneill #define GPIOG_R 19782 106 1.1 jmcneill #define GPIOH_R 19783 107 1.1 jmcneill #define GPIOI_R 19784 108 1.1 jmcneill #define GPIOJ_R 19785 109 1.1 jmcneill #define GPIOK_R 19786 110 1.1 jmcneill 111 1.1.1.2 jmcneill /* SCMI reset domain identifiers */ 112 1.1.1.2 jmcneill #define RST_SCMI0_SPI6 0 113 1.1.1.2 jmcneill #define RST_SCMI0_I2C4 1 114 1.1.1.2 jmcneill #define RST_SCMI0_I2C6 2 115 1.1.1.2 jmcneill #define RST_SCMI0_USART1 3 116 1.1.1.2 jmcneill #define RST_SCMI0_STGEN 4 117 1.1.1.2 jmcneill #define RST_SCMI0_GPIOZ 5 118 1.1.1.2 jmcneill #define RST_SCMI0_CRYP1 6 119 1.1.1.2 jmcneill #define RST_SCMI0_HASH1 7 120 1.1.1.2 jmcneill #define RST_SCMI0_RNG1 8 121 1.1.1.2 jmcneill #define RST_SCMI0_MDMA 9 122 1.1.1.2 jmcneill #define RST_SCMI0_MCU 10 123 1.1.1.2 jmcneill #define RST_SCMI0_MCU_HOLD_BOOT 11 124 1.1.1.2 jmcneill 125 1.1 jmcneill #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */ 126