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      1 /*	$NetBSD: t___sync_lock.c,v 1.2 2025/04/07 01:34:43 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 #include <sys/cdefs.h>
     29 __RCSID("$NetBSD: t___sync_lock.c,v 1.2 2025/04/07 01:34:43 riastradh Exp $");
     30 
     31 #include <atf-c.h>
     32 #include <inttypes.h>
     33 #include <machine/types.h>	// for __HAVE_ATOMIC64_OPS
     34 
     35 /*
     36  * These tests don't examine the atomicity.
     37  */
     38 
     39 /* XXX
     40  * Depending on a combination of arch and compiler, __sync_* is
     41  * implemented as compiler's builtin function.  In that case, even
     42  * if libc exports the function symbol, it is not used.  As a result
     43  * this tests will examine compiler's builtin functions.
     44  * It's better to run only when target is actually in libc.
     45  */
     46 
     47 #if defined __vax__
     48 /*
     49  * On VAX, __sync_lock_test_and_set_* test and set the low-order bit
     50  * with BBSSI, and __sync_lock_release_* clear the low-order bit with
     51  * BBCCI, so the other bits are not relevant.
     52  *
     53  * It is possible that, by using values other than 0 and 1, we are
     54  * relying on more than gcc guarantees about __sync_lock_test_and_set_*
     55  * and __sync_lock_release_*.  But, well, if so, we will be alerted by
     56  * a failing test.
     57  */
     58 #define INITVAL 0x1122334455667788
     59 #define LOCKVAL 1
     60 #define LOCKRET 0
     61 #define LOCKEDVAL 0x1122334455667789
     62 #define UNLOCKEDVAL 0x1122334455667788
     63 #elif 0 && defined __hppa__
     64 /*
     65  * On HPPA, the native atomic r/m/w instruction, LDCW, atomically loads
     66  * a word and clears it, so the obvious choice is for the unlocked
     67  * state to be nonzero and the locked state to be zero.
     68  *
     69  * But gcc doesn't do that.
     70  *
     71  * Instead, it uses zero for unlocked and nonzero for locked.  So for
     72  * __sync_lock_test_and_set_* it issues an out-of-line call (which on
     73  * NetBSD implements by atomic_swap_N), and for __sync_lock_release_*,
     74  * it issues LDCW on a scratch stack location only as a barrier and
     75  * then issues STW to store a zero.
     76  *
     77  * So we don't use this branch after all.  But I'm leaving it here as a
     78  * reminder to anyone who suspects something might be wrong on HPPA.
     79  */
     80 #define INITVAL 0x1122334455667788
     81 #define LOCKVAL 0
     82 #define LOCKRET 0x1122334455667788
     83 #define LOCKEDVAL 0
     84 #define UNLOCKEDVAL 1
     85 #else
     86 /*
     87  * According to GCC documentation at
     88  * <https://gcc.gnu.org/onlinedocs/gcc-12.4.0/gcc/_005f_005fsync-Builtins.html>,
     89  * the only guaranteed supported value for LOCKVAL is 1, and it is not
     90  * guaranteed that __sync_lock_release_* stores zero.  But on many
     91  * architectures other values work too, and __sync_lock_release_* does
     92  * just store zero, so let's test these by default; the exceptions can
     93  * be listed above.
     94  */
     95 #define INITVAL 0x1122334455667788
     96 #define LOCKVAL 0x8090a0b0c0d0e0f0
     97 #define LOCKRET 0x1122334455667788
     98 #define LOCKEDVAL 0x8090a0b0c0d0e0f0
     99 #define UNLOCKEDVAL 0
    100 #endif
    101 
    102 #define atf_sync_tas(NAME, TYPE, FMT) \
    103 ATF_TC(NAME); \
    104 ATF_TC_HEAD(NAME, tc) \
    105 { \
    106 	atf_tc_set_md_var(tc, "descr", #NAME); \
    107 } \
    108 ATF_TC_BODY(NAME, tc) \
    109 { \
    110 	volatile TYPE val; \
    111 	TYPE newval; \
    112 	TYPE expval; \
    113 	TYPE expres; \
    114 	TYPE res; \
    115 	val = (TYPE)INITVAL; \
    116 	newval = (TYPE)LOCKVAL; \
    117 	expval = (TYPE)LOCKEDVAL; \
    118 	expres = (TYPE)LOCKRET; \
    119 	res = NAME(&val, newval); \
    120 	ATF_REQUIRE_MSG(val == expval, \
    121 	    "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
    122 	ATF_REQUIRE_MSG(res == expres, \
    123 	    "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
    124 }
    125 
    126 atf_sync_tas(__sync_lock_test_and_set_1, uint8_t,  PRIx8);
    127 atf_sync_tas(__sync_lock_test_and_set_2, uint16_t, PRIx16);
    128 atf_sync_tas(__sync_lock_test_and_set_4, uint32_t, PRIx32);
    129 #ifdef __HAVE_ATOMIC64_OPS
    130 atf_sync_tas(__sync_lock_test_and_set_8, uint64_t, PRIx64);
    131 #endif
    132 
    133 #define atf_sync_rel(NAME, TYPE, FMT) \
    134 ATF_TC(NAME); \
    135 ATF_TC_HEAD(NAME, tc) \
    136 { \
    137 	atf_tc_set_md_var(tc, "descr", #NAME); \
    138 } \
    139 ATF_TC_BODY(NAME, tc) \
    140 { \
    141 	volatile TYPE val; \
    142 	TYPE expval; \
    143 	val = (TYPE)LOCKEDVAL; \
    144 	expval = (TYPE)UNLOCKEDVAL; \
    145 	NAME(&val); \
    146 	ATF_REQUIRE_MSG(val == expval, \
    147 	    "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
    148 }
    149 
    150 atf_sync_rel(__sync_lock_release_1, uint8_t,  PRIx8);
    151 atf_sync_rel(__sync_lock_release_2, uint16_t, PRIx16);
    152 atf_sync_rel(__sync_lock_release_4, uint32_t, PRIx32);
    153 #ifdef __HAVE_ATOMIC64_OPS
    154 atf_sync_rel(__sync_lock_release_8, uint64_t, PRIx64);
    155 #endif
    156 
    157 /*
    158  * __sync_synchronize(): This is just a link-time test.
    159  */
    160 ATF_TC(__sync_synchronize);
    161 ATF_TC_HEAD(__sync_synchronize, tc)
    162 {
    163 	atf_tc_set_md_var(tc, "descr", "__sync_synchronize");
    164 }
    165 ATF_TC_BODY(__sync_synchronize, tc)
    166 {
    167 	__sync_synchronize();
    168 }
    169 
    170 ATF_TP_ADD_TCS(tp)
    171 {
    172 	ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_1);
    173 	ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_2);
    174 	ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_4);
    175 #ifdef __HAVE_ATOMIC64_OPS
    176 	ATF_TP_ADD_TC(tp, __sync_lock_test_and_set_8);
    177 #endif
    178 
    179 	ATF_TP_ADD_TC(tp, __sync_lock_release_1);
    180 	ATF_TP_ADD_TC(tp, __sync_lock_release_2);
    181 	ATF_TP_ADD_TC(tp, __sync_lock_release_4);
    182 #ifdef __HAVE_ATOMIC64_OPS
    183 	ATF_TP_ADD_TC(tp, __sync_lock_release_8);
    184 #endif
    185 
    186 	ATF_TP_ADD_TC(tp, __sync_synchronize);
    187 
    188 	return atf_no_error();
    189 }
    190