tprof_x86.c revision 1.5
1 /* $NetBSD: tprof_x86.c,v 1.5 2018/11/15 07:20:31 knakahara Exp $ */ 2 3 /* 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Maxime Villard. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 #include <stdio.h> 34 #include <stdlib.h> 35 #include <stdbool.h> 36 #include <string.h> 37 #include <unistd.h> 38 #include <err.h> 39 #include <machine/specialreg.h> 40 #include <dev/tprof/tprof_ioctl.h> 41 #include "../tprof.h" 42 43 int tprof_event_init(uint32_t); 44 void tprof_event_list(void); 45 void tprof_event_lookup(const char *, struct tprof_param *); 46 47 struct name_to_event { 48 const char *name; 49 uint64_t event; 50 uint64_t unit; 51 bool enabled; 52 }; 53 54 struct event_table { 55 const char *tablename; 56 struct name_to_event *names; 57 size_t nevents; 58 struct event_table *next; 59 }; 60 61 static struct event_table *cpuevents = NULL; 62 63 static void x86_cpuid(unsigned int *eax, unsigned int *ebx, 64 unsigned int *ecx, unsigned int *edx) 65 { 66 asm volatile("cpuid" 67 : "=a" (*eax), 68 "=b" (*ebx), 69 "=c" (*ecx), 70 "=d" (*edx) 71 : "0" (*eax), "2" (*ecx)); 72 } 73 74 /* -------------------------------------------------------------------------- */ 75 76 /* 77 * Intel Architectural Version 1. 78 */ 79 static struct name_to_event intel_arch1_names[] = { 80 /* Event Name - Event Select - UMask */ 81 { "unhalted-core-cycles", 0x3C, 0x00, true }, 82 { "instruction-retired", 0xC0, 0x00, true }, 83 { "unhalted-reference-cycles", 0x3C, 0x01, true }, 84 { "llc-reference", 0x2E, 0x4F, true }, 85 { "llc-misses", 0x2E, 0x41, true }, 86 { "branch-instruction-retired", 0xC4, 0x00, true }, 87 { "branch-misses-retired", 0xC5, 0x00, true }, 88 }; 89 90 static struct event_table intel_arch1 = { 91 .tablename = "Intel Architectural Version 1", 92 .names = intel_arch1_names, 93 .nevents = sizeof(intel_arch1_names) / 94 sizeof(struct name_to_event), 95 .next = NULL 96 }; 97 98 static struct event_table * 99 init_intel_arch1(void) 100 { 101 unsigned int eax, ebx, ecx, edx; 102 struct event_table *table; 103 size_t i; 104 105 eax = 0x0A; 106 ebx = 0; 107 ecx = 0; 108 edx = 0; 109 x86_cpuid(&eax, &ebx, &ecx, &edx); 110 111 table = &intel_arch1; 112 for (i = 0; i < table->nevents; i++) { 113 /* Disable the unsupported events. */ 114 if ((ebx & (i << 1)) != 0) 115 table->names[i].enabled = false; 116 } 117 118 return table; 119 } 120 121 /* 122 * Intel Silvermont/Airmont. 123 */ 124 static struct name_to_event intel_silvermont_airmont_names[] = { 125 { "REHABQ.LD_BLOCK_ST_FORWARD", 0x03, 0x01, true }, 126 { "REHABQ.LD_BLOCK_STD_NOTREADY", 0x03, 0x02, true }, 127 { "REHABQ.ST_SPLITS", 0x03, 0x04, true }, 128 { "REHABQ.LD_SPLITS", 0x03, 0x08, true }, 129 { "REHABQ.LOCK", 0x03, 0x10, true }, 130 { "REHABQ.STA_FULL", 0x03, 0x20, true }, 131 { "REHABQ.ANY_LD", 0x03, 0x40, true }, 132 { "REHABQ.ANY_ST", 0x03, 0x80, true }, 133 { "MEM_UOPS_RETIRED.L1_MISS_LOADS", 0x04, 0x01, true }, 134 { "MEM_UOPS_RETIRED.L2_HIT_LOADS", 0x04, 0x02, true }, 135 { "MEM_UOPS_RETIRED.L2_MISS_LOADS", 0x04, 0x04, true }, 136 { "MEM_UOPS_RETIRED.DTLB_MISS_LOADS", 0x04, 0x08, true }, 137 { "MEM_UOPS_RETIRED.UTLB_MISS", 0x04, 0x10, true }, 138 { "MEM_UOPS_RETIRED.HITM", 0x04, 0x20, true }, 139 { "MEM_UOPS_RETIRED.ALL_LOADS", 0x04, 0x40, true }, 140 { "MEM_UOP_RETIRED.ALL_STORES", 0x04, 0x80, true }, 141 { "PAGE_WALKS.D_SIDE_CYCLES", 0x05, 0x01, true }, 142 { "PAGE_WALKS.I_SIDE_CYCLES", 0x05, 0x02, true }, 143 { "PAGE_WALKS.WALKS", 0x05, 0x03, true }, 144 { "LONGEST_LAT_CACHE.MISS", 0x2E, 0x41, true }, 145 { "LONGEST_LAT_CACHE.REFERENCE", 0x2E, 0x4F, true }, 146 { "L2_REJECT_XQ.ALL", 0x30, 0x00, true }, 147 { "CORE_REJECT_L2Q.ALL", 0x31, 0x00, true }, 148 { "CPU_CLK_UNHALTED.CORE_P", 0x3C, 0x00, true }, 149 { "CPU_CLK_UNHALTED.REF_P", 0x3C, 0x01, true }, 150 { "ICACHE.HIT", 0x80, 0x01, true }, 151 { "ICACHE.MISSES", 0x80, 0x02, true }, 152 { "ICACHE.ACCESSES", 0x80, 0x03, true }, 153 { "OFFCORE_RESPONSE_0", 0xB7, 0x01, true }, 154 { "OFFCORE_RESPONSE_1", 0xB7, 0x02, true }, 155 { "INST_RETIRED.ANY_P", 0xC0, 0x00, true }, 156 { "UOPS_RETIRED.MS", 0xC2, 0x01, true }, 157 { "UOPS_RETIRED.ALL", 0xC2, 0x10, true }, 158 { "MACHINE_CLEARS.SMC", 0xC3, 0x01, true }, 159 { "MACHINE_CLEARS.MEMORY_ORDERING", 0xC3, 0x02, true }, 160 { "MACHINE_CLEARS.FP_ASSIST", 0xC3, 0x04, true }, 161 { "MACHINE_CLEARS.ALL", 0xC3, 0x08, true }, 162 { "BR_INST_RETIRED.ALL_BRANCHES", 0xC4, 0x00, true }, 163 { "BR_INST_RETIRED.JCC", 0xC4, 0x7E, true }, 164 { "BR_INST_RETIRED.FAR_BRANCH", 0xC4, 0xBF, true }, 165 { "BR_INST_RETIRED.NON_RETURN_IND", 0xC4, 0xEB, true }, 166 { "BR_INST_RETIRED.RETURN", 0xC4, 0xF7, true }, 167 { "BR_INST_RETIRED.CALL", 0xC4, 0xF9, true }, 168 { "BR_INST_RETIRED.IND_CALL", 0xC4, 0xFB, true }, 169 { "BR_INST_RETIRED.REL_CALL", 0xC4, 0xFD, true }, 170 { "BR_INST_RETIRED.TAKEN_JCC", 0xC4, 0xFE, true }, 171 { "BR_MISP_RETIRED.ALL_BRANCHES", 0xC5, 0x00, true }, 172 { "BR_MISP_RETIRED.JCC", 0xC5, 0x7E, true }, 173 { "BR_MISP_RETIRED.FAR", 0xC5, 0xBF, true }, 174 { "BR_MISP_RETIRED.NON_RETURN_IND", 0xC5, 0xEB, true }, 175 { "BR_MISP_RETIRED.RETURN", 0xC5, 0xF7, true }, 176 { "BR_MISP_RETIRED.CALL", 0xC5, 0xF9, true }, 177 { "BR_MISP_RETIRED.IND_CALL", 0xC5, 0xFB, true }, 178 { "BR_MISP_RETIRED.REL_CALL", 0xC5, 0xFD, true }, 179 { "BR_MISP_RETIRED.TAKEN_JCC", 0xC5, 0xFE, true }, 180 { "NO_ALLOC_CYCLES.ROB_FULL", 0xCA, 0x01, true }, 181 { "NO_ALLOC_CYCLES.RAT_STALL", 0xCA, 0x20, true }, 182 { "NO_ALLOC_CYCLES.ALL", 0xCA, 0x3F, true }, 183 { "NO_ALLOC_CYCLES.NOT_DELIVERED", 0xCA, 0x50, true }, 184 { "RS_FULL_STALL.MEC", 0xCB, 0x01, true }, 185 { "RS_FULL_STALL.ALL", 0xCB, 0x1F, true }, 186 { "CYCLES_DIV_BUSY.ANY", 0xCD, 0x01, true }, 187 { "BACLEARS.ALL", 0xE6, 0x01, true }, 188 { "BACLEARS.RETURN", 0xE6, 0x08, true }, 189 { "BACLEARS.COND", 0xE6, 0x10, true }, 190 { "MS_DECODED.MS_ENTRY", 0xE7, 0x01, true }, 191 }; 192 193 static struct event_table intel_silvermont_airmont = { 194 .tablename = "Intel Silvermont/Airmont", 195 .names = intel_silvermont_airmont_names, 196 .nevents = sizeof(intel_silvermont_airmont_names) / 197 sizeof(struct name_to_event), 198 .next = NULL 199 }; 200 201 static struct event_table * 202 init_intel_silvermont_airmont(void) 203 { 204 205 return &intel_silvermont_airmont; 206 } 207 208 /* 209 * Intel Skylake/Kabylake. 210 * 211 * The events that are not listed, because they are of little interest or 212 * require extra configuration: 213 * TX_* 214 * FRONTEND_RETIRED.* 215 * FP_ARITH_INST_RETIRED.* 216 * HLE_RETIRED.* 217 * RTM_RETIRED.* 218 * MEM_TRANS_RETIRED.* 219 * UOPS_DISPATCHED_PORT.* 220 */ 221 static struct name_to_event intel_skylake_kabylake_names[] = { 222 /* Event Name - Event Select - UMask */ 223 { "LD_BLOCKS.STORE_FORWARD", 0x03, 0x02, true }, 224 { "LD_BLOCKS.NO_SR", 0x03, 0x08, true }, 225 { "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", 0x07, 0x01, true }, 226 { "DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", 0x08, 0x01, true }, 227 { "DTLB_LOAD_MISSES.WALK_COMPLETED_4K", 0x08, 0x02, true }, 228 { "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M", 0x08, 0x04, true }, 229 { "DTLB_LOAD_MISSES.WALK_COMPLETED_1G", 0x08, 0x08, true }, 230 { "DTLB_LOAD_MISSES.WALK_COMPLETED", 0x08, 0x0E, true }, 231 { "DTLB_LOAD_MISSES.WALK_PENDING", 0x08, 0x10, true }, 232 { "DTLB_LOAD_MISSES.STLB_HIT", 0x08, 0x20, true }, 233 { "INT_MISC.RECOVERY_CYCLES", 0x0D, 0x01, true }, 234 { "INT_MISC.CLEAR_RESTEER_CYCLES", 0x0D, 0x80, true }, 235 { "UOPS_ISSUED.ANY", 0x0E, 0x01, true }, 236 { "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH", 0x0E, 0x02, true }, 237 { "UOPS_ISSUED.SLOW_LEA", 0x0E, 0x20, true }, 238 { "L2_RQSTS.DEMAND_DATA_RD_MISS", 0x24, 0x21, true }, 239 { "L2_RQSTS.RFO_MISS", 0x24, 0x22, true }, 240 { "L2_RQSTS.CODE_RD_MISS", 0x24, 0x24, true }, 241 { "L2_RQSTS.ALL_DEMAND_MISS", 0x24, 0x27, true }, 242 { "L2_RQSTS.PF_MISS", 0x24, 0x38, true }, 243 { "L2_RQSTS.MISS", 0x24, 0x3F, true }, 244 { "L2_RQSTS.DEMAND_DATA_RD_HIT", 0x24, 0x41, true }, 245 { "L2_RQSTS.RFO_HIT", 0x24, 0x42, true }, 246 { "L2_RQSTS.CODE_RD_HIT", 0x24, 0x44, true }, 247 { "L2_RQSTS.PF_HIT", 0x24, 0xD8, true }, 248 { "L2_RQSTS.ALL_DEMAND_DATA_RD", 0x24, 0xE1, true }, 249 { "L2_RQSTS.ALL_RFO", 0x24, 0xE2, true }, 250 { "L2_RQSTS.ALL_CODE_RD", 0x24, 0xE4, true }, 251 { "L2_RQSTS.ALL_DEMAND_REFERENCES", 0x24, 0xE7, true }, 252 { "L2_RQSTS.ALL_PF", 0x24, 0xF8, true }, 253 { "L2_RQSTS.REFERENCES", 0x24, 0xFF, true }, 254 { "SW_PREFETCH_ACCESS.NTA", 0x32, 0x01, true }, 255 { "SW_PREFETCH_ACCESS.T0", 0x32, 0x02, true }, 256 { "SW_PREFETCH_ACCESS.T1_T2", 0x32, 0x04, true }, 257 { "SW_PREFETCH_ACCESS.PREFETCHW", 0x32, 0x08, true }, 258 { "CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE", 0x3C, 0x02, true }, 259 { "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE", 0x3C, 0x02, true }, 260 { "L1D_PEND_MISS.PENDING", 0x48, 0x01, true }, 261 { "L1D_PEND_MISS.FB_FULL", 0x48, 0x02, true }, 262 { "DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", 0x49, 0x01, true }, 263 { "DTLB_STORE_MISSES.WALK_COMPLETED_4K", 0x49, 0x02, true }, 264 { "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", 0x49, 0x04, true }, 265 { "DTLB_STORE_MISSES.WALK_COMPLETED_1G", 0x49, 0x08, true }, 266 { "DTLB_STORE_MISSES.WALK_COMPLETED", 0x49, 0x0E, true }, 267 { "DTLB_STORE_MISSES.WALK_PENDING", 0x49, 0x10, true }, 268 { "DTLB_STORE_MISSES.STLB_HIT", 0x49, 0x20, true }, 269 { "LOAD_HIT_PRE.SW_PF", 0x4C, 0x01, true }, 270 { "EPT.WALK_PENDING", 0x4F, 0x10, true }, 271 { "L1D.REPLACEMENT", 0x51, 0x01, true }, 272 { "RS_EVENTS.EMPTY_CYCLES", 0x5E, 0x01, true }, 273 { "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", 0x60, 0x01, true }, 274 { "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", 0x60, 0x02, true }, 275 { "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", 0x60, 0x04, true }, 276 { "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", 0x60, 0x08, true }, 277 { "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD", 0x60, 0x10, true }, 278 { "IDQ.MITE_UOPS", 0x79, 0x04, true }, 279 { "IDQ.DSB_UOPS", 0x79, 0x08, true }, 280 { "IDQ.MS_MITE_UOPS", 0x79, 0x20, true }, 281 { "IDQ.MS_UOPS", 0x79, 0x30, true }, 282 { "ICACHE_16B.IFDATA_STALL", 0x80, 0x04, true }, 283 { "ICACHE_64B.IFTAG_HIT", 0x83, 0x01, true }, 284 { "ICACHE_64B.IFTAG_MISS", 0x83, 0x02, true }, 285 { "ICACHE_64B.IFTAG_STALL", 0x83, 0x04, true }, 286 { "ITLB_MISSES.MISS_CAUSES_A_WALK", 0x85, 0x01, true }, 287 { "ITLB_MISSES.WALK_COMPLETED_4K", 0x85, 0x02, true }, 288 { "ITLB_MISSES.WALK_COMPLETED_2M_4M", 0x85, 0x04, true }, 289 { "ITLB_MISSES.WALK_COMPLETED_1G", 0x85, 0x08, true }, 290 { "ITLB_MISSES.WALK_COMPLETED", 0x85, 0x0E, true }, 291 { "ITLB_MISSES.WALK_PENDING", 0x85, 0x10, true }, 292 { "ITLB_MISSES.STLB_HIT", 0x85, 0x20, true }, 293 { "ILD_STALL.LCP", 0x87, 0x01, true }, 294 { "IDQ_UOPS_NOT_DELIVERED.CORE", 0x9C, 0x01, true }, 295 { "RESOURCE_STALLS.ANY", 0xA2, 0x01, true }, 296 { "RESOURCE_STALLS.SB", 0xA2, 0x08, true }, 297 { "EXE_ACTIVITY.EXE_BOUND_0_PORTS", 0xA6, 0x01, true }, 298 { "EXE_ACTIVITY.1_PORTS_UTIL", 0xA6, 0x02, true }, 299 { "EXE_ACTIVITY.2_PORTS_UTIL", 0xA6, 0x04, true }, 300 { "EXE_ACTIVITY.3_PORTS_UTIL", 0xA6, 0x08, true }, 301 { "EXE_ACTIVITY.4_PORTS_UTIL", 0xA6, 0x10, true }, 302 { "EXE_ACTIVITY.BOUND_ON_STORES", 0xA6, 0x40, true }, 303 { "LSD.UOPS", 0xA8, 0x01, true }, 304 { "DSB2MITE_SWITCHES.PENALTY_CYCLES", 0xAB, 0x02, true }, 305 { "ITLB.ITLB_FLUSH", 0xAE, 0x01, true }, 306 { "OFFCORE_REQUESTS.DEMAND_DATA_RD", 0xB0, 0x01, true }, 307 { "OFFCORE_REQUESTS.DEMAND_CODE_RD", 0xB0, 0x02, true }, 308 { "OFFCORE_REQUESTS.DEMAND_RFO", 0xB0, 0x04, true }, 309 { "OFFCORE_REQUESTS.ALL_DATA_RD", 0xB0, 0x08, true }, 310 { "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD", 0xB0, 0x10, true }, 311 { "OFFCORE_REQUESTS.ALL_REQUESTS", 0xB0, 0x80, true }, 312 { "UOPS_EXECUTED.THREAD", 0xB1, 0x01, true }, 313 { "UOPS_EXECUTED.CORE", 0xB1, 0x02, true }, 314 { "UOPS_EXECUTED.X87", 0xB1, 0x10, true }, 315 { "OFFCORE_REQUESTS_BUFFER.SQ_FULL", 0xB2, 0x01, true }, 316 { "TLB_FLUSH.DTLB_THREAD", 0xBD, 0x01, true }, 317 { "TLB_FLUSH.STLB_ANY", 0xBD, 0x20, true }, 318 { "INST_RETIRED.PREC_DIST", 0xC0, 0x01, true }, 319 { "OTHER_ASSISTS.ANY", 0xC1, 0x3F, true }, 320 { "UOPS_RETIRED.RETIRE_SLOTS", 0xC2, 0x02, true }, 321 { "MACHINE_CLEARS.MEMORY_ORDERING", 0xC3, 0x02, true }, 322 { "MACHINE_CLEARS.SMC", 0xC3, 0x04, true }, 323 { "BR_INST_RETIRED.CONDITIONAL", 0xC4, 0x01, true }, 324 { "BR_INST_RETIRED.NEAR_CALL", 0xC4, 0x02, true }, 325 { "BR_INST_RETIRED.NEAR_RETURN", 0xC4, 0x08, true }, 326 { "BR_INST_RETIRED.NOT_TAKEN", 0xC4, 0x10, true }, 327 { "BR_INST_RETIRED.NEAR_TAKEN", 0xC4, 0x20, true }, 328 { "BR_INST_RETIRED.FAR_BRANCH", 0xC4, 0x40, true }, 329 { "BR_MISP_RETIRED.CONDITIONAL", 0xC5, 0x01, true }, 330 { "BR_MISP_RETIRED.NEAR_CALL", 0xC5, 0x02, true }, 331 { "BR_MISP_RETIRED.NEAR_TAKEN", 0xC5, 0x20, true }, 332 { "HW_INTERRUPTS.RECEIVED", 0xCB, 0x01, true }, 333 { "MEM_INST_RETIRED.STLB_MISS_LOADS", 0xD0, 0x11, true }, 334 { "MEM_INST_RETIRED.STLB_MISS_STORES", 0xD0, 0x12, true }, 335 { "MEM_INST_RETIRED.LOCK_LOADS", 0xD0, 0x21, true }, 336 { "MEM_INST_RETIRED.SPLIT_LOADS", 0xD0, 0x41, true }, 337 { "MEM_INST_RETIRED.SPLIT_STORES", 0xD0, 0x42, true }, 338 { "MEM_INST_RETIRED.ALL_LOADS", 0xD0, 0x81, true }, 339 { "MEM_INST_RETIRED.ALL_STORES", 0xD0, 0x82, true }, 340 { "MEM_LOAD_RETIRED.L1_HIT", 0xD1, 0x01, true }, 341 { "MEM_LOAD_RETIRED.L2_HIT", 0xD1, 0x02, true }, 342 { "MEM_LOAD_RETIRED.L3_HIT", 0xD1, 0x04, true }, 343 { "MEM_LOAD_RETIRED.L1_MISS", 0xD1, 0x08, true }, 344 { "MEM_LOAD_RETIRED.L2_MISS", 0xD1, 0x10, true }, 345 { "MEM_LOAD_RETIRED.L3_MISS", 0xD1, 0x20, true }, 346 { "MEM_LOAD_RETIRED.FB_HIT", 0xD1, 0x40, true }, 347 { "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS", 0xD2, 0x01, true }, 348 { "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT", 0xD2, 0x02, true }, 349 { "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM", 0xD2, 0x04, true }, 350 { "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE", 0xD2, 0x08, true }, 351 { "MEM_LOAD_MISC_RETIRED.UC", 0xD4, 0x04, true }, 352 { "BACLEARS.ANY", 0xE6, 0x01, true }, 353 { "L2_TRANS.L2_WB", 0xF0, 0x40, true }, 354 { "L2_LINES_IN.ALL", 0xF1, 0x1F, true }, 355 { "L2_LINES_OUT.SILENT", 0xF2, 0x01, true }, 356 { "L2_LINES_OUT.NON_SILENT", 0xF2, 0x02, true }, 357 { "L2_LINES_OUT.USELESS_HWPF", 0xF2, 0x04, true }, 358 { "SQ_MISC.SPLIT_LOCK", 0xF4, 0x10, true }, 359 }; 360 361 static struct event_table intel_skylake_kabylake = { 362 .tablename = "Intel Skylake/Kabylake", 363 .names = intel_skylake_kabylake_names, 364 .nevents = sizeof(intel_skylake_kabylake_names) / 365 sizeof(struct name_to_event), 366 .next = NULL 367 }; 368 369 static struct event_table * 370 init_intel_skylake_kabylake(void) 371 { 372 return &intel_skylake_kabylake; 373 } 374 375 static struct event_table * 376 init_intel_generic(void) 377 { 378 unsigned int eax, ebx, ecx, edx; 379 struct event_table *table; 380 381 /* 382 * The kernel made sure the Architectural Version 1 PMCs were 383 * present. 384 */ 385 table = init_intel_arch1(); 386 387 /* 388 * Now query the additional (non-architectural) events. They 389 * depend on the CPU model. 390 */ 391 eax = 0x01; 392 ebx = 0; 393 ecx = 0; 394 edx = 0; 395 x86_cpuid(&eax, &ebx, &ecx, &edx); 396 397 if (CPUID_TO_FAMILY(eax) == 6) { 398 switch (CPUID_TO_MODEL(eax)) { 399 case 0x37: /* Silvermont (Bay Trail) */ 400 case 0x4A: /* Silvermont (Tangier) */ 401 case 0x4C: /* Airmont (Braswell, Cherry Trail) */ 402 case 0x4D: /* Silvermont (Avoton, Rangeley) */ 403 case 0x5A: /* Silvermont (Anniedale) */ 404 case 0x5D: /* Silvermont (SoFIA) */ 405 table->next = init_intel_silvermont_airmont(); 406 break; 407 case 0x4E: /* Skylake */ 408 case 0x5E: /* Skylake */ 409 case 0x8E: /* Kabylake */ 410 case 0x9E: /* Kabylake */ 411 table->next = init_intel_skylake_kabylake(); 412 break; 413 } 414 } 415 416 return table; 417 } 418 419 /* -------------------------------------------------------------------------- */ 420 421 /* 422 * AMD Family 10h 423 */ 424 static struct name_to_event amd_f10h_names[] = { 425 { "seg-load-all", 0x20, 0x7f, true }, 426 { "seg-load-es", 0x20, 0x01, true }, 427 { "seg-load-cs", 0x20, 0x02, true }, 428 { "seg-load-ss", 0x20, 0x04, true }, 429 { "seg-load-ds", 0x20, 0x08, true }, 430 { "seg-load-fs", 0x20, 0x10, true }, 431 { "seg-load-gs", 0x20, 0x20, true }, 432 { "seg-load-hs", 0x20, 0x40, true }, 433 { "l1cache-access", 0x40, 0x00, true }, 434 { "l1cache-miss", 0x41, 0x00, true }, 435 { "l1cache-refill", 0x42, 0x1f, true }, 436 { "l1cache-refill-invalid", 0x42, 0x01, true }, 437 { "l1cache-refill-shared", 0x42, 0x02, true }, 438 { "l1cache-refill-exclusive", 0x42, 0x04, true }, 439 { "l1cache-refill-owner", 0x42, 0x08, true }, 440 { "l1cache-refill-modified", 0x42, 0x10, true }, 441 { "l1cache-load", 0x43, 0x1f, true }, 442 { "l1cache-load-invalid", 0x43, 0x01, true }, 443 { "l1cache-load-shared", 0x43, 0x02, true }, 444 { "l1cache-load-exclusive", 0x43, 0x04, true }, 445 { "l1cache-load-owner", 0x43, 0x08, true }, 446 { "l1cache-load-modified", 0x43, 0x10, true }, 447 { "l1cache-writeback", 0x44, 0x1f, true }, 448 { "l1cache-writeback-invalid", 0x44, 0x01, true }, 449 { "l1cache-writeback-shared", 0x44, 0x02, true }, 450 { "l1cache-writeback-exclusive",0x44, 0x04, true }, 451 { "l1cache-writeback-owner", 0x44, 0x08, true }, 452 { "l1cache-writeback-modified", 0x44, 0x10, true }, 453 { "l1DTLB-hit-all", 0x4D, 0x07, true }, 454 { "l1DTLB-hit-4Kpage", 0x4D, 0x01, true }, 455 { "l1DTLB-hit-2Mpage", 0x4D, 0x02, true }, 456 { "l1DTLB-hit-1Gpage", 0x4D, 0x04, true }, 457 { "l1DTLB-miss-all", 0x45, 0x07, true }, 458 { "l1DTLB-miss-4Kpage", 0x45, 0x01, true }, 459 { "l1DTLB-miss-2Mpage", 0x45, 0x02, true }, 460 { "l1DTLB-miss-1Gpage", 0x45, 0x04, true }, 461 { "l2DTLB-miss-all", 0x46, 0x03, true }, 462 { "l2DTLB-miss-4Kpage", 0x46, 0x01, true }, 463 { "l2DTLB-miss-2Mpage", 0x46, 0x02, true }, 464 /* l2DTLB-miss-1Gpage: reserved on some revisions, so disabled */ 465 { "l1ITLB-miss", 0x84, 0x00, true }, 466 { "l2ITLB-miss-all", 0x85, 0x03, true }, 467 { "l2ITLB-miss-4Kpage", 0x85, 0x01, true }, 468 { "l2ITLB-miss-2Mpage", 0x85, 0x02, true }, 469 { "mem-misalign-ref", 0x47, 0x00, true }, 470 { "ins-fetch", 0x80, 0x00, true }, 471 { "ins-fetch-miss", 0x81, 0x00, true }, 472 { "ins-refill-l2", 0x82, 0x00, true }, 473 { "ins-refill-sys", 0x83, 0x00, true }, 474 { "ins-fetch-stall", 0x87, 0x00, true }, 475 { "ins-retired", 0xC0, 0x00, true }, 476 { "ins-empty", 0xD0, 0x00, true }, 477 { "ops-retired", 0xC1, 0x00, true }, 478 { "branch-retired", 0xC2, 0x00, true }, 479 { "branch-miss-retired", 0xC3, 0x00, true }, 480 { "branch-taken-retired", 0xC4, 0x00, true }, 481 { "branch-taken-miss-retired", 0xC5, 0x00, true }, 482 { "branch-far-retired", 0xC6, 0x00, true }, 483 { "branch-resync-retired", 0xC7, 0x00, true }, 484 { "branch-near-retired", 0xC8, 0x00, true }, 485 { "branch-near-miss-retired", 0xC9, 0x00, true }, 486 { "branch-indirect-miss-retired", 0xCA, 0x00, true }, 487 { "int-hw", 0xCF, 0x00, true }, 488 { "int-cycles-masked", 0xCD, 0x00, true }, 489 { "int-cycles-masked-pending", 0xCE, 0x00, true }, 490 { "fpu-exceptions", 0xDB, 0x00, true }, 491 { "break-match0", 0xDC, 0x00, true }, 492 { "break-match1", 0xDD, 0x00, true }, 493 { "break-match2", 0xDE, 0x00, true }, 494 { "break-match3", 0xDF, 0x00, true }, 495 }; 496 497 static struct event_table amd_f10h = { 498 .tablename = "AMD Family 10h", 499 .names = amd_f10h_names, 500 .nevents = sizeof(amd_f10h_names) / 501 sizeof(struct name_to_event), 502 .next = NULL 503 }; 504 505 static struct event_table * 506 init_amd_f10h(void) 507 { 508 return &amd_f10h; 509 } 510 511 static struct event_table * 512 init_amd_generic(void) 513 { 514 unsigned int eax, ebx, ecx, edx; 515 516 eax = 0x01; 517 ebx = 0; 518 ecx = 0; 519 edx = 0; 520 x86_cpuid(&eax, &ebx, &ecx, &edx); 521 522 switch (CPUID_TO_FAMILY(eax)) { 523 case 0x10: 524 return init_amd_f10h(); 525 } 526 527 return NULL; 528 } 529 530 /* -------------------------------------------------------------------------- */ 531 532 int 533 tprof_event_init(uint32_t ident) 534 { 535 switch (ident) { 536 case TPROF_IDENT_NONE: 537 return -1; 538 case TPROF_IDENT_INTEL_GENERIC: 539 cpuevents = init_intel_generic(); 540 break; 541 case TPROF_IDENT_AMD_GENERIC: 542 cpuevents = init_amd_generic(); 543 break; 544 } 545 return (cpuevents == NULL) ? -1 : 0; 546 } 547 548 static void 549 recursive_event_list(struct event_table *table) 550 { 551 size_t i; 552 553 printf("%s:\n", table->tablename); 554 for (i = 0; i < table->nevents; i++) { 555 if (!table->names[i].enabled) 556 continue; 557 printf("\t%s\n", table->names[i].name); 558 } 559 560 if (table->next != NULL) { 561 recursive_event_list(table->next); 562 } 563 } 564 565 void 566 tprof_event_list(void) 567 { 568 recursive_event_list(cpuevents); 569 } 570 571 static void 572 recursive_event_lookup(struct event_table *table, const char *name, 573 struct tprof_param *param) 574 { 575 size_t i; 576 577 for (i = 0; i < table->nevents; i++) { 578 if (!table->names[i].enabled) 579 continue; 580 if (!strcmp(table->names[i].name, name)) { 581 param->p_event = table->names[i].event; 582 param->p_unit = table->names[i].unit; 583 return; 584 } 585 } 586 587 if (table->next != NULL) { 588 recursive_event_lookup(table->next, name, param); 589 } else { 590 errx(EXIT_FAILURE, "event '%s' unknown", name); 591 } 592 } 593 594 void 595 tprof_event_lookup(const char *name, struct tprof_param *param) 596 { 597 recursive_event_lookup(cpuevents, name, param); 598 } 599
Indexes created Mon Sep 29 21:09:56 GMT 2025